JPH0485894A - Circuit board inspection method, inspection board, and circuit board inspection equipment - Google Patents
Circuit board inspection method, inspection board, and circuit board inspection equipmentInfo
- Publication number
- JPH0485894A JPH0485894A JP2200502A JP20050290A JPH0485894A JP H0485894 A JPH0485894 A JP H0485894A JP 2200502 A JP2200502 A JP 2200502A JP 20050290 A JP20050290 A JP 20050290A JP H0485894 A JPH0485894 A JP H0485894A
- Authority
- JP
- Japan
- Prior art keywords
- board
- test
- circuit board
- circuit
- probe
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Links
Landscapes
- Testing Of Short-Circuits, Discontinuities, Leakage, Or Incorrect Line Connections (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
産業上の利用分野
本発明は回路基板を検査する方法、検査基板並びに回路
基板検査装置に関係する。DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a method of testing a circuit board, a testing board, and a circuit board testing apparatus.
従来の技術
従来の回路基板の検査方法は、複数個の接触針(プロー
ブ)を−枚の板上に並べたもの(プローブカード)を被
検査回路基板に押し当て、プローブを被測定ランド(被
検査回路基板上のパターン状の導体、ランド等)に接触
させ、このプローブに信号を送ったりあるいは受けたり
して、被検査回路基板が正常にできているかどうかを検
査した。2. Description of the Related Art In the conventional circuit board testing method, a plurality of contact needles (probes) arranged on a board (probe card) are pressed against the circuit board to be tested, and the probes are placed on the land to be measured (tested land). The probe was brought into contact with patterned conductors, lands, etc. on the test circuit board, and signals were sent to and received from the probe to test whether the circuit board to be tested was properly formed.
発明が解決しようとする課題
ところが、最近は機器の小型化が進み止どまるところを
知らない。小型化のために、極度に高密度の実装が行わ
れ、−枚の基板上に1(100を超すランドも珍しくな
くなってきている。かつ、ランド間のピッチも詰まって
きており、プローブを立てて検査することが不可能にさ
えなってきた。Problems that inventions aim to solve However, recently, the miniaturization of devices has continued and there is no stopping point. In order to achieve miniaturization, extremely high-density packaging is being carried out, and it is becoming common to see more than one (100) lands on a single board.In addition, the pitch between the lands is also becoming narrower, making it difficult to stand the probes upright. It has even become impossible to carry out inspections.
課題を解決するための手段
本発明はこのような課題を解決するために、多層配線基
板で作った検査基板の一方の面上にあるプローブ端子を
被検査回路基板上にある被測定ランドに接触させ、検査
基板上の他の面にある印加接地回路により指定のプロー
ブ端子を通して被検査回路基板上の被測定ランドに電圧
を印加し、方、被検査回路基板上の他の被測定ランドに
接触するプローブ端子を順次接地し、流れる電流を測定
して、被検査回路基板を検査するようにしている。Means for Solving the Problems In order to solve such problems, the present invention brings probe terminals on one side of a test board made of a multilayer wiring board into contact with lands to be measured on a circuit board to be tested. Then, apply a voltage to the land under test on the circuit board under test through the specified probe terminal by the voltage application ground circuit on the other side of the circuit board under test, and then contact the other land under test on the circuit board under test. The circuit board to be tested is tested by sequentially grounding the probe terminals and measuring the flowing current.
作用
本発明は用いれば、多層基板上の端子(ランド)をプロ
ーブとしているために高密度の回路基板であっても、ま
た、被測定ランドが多くても簡単に検査できる。If the present invention is used, terminals (lands) on a multilayer board are used as probes, so even if the circuit board has a high density or there are many lands to be measured, it can be easily inspected.
実施例
以下、本発明の回路基板検査方法、検査基板、回路基板
検査装置の一実施例について図面を参照しながら説明す
る。Embodiment Hereinafter, an embodiment of the circuit board inspection method, inspection board, and circuit board inspection apparatus of the present invention will be described with reference to the drawings.
第1図は本発明の回路基板検査方法の原理説明図である
。FIG. 1 is an explanatory diagram of the principle of the circuit board inspection method of the present invention.
被検査回路基板101上の被測定ランド(ランド等外装
配線)106は内装配線105により同一表面あるいは
他の面上の他の被測定ランド(ランド等外装配線)に接
続されている。この被検査回路基板の配線状態が望むも
のに出来上がっているかどうかを検査する。検査基板1
02は多層配線基板であり、第1図では簡略化して描い
である。Lands to be measured (exterior wiring such as lands) 106 on the circuit board to be inspected 101 are connected by internal wiring 105 to other lands to be measured (exterior wiring such as lands) on the same surface or another surface. It is inspected whether the wiring condition of the circuit board to be inspected is as desired. Inspection board 1
02 is a multilayer wiring board, which is shown in a simplified manner in FIG.
プローブ端子103は被検査回路基板の被測定ランドと
同じ位置にあり、圧接することにより、被測定ランドに
接触する。各プローブ端子は検査基板内で配線され、印
加接地回路104に接続しである。図では1つのICで
代表して描いである。The probe terminal 103 is located at the same position as the land to be measured on the circuit board to be tested, and comes into contact with the land to be measured by pressure contact. Each probe terminal is wired within the test board and connected to an application ground circuit 104. In the figure, one IC is representatively drawn.
108は外部から来る検査信号(検査するための信号)
や外部に送る検出信号(被検査回路基板から得られる情
報)や電源等のための接続端子である。印加接地回路と
この接続端子は配線107でつないである。109は検
出信号発生装置110と検査基板103を結ぶケーブル
である。検査信号発生装置110は予め設定したプログ
ラムで印加接地回路を働かせ、それによって得られる被
検査回路基板からの情報を処理し、被検査回路基板の検
査を行う。108 is an inspection signal coming from the outside (signal for inspection)
It is a connection terminal for a detection signal (information obtained from the circuit board under test) to be sent to the outside, a power supply, etc. The application ground circuit and this connection terminal are connected by a wiring 107. A cable 109 connects the detection signal generator 110 and the test board 103. The test signal generator 110 operates the application ground circuit according to a preset program, processes information obtained from the circuit board to be tested thereby, and tests the circuit board to be tested.
被検査回路基板101を2枚の検査基板103で挟み、
位置をあわせて圧接して(圧接機構は描いていない)、
被検査回路基板上の各被測定ランドと検査基板上の各プ
ローブ端子を各々接触させる。検査信号発生装置からの
指令で印加接地回路により、検査基板の一つのプローブ
端子に電圧を発生させ、一方、他のプローブ端子を順次
接地し、流れる電流を測定して行く。この測定結果は検
査信号発生装置で予め設定された値と比較し、正常か否
かが判断される。すべてのプローブ端子について、この
検査を実行すれば、検査が完了する。A circuit board to be tested 101 is sandwiched between two test boards 103,
Align the positions and press them together (pressing mechanism is not shown).
Each land to be measured on the circuit board to be tested is brought into contact with each probe terminal on the board to be tested. In response to a command from the test signal generator, a voltage is generated at one probe terminal of the test board by an application grounding circuit, while other probe terminals are grounded one after another, and the flowing current is measured. This measurement result is compared with a value set in advance by the test signal generator to determine whether it is normal or not. The test is completed by performing this test on all probe terminals.
導通あるいは抵抗値検査は望むプローブ端子間に望む電
流が流れるかどうかを検査すればよい。Continuity or resistance value testing can be performed by checking whether a desired current flows between desired probe terminals.
また、リーク検査は望むプローブ端子以外のプローブ端
子に流れる電流を検査すればよい。Furthermore, the leakage test may be performed by testing the current flowing through probe terminals other than the desired probe terminal.
検査基板102は一般によく使われているガラスエポキ
シ多層基板であってもよいし、また、セラミック多層基
板でもよい。The test substrate 102 may be a commonly used glass epoxy multilayer substrate or a ceramic multilayer substrate.
印加接地回路は個別部品を組み合わせて作ってもよいし
、ICであってもよい。複数個のICを用いるのも勿論
可能である。The application ground circuit may be made by combining individual components or may be an IC. Of course, it is also possible to use multiple ICs.
被検査回路基板上の被測定ランドと検査基板上のプロー
ブ端子の接触は難しい、被測定プローブ端子の数が多く
なればなるほど難しい。接触を良くするために、異方導
電性の膜(液晶表示パネルの端子引き出しによく使われ
る)を検査基板のプローブ端子表面につけると良い。ま
た、位置をあわせ押圧するための圧接機構は必要である
。It is difficult to make contact between the land to be measured on the circuit board to be tested and the probe terminal on the board to be tested, and the more the number of probe terminals to be measured increases, the more difficult it becomes. To improve contact, it is best to apply an anisotropically conductive film (often used for connecting terminals of liquid crystal display panels) to the surface of the probe terminals on the test board. In addition, a pressure contact mechanism for positioning and pressing is required.
第2図は本発明の検査方法をより具体的に説明する具体
例である。FIG. 2 is a specific example for more specifically explaining the inspection method of the present invention.
被検査回路基板202の被測定ランドに検査基板のプロ
ーブ端子を接触させ、印加接地回路201の各出カブロ
ーブ端子Bを図のように接続する。The probe terminal of the test board is brought into contact with the land to be measured of the circuit board to be tested 202, and each output probe terminal B of the application ground circuit 201 is connected as shown in the figure.
印加接地回路201は2つのりレースイノチからできて
いて、電源端子Aからの電圧を信号端子Sへの信号(S
に流す電流のオンオフ)に従って出力端子Bに伝える。The voltage application grounding circuit 201 is made up of two wires, and connects the voltage from the power supply terminal A to the signal terminal S (S
It is transmitted to output terminal B according to the on/off current flowing through the current.
また、信号端子りへの信号により出力端子Bを接地する
。Further, the output terminal B is grounded by a signal to the signal terminal.
206は検査信号発生装置の一部を示したもので、20
3は電流値測定用の抵抗である。一端は電源に、他の一
端は全ての印加接地回路の電源端子Aに接続しである。206 shows a part of the test signal generating device;
3 is a resistor for measuring current value. One end is connected to the power supply, and the other end is connected to the power supply terminal A of all applied ground circuits.
204はデコーダで接地端子指定コード207により、
指定の印加接地回路に接地信号を送り、指定された出力
端子Bを接地する。205もデコーダであり、印加端子
指定コード208により、指定の印加接地回路に印加信
号を送り、指定された出力端子Bを抵抗203を通して
電源に接続する。204 is a decoder, and with the ground terminal designation code 207,
Sends a grounding signal to the specified application grounding circuit and grounds the specified output terminal B. 205 is also a decoder, which sends an application signal to a specified application grounding circuit using an application terminal designation code 208, and connects a specified output terminal B to a power supply through a resistor 203.
検査方法の一例は、例えば、印加端子指定コード208
にて出力端子B1に電圧を発生させる。An example of the inspection method is, for example, the application terminal designation code 208
A voltage is generated at the output terminal B1.
次に、接地端子指定コード207により、出カブローブ
端子BOからB15まで順次接地して行く。Next, using the grounding terminal designation code 207, the output probe terminals BO to B15 are grounded in sequence.
図のような被検査回路基板の結線の場合は、出カブロー
ブ端子B1と83が接地されたときにのみ電流が流れて
、抵抗203に電圧降下があり、正常に結線できている
ことを確認できる。もしそれ以外で、電圧降下があれば
、ショートしているのであって、異常を発見できる。こ
のプロセスを全てのプローブ端子に行えば(BOから8
15まで順次電圧を印加して調べる〕、被検査回路基板
が正常に作られているかどうかがわかる。In the case of the wiring of the circuit board under test as shown in the figure, current flows only when output probe terminals B1 and 83 are grounded, and there is a voltage drop across resistor 203, confirming that the wiring is properly connected. . If there is a voltage drop in any other case, there is a short circuit, and you can discover the abnormality. If you do this process for all probe terminals (BO to 8
15], it can be seen whether the circuit board to be tested is manufactured normally.
この検査方法では単なる導通検査だけではな(、電圧降
下の大きさで抵抗値もはかれる。また、容量やインダク
タンスや計れる。また、プローブ端子間や浮遊容量もイ
ンダクタンス、リークなども検査できる。図において印
加接地回路が余っているが、検査には差し支えのないも
のである。図においては、印加接地回路の動作を分かり
やすくするために、リレーを用いたが、半導体でできる
ことはあきらかである。またそのほうがXC化できるた
め、多プローブ端子を必要とすることもあり、より好ま
しい。With this testing method, you can not only test for continuity (but also measure the resistance value based on the magnitude of voltage drop). You can also measure capacitance and inductance. You can also test for inductance, leakage, etc. between probe terminals and stray capacitance. There is an extra grounding circuit, but it does not pose a problem for inspection. In the figure, a relay is used to make the operation of the grounding circuit easier to understand, but it is obvious that it can be done with semiconductors. This is more preferable because it allows XC and may require multiple probe terminals.
容易に考えられることであるが、原理、並びに具体例に
示したのは一例であって、回路構成、信号印加方法など
多くの変形がある。例えば、印加接地回路でも、電流を
流し出す能力と吸い込む能力があれば機能を果たすこと
ができる。即ち、少少の抵抗があっても、後で、計算し
て補償することもできる。また、検査基板上に幾らかの
信号処理回路を載せてしまい、検査信号発生装置とのや
り取りを簡単にしてしまうこともできる。Although it is easy to imagine, the principles and specific examples shown are just examples, and there are many variations in circuit configuration, signal application method, etc. For example, a force-grounded circuit can function as long as it has the ability to source and sink current. That is, even if there is a small amount of resistance, it can be calculated and compensated for later. Furthermore, some signal processing circuits may be mounted on the test board, thereby simplifying communication with the test signal generator.
検査基板上のプローブ端子について、被検査回路基板上
の被測定ランドに対応した位置に設けてあるとしたが、
一対一に対応している必要はない。It is assumed that the probe terminals on the test board are located at positions corresponding to the lands to be measured on the circuit board to be tested.
There is no need for a one-on-one correspondence.
例えば、プローブ端子を被測定ランドの形状より細かく
格子状に配列することも可能である。この場合は、検査
基板を被検査回路基板毎に作る必要はない。For example, it is also possible to arrange the probe terminals in a grid pattern that is finer than the shape of the land to be measured. In this case, it is not necessary to create a test board for each circuit board to be tested.
検査信号発生装置はパーソナルコンピュータのようなも
のであっても良いし、専用の物であっても良い。The test signal generating device may be something like a personal computer, or may be a dedicated device.
発明の効果
以上の発明から明らかなように、本発明を用いれば、従
来困難であった高密度大規模の回路基板を簡単に検査す
ることができ、回路基板の信頼性を挙げることができる
ばかりでなく、検査コストを大幅に下げることができる
。Effects of the Invention As is clear from the invention, by using the present invention, it is possible to easily inspect high-density, large-scale circuit boards, which was previously difficult, and the reliability of the circuit boards can be improved. However, inspection costs can be significantly reduced.
第1図は本発明の回路基板の検査方法の原理説明図、第
2図は本発明の回路基板の検査方法を具体的に説明する
構成動作説明図である。
101・・・・・・被検査回路基板、102・・・・・
・検査基板、103・・・・・・プローブ端子、104
・・・・・・印加接地回路、105・・・・・・内装配
線、106・・・・・・被測定ランド、107・・・・
・・配線、108・・・・・・接地端子、109・・・
・・・接続ケーブル、110.206・・・・・・検査
信号発生装置、201・・・・・・印加接地回路、20
2・・・・・・被検査回路基板、203・・・・・・抵
抗、204・・・・・・接地端子指定デコーダ、205
・・・・・・電圧印加端子指定デコーダ、207・・・
・・・接地端子指定コード、208・・・・・・電圧印
加端子指定コード。FIG. 1 is a diagram illustrating the principle of the circuit board testing method of the present invention, and FIG. 2 is a diagram illustrating the configuration and operation specifically explaining the circuit board testing method of the present invention. 101...Circuit board to be inspected, 102...
・Inspection board, 103...Probe terminal, 104
...... Application grounding circuit, 105... Internal wiring, 106... Land to be measured, 107...
... Wiring, 108... Ground terminal, 109...
... Connection cable, 110.206 ... Test signal generator, 201 ... Application grounding circuit, 20
2... Circuit board to be inspected, 203... Resistor, 204... Ground terminal designation decoder, 205
...Voltage application terminal designation decoder, 207...
...Grounding terminal designation code, 208...Voltage application terminal designation code.
Claims (10)
るプローブ端子を被検査回路基板上にある被測定ランド
に接触させ、検査基板上の他の面にある印加接地回路に
より指定のプローブ端子を通して被検査回路基板上の被
測定ランドに電圧を印加し、一方、被検査回路基板上の
他の被測定ランドに接触するプローブ端子を順次接地し
、流れる電流を測定して、被検査回路基板を検査する回
路基板検査方法。(1) Contact the probe terminal on one side of the test board made of a multilayer wiring board to the land to be measured on the circuit board to be tested, and use the grounding circuit on the other side of the test board to A voltage is applied to the land under test on the circuit board under test through the probe terminal, while the probe terminals that contact other lands under test on the circuit board under test are grounded in sequence, the flowing current is measured, and the land under test is A circuit board inspection method for inspecting circuit boards.
両検査基板上の印加接地回路を共に働かせて、被検査回
路を検査することを特徴とする請求項(1)記載の回路
基板検査方法。(2) Contact the test board from both sides of the circuit board to be tested,
2. The circuit board testing method according to claim 1, wherein the circuit to be tested is tested by making the application ground circuits on both test boards work together.
定ランドに対応した位置にプローブ端子を設け、他の面
にこの指定したプローブ端子に電圧を印加したり接地し
たりする印加接地回路を設けたことを特徴とする検査基
板。(3) Probe terminals are provided on one side of the multilayer wiring board at positions corresponding to the lands to be measured on the circuit board under test, and application grounding is applied to the other side to apply voltage to or ground the specified probe terminals. An inspection board characterized by being provided with a circuit.
とする請求項(3)記載の検査基板。(4) The test board according to claim (3), wherein the test board is a ceramic multilayer board.
項(3)または(4)のいずれかに記載の検査基板。(5) The test board according to any one of claims (3) and (4), wherein the application grounding circuit is an IC.
覆い被検査回路基板の被測定ランドと検査基板のプロー
ブ端子とが接触しやすくしたことを特徴とする請求項(
3)から(5)のいずれかに記載の検査基板。(6) The probe terminal surface of the test board is covered with an anisotropically conductive elastic material to facilitate contact between the land to be measured of the circuit board to be tested and the probe terminal of the test board (
The test board according to any one of 3) to (5).
回路基板上にある被測定ランドに接触させるプローブ端
子が一方の面上にあり、他の面には指定のプローブ端子
を通して被検査回路基板上の被測定ランドに電圧を印加
したり接地したりできる印加接地回路を有する検査基板
と、印加接地回路を予め定められたように動作させて接
続関係を検査する検査信号発生装置と、検査基板上の各
プローブ端子を被検査回路基板の対応する端子に接触さ
せる圧接機構とを有する回路基板検査装置。(7) At least, the circuit board is made of a multilayer wiring board, with probe terminals on one side for contacting lands under test on the circuit board under test, and on the other side, the specified probe terminals are passed through the circuit board under test. A test board that has a voltage application ground circuit that can apply voltage to or ground the land to be measured on the top, a test signal generator that operates the voltage application ground circuit in a predetermined manner to test the connection relationship, and a test board. A circuit board testing device having a press-contact mechanism for bringing each probe terminal on the top into contact with a corresponding terminal of a circuit board to be tested.
とする請求項(7)記載の回路基板検査装置。(8) The circuit board testing device according to claim (7), wherein the testing board is a ceramic multilayer board.
項(7)または(8)のいずれかに記載の回路基板検査
装置。(9) The circuit board inspection apparatus according to claim 7 or 8, wherein the application ground circuit is an IC.
で覆い被検査回路基板の被測定プローブ端子と検査基板
のプローブ端子とが接触しやすくしたことを特徴とする
請求項(7)から(9)のいずれかに記載の回路基板検
査装置。(10) From claim (7), characterized in that the probe terminal surface of the test board is covered with an anisotropic conductive elastic material to facilitate contact between the probe terminals of the circuit board to be tested and the probe terminals of the test board. The circuit board inspection device according to any one of (9).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2200502A JP2705288B2 (en) | 1990-07-26 | 1990-07-26 | Circuit board inspection method, inspection board, and circuit board inspection device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2200502A JP2705288B2 (en) | 1990-07-26 | 1990-07-26 | Circuit board inspection method, inspection board, and circuit board inspection device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0485894A true JPH0485894A (en) | 1992-03-18 |
| JP2705288B2 JP2705288B2 (en) | 1998-01-28 |
Family
ID=16425385
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2200502A Expired - Fee Related JP2705288B2 (en) | 1990-07-26 | 1990-07-26 | Circuit board inspection method, inspection board, and circuit board inspection device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2705288B2 (en) |
-
1990
- 1990-07-26 JP JP2200502A patent/JP2705288B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JP2705288B2 (en) | 1998-01-28 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| LAPS | Cancellation because of no payment of annual fees |