JPH0486006A - Amplifier circuit - Google Patents

Amplifier circuit

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Publication number
JPH0486006A
JPH0486006A JP2199168A JP19916890A JPH0486006A JP H0486006 A JPH0486006 A JP H0486006A JP 2199168 A JP2199168 A JP 2199168A JP 19916890 A JP19916890 A JP 19916890A JP H0486006 A JPH0486006 A JP H0486006A
Authority
JP
Japan
Prior art keywords
current
voltage
circuit
terminal
resistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2199168A
Other languages
Japanese (ja)
Other versions
JP3063124B2 (en
Inventor
Masaru Takeuchi
勝 竹内
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsumi Electric Co Ltd
Original Assignee
Mitsumi Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsumi Electric Co Ltd filed Critical Mitsumi Electric Co Ltd
Priority to JP2199168A priority Critical patent/JP3063124B2/en
Publication of JPH0486006A publication Critical patent/JPH0486006A/en
Application granted granted Critical
Publication of JP3063124B2 publication Critical patent/JP3063124B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Amplifiers (AREA)

Abstract

PURPOSE:To obtain a high common-mode rejection ratio (CMR) by extracting voltage changes respectively at the both terminals of a first resistor as the change of a current by current mirror circuits respectively connected to both the terminals of the first resistor. CONSTITUTION:At a current/voltage conversion circuit 16, a current signal from a voltage/current conversion circuit 15 is converted to a voltage signal and outputted by a feedback type operational amplifier OP1 connecting a feedback resistor RB. In this case, the potential at one terminal of the feedback resistor RB is made equal to a potential applied from a terminal TC. Therefore, an output terminal TOUT obtains an output spriously defining a potential applied from the terminal TC as zero potential. Thus, the high CMR can be obtained by applying the stable potential to the terminal TC regardless of the potentials of input terminals TA and TB or a power supply VCC.

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明は演算増幅器を利用した増幅回路に関し。[Detailed description of the invention] (Industrial application field) The present invention relates to an amplifier circuit using an operational amplifier.

特に高いCMRを得ることのできるように改良されたI
C用増幅回路に関する。
Improved I to be able to obtain particularly high CMR
This invention relates to an amplifier circuit for C.

(従来の技術) 演算増幅器を用いた簡易形の増幅回路の一例を第2図を
参照して説明する。
(Prior Art) An example of a simple amplifier circuit using an operational amplifier will be described with reference to FIG.

この増幅回路は、演算増幅器OP2の非反転入力端子1
反転入力端子にそれぞれ抵抗rARIF5を介して入力
端子TA、T、を接続し、出力端子と非反転入力端子と
の間には帰還抵抗器R9を接続して成る。この回路は、
2つの入力の差電圧を一定の増幅率で増幅する。
This amplifier circuit has a non-inverting input terminal 1 of an operational amplifier OP2.
Input terminals TA and T are connected to the inverting input terminal via resistors rARIF5, respectively, and a feedback resistor R9 is connected between the output terminal and the non-inverting input terminal. This circuit is
The differential voltage between two inputs is amplified with a constant amplification factor.

(発明が解決しようとする課題) このような演算増幅器を用いたIC用増幅回路では1高
いCMR(同相電圧除去比)を得るためには、特に抵抗
器R8〜R4として相対精度の極めて高い抵抗器が必要
である。
(Problem to be Solved by the Invention) In an IC amplifier circuit using such an operational amplifier, in order to obtain a 1 higher CMR (common mode rejection ratio), it is necessary to use resistors R8 to R4 with extremely high relative accuracy. A vessel is required.

すなわち1第2図のような増幅回路では、入力端子TA
、TBの電圧をそれぞれVISA r VINBとし、
出力端子T 0LITの電圧をV。UTとすると。
In other words, in the amplifier circuit as shown in Fig. 1, the input terminal TA
, TB voltages are respectively VISA r VINB,
The voltage of the output terminal T0LIT is V. If it is UT.

out− V 、NAIR4・(R1+R2) / (R3+R4
)・RoV +5B−R2/ RI で表わされる。なお、R3−R4はそれぞれ抵抗器R1
〜R4の抵抗値を表わすものとする。
out-V, NAIR4・(R1+R2)/(R3+R4
)・RoV +5B−R2/RI. In addition, R3-R4 are each resistor R1
~ represents the resistance value of R4.

ここで、R,−R,、R2−R,の条件を考えると Vout−(VINA  VINB ) R2/R1と
なり。
Here, considering the conditions of R, -R,, R2-R, Vout-(VINA VINB) R2/R1.

V INA ” V INBの時にはVOIJT”0と
なる。
When V INA" V INB, VOIJT becomes 0.

しかしながら、−船釣なICの製造段階では。However, at the stage of manufacturing ICs for boat fishing.

上記の条件を満足させるには不十分であり、相対精度を
高くするために特別な製造段階を経たものは非常に高価
になるという問題点があった。
This is insufficient to satisfy the above conditions, and there is a problem in that products that undergo a special manufacturing step to increase relative accuracy are extremely expensive.

それ故1本発明の課題は抵抗器の相対精度の影響を受け
ずに高いCMRを得ることのできるIC用増幅回路を提
供することにある。
Therefore, one object of the present invention is to provide an IC amplifier circuit that can obtain high CMR without being affected by the relative precision of resistors.

(課題を解決するための手段) 本発明による増幅回路は、2つの入力の差電圧を電流信
号に変換する電圧−電流変換回路と、前記電流信号を電
圧信号に変換して出力する電流−電圧変換回路とを含み
、前記電圧−電流変換回路は、差動回路を構成する2つ
のトランジスタの間に接続された第1の抵抗器の両端に
おけるそれぞれの電圧変化を、前記第1の抵抗器の両端
にそれぞれ接続したカレントミラー回路により電流の変
化として取り出すものであり、前記電流−電圧変換回路
は、帰還抵抗器を接続した演算増幅器による負帰還型の
増幅回路から成ることを特徴とする。
(Means for Solving the Problems) An amplifier circuit according to the present invention includes a voltage-current converter circuit that converts a voltage difference between two inputs into a current signal, and a current-voltage converter circuit that converts the current signal into a voltage signal and outputs the voltage signal. a conversion circuit, the voltage-current conversion circuit converts each voltage change across the first resistor connected between two transistors constituting the differential circuit into Current changes are extracted by current mirror circuits connected to both ends, respectively, and the current-to-voltage conversion circuit is characterized by comprising a negative feedback type amplifier circuit using an operational amplifier connected to a feedback resistor.

(実施例) 第1図を参照して本発明の一実施例について説明する。(Example) An embodiment of the present invention will be described with reference to FIG.

本回路は、バイアス用端子Vb+を有するバイアス回路
13.入力回路]4.第1の入力端子TAを有する第1
の入力回路]1.第2の入力端子TBを有する第2の入
力回路12.第1.第2の入力端子TA、T、間の差電
圧を電流信号に変換するための電圧−電流変換回路15
.前記電流信号を電圧信号に変換して出力端子T。、1
から出力する電流−電圧変換回路16とを有する。
This circuit includes a bias circuit 13. having a bias terminal Vb+. Input circuit] 4. a first input terminal TA having a first input terminal TA;
input circuit] 1. A second input circuit 12 having a second input terminal TB. 1st. A voltage-current conversion circuit 15 for converting the voltage difference between the second input terminals TA and T into a current signal.
.. The current signal is converted into a voltage signal and output terminal T. ,1
It has a current-voltage conversion circuit 16 outputting from the current-voltage conversion circuit 16.

第1、第2の入力回路11.12はそれぞれ。The first and second input circuits 11 and 12 are respectively.

PNP入力用のトランジスタQ5.Q7と、NPN入力
用のトランジスタQb、Qsとを有する。
PNP input transistor Q5. Q7, and transistors Qb and Qs for NPN input.

これらのトランジスタの動作状態は、入力切換用端子T
sの接続を換えることで切り換えられる。
The operating status of these transistors is determined by the input switching terminal T.
It can be switched by changing the connection of s.

例えば第1の入力回路11について言えば、入力切換用
端子T、をアースGNDのラインに接続すると、入力切
換回路14では第1のカレントミラー回路14−1によ
りダイオードD、を通してトランジスタQ6がオンとな
り、PNP入力段による入力が可能となる。一方、入力
切換用端子T5を開放状態にすると、入力切換回路14
では第2のカレントミラー回路14−2によりダイオー
ドD、を通してトランジスタQ、かオンとなり、NPN
入力段による入力が可能となる。これは第2の入力回路
12についても同様である。
For example, regarding the first input circuit 11, when the input switching terminal T is connected to the earth GND line, in the input switching circuit 14, the first current mirror circuit 14-1 turns on the transistor Q6 through the diode D. , input via a PNP input stage is possible. On the other hand, when the input switching terminal T5 is opened, the input switching circuit 14
Then, the transistor Q is turned on through the diode D by the second current mirror circuit 14-2, and the NPN
Input via the input stage becomes possible. This also applies to the second input circuit 12.

電圧−電流変換回路15では、第1.第2の入力端子T
 A 、 T 8間の差電圧かトランジスタQ。
In the voltage-current conversion circuit 15, the first. Second input terminal T
The differential voltage between A, T8 or transistor Q.

Q2を通して抵抗器RAの両端に発生する。例えば、抵
抗器RAに生じた差電圧によりトランジスタQ zのコ
レクタに電流Iが流れると、カレントミラー回路を構成
しているトランジスタQI2の一方のコレクタにも電流
■が流れる。この差電圧による電流Iは、トランジスタ
Q3.Q4による差動回路を通して電流−電圧変換回路
16に伝えられる。これは、トランジスタQI3IQ+
4によるカレントミラー回路においても同様である。
It occurs across resistor RA through Q2. For example, when a current I flows through the collector of the transistor Qz due to the differential voltage generated in the resistor RA, a current ■ also flows through one collector of the transistor QI2 constituting the current mirror circuit. A current I due to this voltage difference is generated by the transistor Q3. It is transmitted to the current-voltage conversion circuit 16 through the differential circuit formed by Q4. This is transistor QI3IQ+
The same applies to the current mirror circuit according to No. 4.

電流−電圧変換回路16では、帰還抵抗器R。In the current-voltage conversion circuit 16, a feedback resistor R.

を接続した帰還型の演算増幅器OPlにより電圧電流変
換回路15からの電流信号を電圧信号に変換して出力す
る。ここで、帰還抵抗器RBの一端の電位は、端子T。
The current signal from the voltage-current conversion circuit 15 is converted into a voltage signal by a feedback-type operational amplifier OPl connected to the voltage-current conversion circuit 15, and outputted. Here, the potential at one end of the feedback resistor RB is the terminal T.

から与えられた電位と同電位となる。このため、出力端
子T。8oには、端子Tcから与えられた電位を疑似的
に零電位とした出力が得られる。これは、端子Tcに入
力端子TA、TBの電位や電源VCCに関与しない安定
した電位を与えることにより 極めて高いCMRを得る
ことができることを意味する。
The potential is the same as that given by. Therefore, the output terminal T. At 8o, an output is obtained in which the potential applied from the terminal Tc is pseudo-zero potential. This means that an extremely high CMR can be obtained by providing the terminal Tc with a stable potential that is not affected by the potentials of the input terminals TA and TB or the power supply VCC.

また、増幅回路としての増幅率Avは。Also, the amplification factor Av of the amplifier circuit is:

A v ”” K・ (抵抗器R8の抵抗器)/(抵抗
器RAの抵抗値)、(K:電流伝達関数)で表わされ、
抵抗器RAとR6とのマツチング精度は基本的にCMR
Rに影響しない。加えて、■特に電圧−電流変換回路1
5における各トランジスタのIc  (コレクタ電流)
  VCE(コレクタエミッタ間電圧)特性における1
c一定の性質を利用り1.シかも重要な箇所においては
カスコード接続構成とし、。
A v "" K is expressed as (resistor R8)/(resistance value of resistor RA), (K: current transfer function),
The matching accuracy between resistors RA and R6 is basically CMR.
Does not affect R. In addition, ■especially the voltage-current conversion circuit 1
Ic (collector current) of each transistor in 5
1 in VCE (collector-emitter voltage) characteristics
cUsing certain properties1. A cascode connection configuration is used in important locations.

■カレントミラー回路においては対称回路で構成したこ
とにより、電流伝達関数Kを電圧依存性の少ない形にす
ることができる。
(2) By configuring the current mirror circuit as a symmetrical circuit, the current transfer function K can be made to have less voltage dependence.

その結果1本回路では、出力電圧V。L□、はVOIJ
T   −AV−(VINA      VINB  
 )−K・(VINA ′−V+sa)・RB/R^て
表され+ VINA = VINBの時に出力電圧V 
0IJTを極めて0に近づけることか出来る。
As a result, in a single circuit, the output voltage is V. L□, is VOIJ
T -AV-(VINA VINB
)-K・(VINA′-V+sa)・RB/RᄒWhen + VINA = VINB, the output voltage V
It is possible to make 0IJT extremely close to 0.

(発明の効果) 以I−説明してきたように本発明によれば1抵抗器RA
の両端に牙じた2つの入力の差電圧を電流信号の形で取
り出すようにしたことにより、抵抗器RA 、  R,
sの相対精度の影響を受けずに高いCλIRを得ること
のできる増幅回路を提供することができる。
(Effects of the Invention) As explained below, according to the present invention, one resistor RA
By extracting the voltage difference between the two inputs across the resistors in the form of a current signal, the resistors RA, R,
It is possible to provide an amplifier circuit that can obtain a high CλIR without being affected by the relative accuracy of s.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例の回路図1第2図は従来のI
C用増幅回路の一例を示した図。 図中、11.第1の入力回路、12:第2の入力回路、
13:バイアス回路、14:入力切換回路1 ]]5:
電圧−電流変換回路、16;電流電圧灸換回路。
FIG. 1 is a circuit diagram of an embodiment of the present invention. FIG. 2 is a circuit diagram of a conventional I.
The figure which showed an example of the amplifier circuit for C. In the figure, 11. 1st input circuit, 12: 2nd input circuit,
13: Bias circuit, 14: Input switching circuit 1]]5:
Voltage-current conversion circuit, 16; current-voltage moxibustion conversion circuit.

Claims (1)

【特許請求の範囲】[Claims] (1)2つの入力の差電圧を電流信号に変換する電圧−
電流変換回路と、前記電流信号を電圧信号に変換して出
力する電流−電圧変換回路とを含み、前記電圧−電流変
換回路は、差動回路を構成する2つのトランジスタの間
に接続された第1の抵抗器の両端におけるそれぞれの電
圧変化を、前記第1の抵抗器の両端にそれぞれ接続した
カレントミラー回路により電流の変化として取り出すも
のであり、前記電流−電圧変換回路は、帰還抵抗器を接
続した演算増幅器による負帰還型の増幅回路から成るこ
とを特徴とする増幅回路。
(1) Voltage that converts the difference voltage between two inputs into a current signal -
The voltage-current conversion circuit includes a current conversion circuit and a current-voltage conversion circuit that converts the current signal into a voltage signal and outputs the voltage signal. Each voltage change at both ends of the first resistor is extracted as a change in current by a current mirror circuit connected to both ends of the first resistor, and the current-voltage conversion circuit connects a feedback resistor. An amplifier circuit comprising a negative feedback type amplifier circuit using a connected operational amplifier.
JP2199168A 1990-07-30 1990-07-30 Amplifier circuit Expired - Fee Related JP3063124B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2199168A JP3063124B2 (en) 1990-07-30 1990-07-30 Amplifier circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2199168A JP3063124B2 (en) 1990-07-30 1990-07-30 Amplifier circuit

Publications (2)

Publication Number Publication Date
JPH0486006A true JPH0486006A (en) 1992-03-18
JP3063124B2 JP3063124B2 (en) 2000-07-12

Family

ID=16403289

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2199168A Expired - Fee Related JP3063124B2 (en) 1990-07-30 1990-07-30 Amplifier circuit

Country Status (1)

Country Link
JP (1) JP3063124B2 (en)

Also Published As

Publication number Publication date
JP3063124B2 (en) 2000-07-12

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