JPH0487639U - - Google Patents

Info

Publication number
JPH0487639U
JPH0487639U JP12972590U JP12972590U JPH0487639U JP H0487639 U JPH0487639 U JP H0487639U JP 12972590 U JP12972590 U JP 12972590U JP 12972590 U JP12972590 U JP 12972590U JP H0487639 U JPH0487639 U JP H0487639U
Authority
JP
Japan
Prior art keywords
processed
semiconductor manufacturing
electrode plate
processing liquid
ring
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12972590U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP12972590U priority Critical patent/JPH0487639U/ja
Publication of JPH0487639U publication Critical patent/JPH0487639U/ja
Pending legal-status Critical Current

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  • Formation Of Insulating Films (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本考案の浮遊式メツキ治具の分解断面
図、第2図はこの治具を用いたメツキ装置を示す
概略構成図、第3図は従来のメツキ治具の分解断
面図、第4図は従来のメツキ装置の概略構成図で
ある。 11……半導体ウエーハ、12……メツキ液(
処理液)、13……平形Oリング、14……治具
本体、15……吸着ステージ、16……電極端子
、17……本体、18……メツキ槽(処理槽)、
19……電極板。
Figure 1 is an exploded sectional view of the floating plating jig of the present invention, Figure 2 is a schematic configuration diagram showing a plating device using this jig, Figure 3 is an exploded sectional view of a conventional plating jig, and Figure 3 is an exploded sectional view of a conventional plating jig. FIG. 4 is a schematic diagram of a conventional plating device. 11... Semiconductor wafer, 12... Plating liquid (
treatment liquid), 13...Flat O-ring, 14...Jig body, 15...Adsorption stage, 16...Electrode terminal, 17...Main body, 18...Plating tank (processing tank),
19...Electrode plate.

Claims (1)

【実用新案登録請求の範囲】 (1) 処理対象物を電極板と対向して処理液に浸
漬し、この処理対象物と電極板間に電圧を印加す
る半導体製造装置において、 処理対象物をOリングを介してステージ上に吸
着させたことを特徴とする半導体製造装置。 (2) 請求項1において、処理対象物を処理液中
に水平に配設したことを特徴とする半導体製造装
置。
[Claims for Utility Model Registration] (1) In semiconductor manufacturing equipment in which an object to be processed is immersed in a processing liquid facing an electrode plate and a voltage is applied between the object to be processed and the electrode plate, the object to be processed is exposed to O. A semiconductor manufacturing device characterized by being adsorbed onto a stage via a ring. (2) The semiconductor manufacturing apparatus according to claim 1, wherein the object to be processed is disposed horizontally in the processing liquid.
JP12972590U 1990-11-30 1990-11-30 Pending JPH0487639U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12972590U JPH0487639U (en) 1990-11-30 1990-11-30

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12972590U JPH0487639U (en) 1990-11-30 1990-11-30

Publications (1)

Publication Number Publication Date
JPH0487639U true JPH0487639U (en) 1992-07-30

Family

ID=31877116

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12972590U Pending JPH0487639U (en) 1990-11-30 1990-11-30

Country Status (1)

Country Link
JP (1) JPH0487639U (en)

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