JPH0517565B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a data setting circuit that sets initial data to data storage means such as a register when power is turned on or when a reset is released.

[Conventional technology]

Conventionally, in a microcomputer configured with a single-chip IC, the initial value when the power is turned on or when a reset is released is cleared to 0 data or converged to an undefined value depending on the element characteristics.

[Problem that the invention seeks to solve]

In such a microcomputer, the start address of a program operation is fixed in a data storage means such as a program counter, and initial determination (data input) cannot be made in a general-purpose register, so that the program cannot be shortened.

Therefore, the present invention allows the retained data at the time of reset to be arbitrarily set.

[Means for solving problems]

As illustrated in FIG. 1, the data setting circuit of the present invention has a pair of inverters 20 and 22 connected in parallel in opposite directions, and transistors 24 and 26 at both ends of the parallel circuit of each inverter. The data setting circuit is equipped with a storage means (register 2) formed by connecting bit lines in series and connecting the gates of each of the transistors to a word line 30, which is connected to both ends of the parallel circuit of the inverter. First and second transistors 40 and 42 are connected to the point, respectively, and third and fourth transistors 44 and 46 are connected in series between the gates of these first and second transistors.
A set value input circuit 4 is connected to the set value input circuit 4, and specific data is given to the storage means as an initial set value from the set value input circuit in response to an initial signal applied to the third and fourth connection points. shall be.

[Effect]

In this way, the specific data D _i arbitrarily given to the setting value input circuit 4 is given as the initial setting value of the storage means, so that the initial setting value of the storage means is determined by the setting data for the setting value input circuit 4. It can be changed arbitrarily.

〔Example〕

FIG. 1 shows an embodiment of the data setting circuit of the present invention.

The register 2 is installed inside the microcomputer as a storage means, and the written data is lost when the register is reset or the power is turned off.

A set value input circuit 4 is provided as data setting means for writing data as an initial set value into this register 2.

The set value input circuit 4 sets specific data D _i as an initial value, and inputs the specific data D _i set by an initial signal I _T as an operation start signal such as a power-on signal or a reset release signal.
It is added to register 2 as an initial setting value in response to the initial signal _IT .

Therefore, after a reset or at the start of a program operation when the power is turned on, the register 2 receives specific data D _i as an initial setting value from the setting value input circuit 4.
is added and the program operation is based on that specific data.
This can be done by setting D _i as a set value. As a result,
Initial values can be set according to program operations performed by a microcomputer, making program creation easier and reducing processing time.

FIG. 2 shows a specific embodiment of the data setting circuit of the present invention.

Register 2 is connected to inverters 20, 22 and n
It is configured with channel type transistors 24 and 26 as a unit, and for example, in 16 bits, 16
A set of units is required. 30 is a word line, 32 and 34 are bit lines, and bit line 3
With respect to the data D of 2, inverted data appears on the bit line 34.

The set value input circuit 4 also includes an inverter 20,
22 for the first and second transistors 4
0 and 42, third and fourth transistors 44 and 46 connected in series are inserted between the gates of each transistor 40 and 42, and an initial signal I _T is applied to the connection point between the transistors 44 and 46. In this case, the setting value input circuit 4 is shown for a 1-bit unit; for example, in the case of 16 bits, 16 sets are required.

Then, the transistors 44, 4 of each unit
If one of the transistors 6 is selectively configured with a depletion type transistor, the transistors 44 and 46
is selectively made conductive, so that the specific data D _i as the initial setting value is set by the initial signal I _T.
is set in the register 2 from the set value input circuit 4.

Therefore, at the start of a program operation after a reset or when the power is turned on, specific data D i is added to the register 2 as an initial setting value from the setting value input circuit 4 by the initial signal _IT , and the specific data D _i is added to the register 2 as an initial setting value. Program operations can be performed using the data D _i as an initial value.

〔Effect of the invention〕

As explained above, according to the present invention, after resetting, specific data can be set in the storage means for each bit and each word, so the initial setting value as retained data can be arbitrarily set for each bit and each word.
Program creation becomes easier and processing time can be shortened.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of the data setting circuit of the present invention, and FIG. 2 is a circuit diagram showing a specific embodiment of the data setting circuit shown in FIG. 2...Register (storage means), 4...Set value input circuit, 20, 22...Inverter, 24, 26
...Transistor, 30...Word line, 32,3
4... Bit line, 40... First transistor,
42... second transistor, 44... third transistor, 46... fourth transistor.

Claims (1)

[Claims] 1. A pair of inverters having opposite directions are connected in parallel, and bit lines are connected to both ends of the parallel circuit of each inverter via transistors in series, and the gates of each of the transistors are connected in parallel. a data setting circuit comprising a storage means formed by connecting a word line to a word line, wherein first and second transistors are respectively connected between both ends of the parallel circuit of the inverter and a ground point; A set value input circuit includes a third and fourth transistor connected in series between the gates of the second transistor, and the set value input circuit A data setting circuit characterized in that specific data is given to the storage means as an initial setting value.