JPH05267321A - Bipolar transistor and manufacturing method thereof - Google Patents

Abstract

(57) [Abstract] [Purpose] To realize high speed bipolar transistors. [Structure] A silicon oxide film 11 is formed on a silicon substrate 10, and a first collector region is formed on the silicon oxide film 11.
A conductive type silicon carbide film 12 is stacked, a second conductive type silicon film 13 serving as a base region is stacked on the first conductive type silicon carbide film 12 in a heterojunction, and an emitter region is formed on the second conductive type silicon film 13. The first-conductivity-type silicon carbide film 14 to be formed is heterojunctionally laminated.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a bipolar transistor and its manufacturing method.

[0002]

2. Description of the Related Art At present, bipolar transistors using a silicon substrate are widely manufactured, and such bipolar transistors are also used in ICs and the like. With the development of the semiconductor industry in recent years,
High-speed operation of bipolar transistors is required.
Therefore, in order to speed up the bipolar transistor,
A junction between two different types of semiconductors, a so-called heterojunction (h
A heterojunction bipolar transistor using an etero junction has been proposed.

In the above heterojunction bipolar transistor, the fact that silicon carbide has a larger bandgap than silicon is used in the emitter region of the bipolar transistor to prevent injection of charges from the base to the emitter. it can. Therefore, since the doping concentration of the base can be increased and the base resistance can be reduced, the amplification factor and operating speed of the transistor are increased.

Such a heterojunction bipolar transistor is disclosed in Japanese Patent Application Laid-Open No. 62-216364. In the heterojunction bipolar transistor disclosed in the above publication, as shown in FIG. 5, an n ⁺ type collector contact region 2 is formed on the surface layer of an n type silicon substrate 1, and a collector region made of n type silicon is formed on the n ⁺ type collector contact region 2. 3 is formed, and a base region 4 made of p-type silicon is formed on the collector region 3. Then, an emitter region 5 made of n-type silicon carbide is formed on the base region 4, and an emitter electrode 6 is provided on the emitter region 5. In the figure, 7 is an insulating film.

[0005]

However, in the heterojunction bipolar transistor of FIG. 5, when forming the emitter region 5 using silicon carbide, high temperature treatment is required, so that the film thickness of the base region 4 is increased. Was difficult to thin. This has been an obstacle to further increase the speed of the transistor.

In view of the above, it is an object of the present invention to provide a bipolar transistor and a method of manufacturing the bipolar transistor, which can realize higher speed.

[0007]

In a bipolar transistor according to claim 1 of the present invention, a silicon oxide film is formed on a silicon substrate, and a first conductivity type silicon carbide film to be a collector region is formed on the silicon oxide film. A second layer, which is laminated and serves as a base region, is formed on the first conductivity type silicon carbide film.
A conductive type silicon film is heterojunctionally laminated, and a first conductive type silicon carbide film to be an emitter region is heterojunctionally laminated on the second conductive type silicon film.

In a bipolar transistor according to a second aspect, the first conductivity type silicon carbide film and the second conductivity type silicon film according to the first aspect are formed by single crystal epitaxial growth which inherits the plane orientation of the silicon substrate. is there. According to a third aspect of the present invention, in a method of manufacturing a bipolar transistor, a silicon oxide film is grown on a silicon substrate and then the silicon oxide film is selectively removed by etching to expose a surface of the silicon substrate for forming a collector region and an emitter region. Forming the formed opening at a predetermined position,
A step of depositing a silicon carbide film for forming a collector region and an emitter region on the surface of the silicon substrate exposed by the opening formed in the above step, and a silicon nitride film is deposited on the entire surface so as to cover the silicon carbide film and the silicon oxide film. Forming a first dummy layer by etching, removing the first dummy layer on the opening side for forming the emitter region by etching, and then depositing a silicon oxide film, etching the first dummy layer on the opening side for forming the collector region. Removing the dummy layer to form a cavity for forming a collector region, epitaxially growing a silicon carbide film for forming a collector region as a seed crystal, and filling the inside of the cavity for forming a collector region with a silicon carbide layer to be a collector region. The silicon carbide film for forming the collector region and the silicon carbide film for forming the emitter region are formed by the process and etching. A step of removing the silicon oxide film between the contact film and the silicon substrate to expose the silicon substrate, and a silicon nitride film is deposited on the entire surface to form a second dummy layer so as to cover the surface of the silicon substrate exposed in the above step. And removing the second dummy layer immediately above the emitter region forming silicon carbide film by etching to expose the emitter region forming silicon carbide film, and epitaxially growing the emitter region forming silicon carbide film as a seed crystal. ,
A step of forming a silicon carbide layer to be an emitter region on the second dummy layer, a step of depositing a silicon oxide film on the entire surface so as to cover the emitter area formed in the above step, and an oxidation deposited in the above step by etching. Removing the silicon film to expose the second dummy layer on the collector region side; removing the second dummy layer on the collector region side by etching to form a cavity for forming a base region; A step of epitaxially growing silicon as a seed crystal and filling the inside of the cavity for forming a base region with a silicon layer to be a base region, and a process of connecting an emitter electrode, a base electrode and a collector electrode to the emitter region, the base region and the collector region respectively. It is characterized by including.

[0009]

In the bipolar transistor according to the first aspect, since the junction between the base region and the collector region is a heterojunction between silicon carbide and silicon, holes due to the band gap between silicon carbide and silicon are generated in the collector region. Injection is blocked so that only electron accumulation in the base region will determine operating speed. Therefore, by reducing the film thickness of the base region, the number of electrons accumulated in the base region is reduced, and high-speed operation is realized. Further, since the junction between the base region and the emitter region is a heterojunction between silicon carbide and silicon, it is possible to prevent the injection of charges from the base region to the emitter region due to the difference in band gap between silicon carbide and silicon. Therefore, the doping concentration of the base region can be increased to lower the base resistance, and the amplification factor and operating speed of the transistor can be increased.

Further, since the transistor region is provided on the silicon substrate through the silicon oxide film without joining the transistor region and the silicon substrate, it is possible to eliminate the parasitic capacitance which reduces the operating speed of the transistor. The characteristics of the transistor are improved. In the bipolar transistor of claim 2, since the first conductivity type silicon carbide film and the second conductivity type silicon film are formed by single crystal epitaxial growth that inherits the plane orientation of the silicon substrate, the transistor region has few crystal defects. It can be formed from a first conductivity type silicon carbide film and a second conductivity type silicon film. Therefore, the characteristics of the transistor are improved.

According to the manufacturing method of the third aspect, the first silicon nitride film is formed on the silicon carbide film and the silicon oxide film.
A dummy layer is formed on the first side on the opening side for forming the emitter region.
After removing the dummy layer of, a silicon oxide film is deposited,
By removing the silicon oxide film, the remaining first dummy layer on the opening side for forming the collector region is exposed, and the first dummy layer on the opening side for forming the collector region is removed to remove the first dummy layer for forming the collector region. Since the cavity is formed and the collector region forming silicon carbide film is epitaxially grown as a seed crystal to form the collector region in the collector region forming cavity, the epitaxial growth film in the collector region is controlled by the first dummy layer. To be done. In addition, a second dummy layer made of a silicon nitride film is formed, a silicon oxide film is deposited on the entire surface, the silicon oxide film is removed, and the second dummy layer on the collector region side is exposed to remove the second dummy layer on the collector region side. Second
The dummy layer of is removed to form a cavity for forming the base region, and the silicon of the silicon substrate is epitaxially grown as a seed crystal to form a base region made of a silicon film in the cavity for forming the base region. The epitaxial growth film of is controlled by the second dummy layer.

As described above, since the dummy layer can control the epitaxial growth film in the collector region and the base region and make the collector region and the base region flat, the device variation can be reduced. Also,
After epitaxially growing a silicon carbide film for forming an emitter region, which requires high temperature treatment, forming an emitter region on the second dummy layer, the second dummy layer is removed,
Since the base region is formed, the epitaxial growth of the base region can be easily controlled by the second dummy layer, and the thickness of the base region can be reduced. Therefore, it contributes to the high-speed operation of the transistor.

[0013]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described in detail below with reference to FIGS. First, the structure of a bipolar transistor according to an embodiment of the present invention will be described with reference to FIG. FIG. 1 is a sectional view of a bipolar transistor according to an embodiment of the present invention.

The bipolar transistor of this embodiment has a transistor region having a double heterojunction structure formed on an insulating film.
That is, in this bipolar transistor, as shown in FIG. 1, a silicon oxide (SiO ₂ ) film 11 is formed on a silicon substrate 10 having a plane orientation (100), and a first conductive film serving as a collector region is formed on the silicon oxide film 11. Type (eg, n
(Type) cubic silicon carbide (3S-SiC) film 12 is stacked, and second conductivity type (eg, p-type) silicon (S) serving as a base region is formed on the first conductivity type cubic silicon carbide film 12.
i) The film 13 is hetero-junctionally laminated, and the first conductivity type cubic silicon carbide (3S-SiC) film 14 serving as an emitter region is hetero-junctionally laminated on the second conductivity type silicon film 13. ..

First conductivity type cubic silicon carbide film 12, 1
4 and the second conductivity type silicon film 13 are formed on the silicon substrate 1
It is formed by single crystal epitaxial growth that inherits the plane orientation of 0. A collector electrode 16 is provided on the first conductivity type cubic silicon carbide film 12 through the contact hole 15, and a base electrode 18 is provided on the second conductivity type silicon film 13 through the contact hole 17 and a first conductivity type cubic film. Emitter electrodes 20 are connected to the respective crystal silicon carbide films 14 through contact holes 19.

The collector electrode 16, the base electrode 18, and the emitter electrode 20 are insulated from each other by a passivation film 21. In the above structure, the first conductivity type cubic silicon carbide film 12, the second conductivity type silicon film 13 and the first conductivity type cubic silicon carbide film 14 are sequentially stacked to form a transistor region having a double heterojunction structure. High speed operation of the transistor becomes possible.

Since the junction between the base region and the collector region is a heterojunction between silicon carbide and silicon, the injection of holes into the collector region is blocked due to the difference in band gap between silicon carbide and silicon. Therefore, only the electron accumulation in the base region will determine the operating speed. Therefore, by reducing the film thickness of the base region, the number of electrons accumulated in the base region is reduced, and high-speed operation is realized. Further, since the junction between the base region and the emitter region is a heterojunction between silicon carbide and silicon, it is possible to prevent the injection of charges from the base region to the emitter region due to the difference in band gap between silicon carbide and silicon. Therefore, the doping concentration of the base region can be increased to lower the base resistance, and the amplification factor and operating speed of the transistor can be increased.

Further, since the collector region and the emitter region are made of the same silicon carbide, the collector region and the emitter region can be used in reverse, and I ² L (integrated injector) can be used.
ion logic) circuit, etc. Further, since the transistor region is provided on the silicon substrate 10 via the silicon oxide film 11 without joining the transistor region and the silicon substrate 10, it is possible to eliminate the parasitic capacitance that reduces the operating speed of the transistor. The characteristics of the transistor are improved.

Furthermore, since the first conductivity type cubic silicon carbide films 12 and 14 and the second conductivity type silicon film 13 are formed by single crystal epitaxial growth that inherits the plane orientation of the silicon substrate 10, the transistor region is formed. , The first conductive type cubic silicon carbide films 12 and 14 and the second conductive type silicon film 13 having few crystal defects. Therefore, the characteristics of the transistor are improved.

Next, a method of manufacturing the bipolar transistor will be described with reference to FIGS.
2 to 4 are sectional views showing a method of manufacturing a bipolar transistor in the order of steps. As shown in FIG. 2A, silicon oxide (SiO 2) is formed on the silicon substrate 10 by thermal oxidation.
₂ ) grow the film 11. The film thickness of the silicon oxide film 11 is, eg, 5000 Å. After that, a mask is formed on the silicon oxide film 11 by photolithography,
The silicon oxide film 11 is etched with hydrofluoric acid to expose predetermined positions of the silicon substrate, and openings 30 and 31 for forming a collector region and an emitter region are formed, respectively.

As shown in FIG. 2 (b), the chemical vapor deposition method (CVD) is used.
Cubic silicon carbide (3S-SiC) films 12 and 14 for forming collector regions and emitter regions are deposited in the openings 30 and 31 for forming collector and emitter regions formed in the step (a), respectively. In this _{case, Si 2 H 6 + C 2} H 2 + HCl as a material gas, with H ₂ as a carrier gas, the substrate temperature is kept for example in 1350 ° C.,
For example, cubic silicon carbide is grown to 3000 Å.

As shown in FIG. 2C, the silicon carbide film 1
A silicon nitride (Si ₃ N ₄ ) film is deposited on the entire surface by CVD so as to cover 2, 14 and the silicon oxide film 11. At this time, using Si ₂ H ₆ + NH ₃ as a material gas, for example, silicon nitride 60 at a substrate temperature of 350 ° C.
00Å Grow. After that, until the film thickness of the silicon nitride film on the silicon oxide film 11 reaches, for example, 3000 Å, SO
G (spin on glass) etch back is performed to form the first dummy layer 32.

As shown in FIG. 2 (d), a CD is formed using CF _4.
After removing the first dummy layer 32 on the side of the emitter region forming opening 31 by E (chemocal dry etching), a silicon oxide film 33 is deposited by the CVD method. At this time, using SiH ₄ + N ₂ O as a material gas, the silicon oxide film 33 is grown at a temperature of 450 ° C. for 4000 Å, for example.

As shown in FIG. 2E, a mask is formed on the silicon oxide film 33 by a photolithography technique, and hydrofluoric acid is exposed so that the first dummy layer 32 on the side of the opening 30 for forming the collector region is exposed. The silicon oxide film 33 is removed by etching. As shown in FIG. 2F, the first dummy layer 32 on the side of the opening 30 for forming the collector region is removed by using hot phosphoric acid to form the cavity 34 for forming the collector region.

As shown in FIG. 2G, the collector region forming cavity 34 is epitaxially grown by a CVD method using the collector region forming silicon carbide film 12 as a seed crystal.
Fill the inside with silicon carbide to form a collector region.
The growth conditions can be the same as the conditions under which silicon carbide was deposited and grown in the step of FIG. 2B, for example. Figure 2
As shown in (h), the silicon oxide film 33 is removed by etching with phosphoric acid, for example, 4000 Å, and then the silicon oxide film 11 is masked by photolithography to form the collector region forming silicon carbide film 12 and the emitter region forming. The silicon oxide film 11 between it and the silicon carbide film 14 for use is removed by using phosphoric acid to expose the silicon substrate 10.

As shown in FIG. 3A, a silicon nitride film is deposited on the entire surface by CVD to cover the surface of the silicon substrate 10 exposed in the step of FIG. By etching back, the minimum thickness of the silicon nitride film is set to, for example, 2000 Å, and the second dummy layer 35 is formed.
To form. As shown in FIG. 3B, the second dummy layer 35 immediately above the emitter region forming silicon carbide film 14 is removed by etching to expose the emitter region forming silicon carbide film 14.

As shown in FIG. 3C, the emitter region forming silicon carbide film 14 is epitaxially grown as a seed crystal to form an emitter region on the second dummy layer 35. As shown in FIG. 3D, the CVD method shown in FIG.
A silicon oxide film 36 is deposited on the entire surface to cover, for example, 4000 Å so as to cover the emitter region formed in the above step. Figure 3
As shown in (e), part of the silicon oxide film 36 deposited in the step of FIG. 3D is removed by etching to expose the second dummy layer 35 on the collector region side.

As shown in FIG. 3F, the second dummy layer 35 on the collector region side is removed by etching to form a cavity 37 for forming a base region. As shown in Fig. 3 (g),
Silicon of the silicon substrate 10 is used as a seed crystal to epitaxially grow silicon in the cavity 37 to form a base region made of the silicon film 13 in the base region forming cavity 37. At this time, for example, SiH ₄ is used as a material gas, and silicon is epitaxially grown at a substrate temperature of 1000 to 1100 ° C. At this time, at the same time, B ₂ H ₆ is used, and for example, B ³⁺ is doped to make the silicon film 14 p-type.

As shown in FIG. 3H, after removing unnecessary portions of the transistor by etching, a silicon oxide film is grown on the entire surface by a CVD method to form a passivation film 21. As shown in FIG. 4A, the emitter region (silicon carbide film 14) and the base region (silicon film 1)
3) and contact holes 15, 17, and 19 are provided on the collector region (silicon carbide film 12), respectively.

As shown in FIG. 4B, the emitter electrode 20, the base electrode 18 and the collector electrode 17 are connected to the emitter region (silicon carbide film 14), the base region (silicon film 13) and the contact holes 15, 17 and 19, respectively. Each is connected to the collector region (silicon carbide film 12). Since cubic silicon carbide (3S-SiC) is non-doped and n-type, FIG. 2 (g) and FIG.
In the step (c), since silicon carbide is not doped with impurities, it becomes an npn transistor.
Further, when Al ³⁺ is doped using trimethylaluminum, the silicon carbide becomes p-type.
In the step (g), if P ⁻ is doped to make the silicon n-type, a pnp transistor is obtained.

Thus, in the step of FIG. 2C, the first dummy layer 32 made of a silicon nitride film is formed on the silicon carbide films 12 and 14 and the silicon oxide film 11, and the process shown in FIG.
In the step (d), the first portion on the side of the emitter region forming opening 31 is formed.
2D, the silicon oxide film 33 is deposited, and in the step of FIG. 2E, the silicon oxide film 33 is removed to leave the remaining first collector region forming opening 30 side. The dummy layer 32 is exposed, and in the step of FIG.
First dummy layer 32 on the side of the opening 30 for forming the collector region
Is removed to form a cavity 34 for forming a collector region, and the silicon carbide film 12 for forming a collector region is epitaxially grown as a seed crystal in the step of FIG. Therefore, the epitaxial growth film in the collector region is controlled by the first dummy layer 32.

Further, the second dummy layer 35 made of a silicon nitride film is formed in the step of FIG. 3A, and the silicon oxide film 36 is deposited on the entire surface in the step of FIG.
In the step (e), the silicon oxide film 36 is removed to expose the second dummy layer 35 on the collector region side.
In the step (f), the second dummy layer 35 on the collector region side is formed.
To form a cavity 37 for forming a base region.
In the step (g), the silicon of the silicon substrate 10 is epitaxially grown as a seed crystal to form the base region made of the silicon film 14 in the base region forming cavity 37.
Is controlled by the dummy layer 35.

Therefore, the dummy layers 32 and 35 can control the epitaxial growth film in the collector region and the base region, and can make the collector region and the base region flat, so that variations in the device can be reduced. Further, in the process of FIGS. 3B to 3C, the silicon carbide film 14 for forming the emitter region, which requires high temperature treatment, is epitaxially grown to form the second dummy layer 35.
Since the base region is formed by removing the second dummy layer 35 after forming the emitter region on the upper region, it becomes easy to control the epitaxial growth of the base region by the second dummy layer 35, and the base region film is formed. The thickness can be reduced. Therefore, it contributes to the high-speed operation of the transistor.

The present invention is not limited to the above embodiments, and it goes without saying that many modifications and changes can be made within the scope of the present invention.

[0035]

As is apparent from the above description, according to the first aspect of the present invention, the transistor region has the double heterojunction structure, so that the transistor can operate at high speed. Further, since the transistor region is provided on the silicon substrate through the silicon oxide film without bonding the transistor region and the silicon substrate, it is possible to eliminate the parasitic capacitance that reduces the operating speed of the transistor, and The characteristics are improved.

In the second aspect, since the first conductivity type silicon carbide film and the second conductivity type silicon film are formed by the single crystal epitaxial growth that inherits the plane orientation of the silicon substrate, the transistor region has few crystal defects. First
It can be formed of a conductive silicon carbide film and a second conductive silicon film. Therefore, the characteristics of the transistor are improved. According to the third aspect, the dummy layer controls the epitaxial growth film in the collector region and the base region, and the collector region and the base region can be made flat, so that the variation in the device is reduced.

Further, since the base region is formed after the formation of the emitter region requiring the high temperature treatment, it becomes easy to control the epitaxial growth of the base region by the second dummy layer, and the base region is easily formed. The film thickness can be reduced. Therefore, it contributes to the high-speed operation of the transistor.

[Brief description of drawings]

FIG. 1 is a cross-sectional view of a bipolar transistor according to an exemplary embodiment of the present invention.

FIG. 2 is a cross-sectional view showing a method of manufacturing a bipolar transistor in the order of steps.

FIG. 3 is a cross-sectional view showing the continuation of FIG. 2 in the order of steps.

FIG. 4 is a sectional view showing the continuation of FIG. 3 in the order of steps.

FIG. 5 is a sectional view of a conventional bipolar transistor.

[Explanation of symbols]

 10 Silicon Substrate 11 Silicon Oxide Film 12, 14 First Conductive Silicon Carbide Film 13 Second Conductive Silicon Film 16 Collector Electrode 18 Base Electrode 20 Emitter Electrode 30, 31 Opening 32, 35 Dummy Layer 33 Silicon Oxide Film 34, 37 Cavity 36 Silicon oxide film

Claims (3)

[Claims] 1. A silicon oxide film is formed on a silicon substrate, a first conductivity type silicon carbide film to be a collector region is laminated on the silicon oxide film, and a silicon oxide film is formed on the first conductivity type silicon carbide film. A second conductivity type silicon film to be a base region is hetero-junctionally stacked, and a first conductivity type silicon carbide film to be an emitter region is hetero-junctionally stacked on the second conductivity type silicon film. Characteristic bipolar transistor. 2. A bipolar transistor, wherein the first-conductivity-type silicon carbide film and the second-conductivity-type silicon film according to claim 1 are formed by single crystal epitaxial growth that inherits the plane orientation of the silicon substrate. 3. After growing a silicon oxide film on a silicon substrate, the silicon oxide film is selectively removed by etching, and an opening exposing a surface of the silicon substrate for forming a collector region and an emitter region is formed at a predetermined position. A step of forming, a step of depositing a silicon carbide film for forming a collector region and an emitter region on the surface of the silicon substrate exposed by the opening formed in the above step, and a silicon nitride film over the entire surface so as to cover the silicon carbide film and the silicon oxide film. A step of depositing a film to form a first dummy layer, a step of removing the first dummy layer on the side of the emitter region forming opening by etching, and then a step of depositing a silicon oxide film, an opening for forming a collector region by etching Forming a cavity for forming a collector region by removing the first dummy layer on the side, collector region type Of epitaxially growing the silicon carbide film for forming a seed crystal and filling the inside of the cavity for forming the collector region with the silicon carbide layer for forming the collector region, and etching the silicon carbide film for forming the collector region and the silicon carbide film for forming the emitter region. Removing the silicon oxide film between them to expose the silicon substrate, covering the surface of the silicon substrate exposed in the above step,
A step of depositing a silicon nitride film on the entire surface to form a second dummy layer, the second dummy layer directly above the silicon carbide film for forming the emitter region is removed by etching, and the silicon carbide film for forming the emitter region is exposed. And a step of epitaxially growing the emitter region-forming silicon carbide film as a seed crystal to form a silicon carbide layer to be an emitter region on the second dummy layer, covering the entire surface of the emitter region formed in the process A step of depositing a silicon oxide film, a step of removing the silicon oxide film deposited in the above step by etching to expose the second dummy layer on the collector region side, and a step of etching the second dummy layer on the collector region side. Process of removing and forming a cavity for base region formation, epitaxy using silicon of silicon substrate as seed crystal Growth step, filling the inside of the cavity for forming the base region with a silicon layer to be the base region, and connecting the emitter electrode, the base electrode and the collector electrode to the emitter region, the base region and the collector region, respectively. And method for manufacturing bipolar transistor.