JPH05341920A - Parallel disk device - Google Patents

Abstract

PURPOSE:To reduce the number of disks of a parallel disk device where parity is added to input data to divisionally store data in plural disks. CONSTITUTION:A data conversion circuit 11 converts data having the (nXn)-bit width (for example, (n) is 4) to n arrays of data having the n-bit width. A parity generating circuit 21 generates the parity with n bits as a unit, and the parity of n arrays is stored in a shift register 22 while being shifted. A data selecting circuit 31 stores data of n arrays of a buffer 12 and the parity of two arrays of the shift register 22 in magnetic disks 41 to 44 corresponding to bit positions. In the case of a disk fault, the parity in a normal disk is discriminated by a parity selecting circuit 61, and the logical value in the bit position corresponding to the faulty disk in the data string where parity error is detected by a parity check circuit 62 is inverted by an inverting circuit 63 to obtain normal data.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a data recording system for a parallel disk device, and more particularly to a data recording system for writing data with parity added.

[0002]

2. Description of the Related Art A conventional data recording method for a parallel disk device will be described by taking an example in which input data is 4-bit data. As shown in FIG. 3, a parity generation circuit 81 for generating 4-bit data parity, four data magnetic disks 92 to 95 for writing 4-bit data bit by bit, and the parity generation circuit 81 are used. It has one magnetic disk for parity 91 for writing a parity bit and writes the generated parity on a magnetic disk different from the magnetic disk for storing data.

[0003]

Since this conventional parallel disk device has a disk dedicated to parity,
It was necessary to increase the number of disks.

[0004]

A parallel disk device of the present invention is a parallel disk device which adds parity to an input data string and divides and stores the data string among a plurality of disks. A data conversion circuit for converting the data to each bit, a buffer for storing the output of the data conversion circuit, a parity generation circuit for generating the parity by the output of the buffer, and the parity bit are sequentially stored while being shifted. an n-bit shift register that rotates after storing n bits,
A data selection circuit that selects either the output n-bit data of the data conversion circuit or the output n-bit data of the n-bit shift register, and the output n-bit data of the data selection circuit independently for each bit position. A first n-bit parity stored in the n-bit shift register and a second n-bit rotated by 1 bit for each input (n × n) -bit data. Is added to each of the n disks and the data is divided into n disks and written.

Further, in the above structure, when a read buffer for storing read data from the n disks and a failure signal indicating that one of the n disks has failed is read, the read operation is performed. A parity selection circuit for replacing the parity written in the failed disk among the first and second n-bit parity stored in the buffer with the parity written in a disk other than the failed disk, and the read buffer. Parity check circuit that outputs a parity error signal when a parity check is performed on n-bit data in the read buffer and a parity error is detected using the parity in the internal parity and the parity selected by the parity selection circuit, and the failure occurs when the parity error signal is received. Fault indication indicated by signal The logical value of the data from the disk other than the failed disk by inverting the logic value of the data from the click can be configured to include an inverting circuit to it.

[0006]

The present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram of an embodiment of the present invention. FIG. 1A shows a portion related to writing on a magnetic disk, and FIG. 1B shows a portion related to reading from a magnetic disk. The present embodiment is an example of a case where data having a 16-bit width of 1 byte is divided into 4 parts each having a 4-bit width and stored in four magnetic disks.

First, writing will be described. Figure 1
In (a), the data conversion circuit 11 converts the 1-byte data 110 (length 16 bits) into the 4-bit width data 111.
4 columns, and the buffer 12 stores this 4-bit data 1
11 is sequentially temporarily stored. The parity generation circuit 21 generates the parity of the 4-bit data 112 stored in the buffer 12. The counter 23 is a hexadecimal counter, takes a parity set timing, and controls the whole. The shift register 22 has a shift amount of 4 bits and sequentially stores the parity while shifting the parity according to the value of the counter 23 to generate a parity string. The data selection circuit 31 selects either the output data 112 of the buffer or the output data 122 of the shift register 22 as the write data of the magnetic disks 41 to 44 according to the value of the counter 23.

The operation will now be described with reference to the timing chart of FIG.

The data conversion circuit 11 divides the 1-byte (16-bit) data 110 into 4 bits, and sequentially divides the data 110 into 4 bits.
Four columns of bit data 111 are output. That is, as shown in FIG. 2, the first bit data DA of the data 110
The 0th to 4th bit data DA3 become the data 111 of the first column, and the 5th bit data DB0 to the 8th bit data DB
3, 9th bit data DC0 to 12th bit data DC
3, 13th bit data DD0 to 16th bit data D
D3 is the data 111 in the second, third, and fourth columns, respectively.
Becomes The buffer 12 sequentially stores the 4-bit data 111. Then, the parity generation circuit 122 generates the parity of the output 4-bit data 112 of the buffer 12. That is, as shown in FIG. 2, the parity PA is applied to the four 1-bit data DA0 to DA3 in the first column, and the parity P is applied to the data DB0 to DB3 in the second column.
B, a parity PC is generated for the data DC0 to DC3 in the third column, and a parity PD is generated for the data DD0 to DD3 in the fourth column. The shift register 22 sequentially stores these parities PA to PD while shifting until the value of the counter 23 becomes 3 (until 4 bits of parity are generated). During this time, the data selection circuit 31 is in the buffer
The second side is selected and the 4-bit data 112 is written as it is on the magnetic disks 41 to 44. That is, as shown in FIG. 2, the output data B0 of the first bit of the buffer 12 is set to 1
The input data D0 of the first magnetic disk 41, the output data B1 of the second bit is input data D1 of the second magnetic disk 42, and the output data B2 of the third bit is the third magnetic disk 43. Input data D2 of
The output data B3 of the bit is the fourth magnetic disk 44
Input data D3. Subsequently, the data selection circuit 31 selects the shift register side until the value of the counter 23 becomes 5, and the parity columns 122 for two columns are arranged on the magnetic disks 41 to 41.
44 respectively. That is, as shown in FIG.
When the value of the counter 23 is 4 and when the value of the counter 23 is 5, the output data R0 of the first bit of the shift register 22 to the output data R3 of the fourth bit of the input data D0 to the corresponding magnetic disks 41 to 44, respectively. D3.

When the value of the counter 23 is 4 and 5, the contents of the shift register 22 are shifted (rotated) by 1 bit. Therefore, every time four columns of 4-bit data 112 are written, two parity columns 112 are written. The parity is shifted by the shift register 22 and written on the magnetic disks 41 to 44. Even if any one of the magnetic disks fails, the parity required to restore the data on the failed magnetic disk fails. This is because it is not on a magnetic disk. PA-PB-PC-PD, PB-P on the magnetic disks 41-44
The case where the parity of 4 bits and 2 columns of C-PD-PA is written will be described as an example. If the magnetic disk 41 fails, the parity PA and PB written on the magnetic disk 41 cannot be used, but the magnetic disk 42
To PB and from the magnetic disk 44 to PA. The existence of parity is guaranteed even when another magnetic disk fails.

Next, reading will be described. Figure 1
In (b), the parity selection circuit 61 determines which parity is to be used and where. Parity check circuit 6
2 checks the parity. The inverting circuit 63 inverts the data. The buffer 51 stores the data read from the magnetic disks 41 to 44. Data conversion circuit 71
Converts 4-column 4-bit data into 1-byte data having a length of 16 bits.

Next, the operation will be described. The buffer 51 takes in four columns of 4-bit data and two columns of 4-bit parity from the magnetic disks 41 to 44. Parity selection circuit 61
Captures the 4-bit 2-column parity data 151 stored in the buffer 51. Then, a signal 160 indicating which magnetic disk has failed is received and it is determined which parity is stored in which magnetic disk as the parity PA, PB, PC, PD for the four columns of 4-bit width data. Next, the parity check circuit 62 uses the parity 161 determined by the parity selection circuit 61 to perform a parity check on the data stored in the buffer 51. Here, when a parity error is detected, the parity error signal 162 is sent to the inverting circuit 63. When a parity error occurs, the inverting circuit 63 recognizes that a parity error has occurred due to an abnormality in the output data of the failed magnetic disk designated by the disk failure signal 160, and the logical values (“0”, “1” of the abnormal data are recognized. ") Is inverted to make normal data.

In this embodiment, the magnetic disk is used as an example of the disk, but an optical disk may be used.

[0015]

As described above, the parallel disk device of the present invention has an effect that the number of disks can be reduced because it is not necessary to have a disk dedicated to parity by adding parity after data.

[Brief description of drawings]

FIG. 1 is a block diagram of an embodiment of the present invention, (a)
Indicates writing, and (b) indicates a portion related to reading.

FIG. 2 is a diagram showing the timing of each part during writing in the embodiment of FIG.

FIG. 3 is a block diagram showing an example of a conventional parallel disk device.

[Explanation of symbols]

 11, 71 Data conversion circuit 12, 51 Buffer 21 Parity generation circuit 22 Shift register 23 Counter 31 Data selection circuit 41-44 Magnetic disk 61 Parity selection circuit 62 Parity check circuit 63 Inversion circuit

Claims (2)

[Claims] 1. A parallel disk device for adding parity to an input data string and dividing the data string into a plurality of disks for storage, and a data conversion circuit for converting the input data string into data of every n bits, A buffer that stores the output of the data conversion circuit, and a parity generation circuit that generates the parity by the output of the buffer,
An n-bit shift register that sequentially stores the parity bits while shifting them, stores the n-bits, and then rotates the parity bits; output n-bit data from the data conversion circuit;
A data selection circuit for selecting one of the output n-bit data of the bit shift register, and n discs for independently writing the output n-bit data of the data selection circuit at each bit position are input and Was (n ×
n) For each bit data, add the first n-bit parity stored in the n-bit shift register and the second n-bit parity rotated by 1 bit, and divide into n between the n disks. A parallel disk device characterized by writing and writing. 2. A read buffer that stores read data from the n disks and a read signal that is stored in the read buffer when a failure signal indicating that one of the n disks has failed is received. A parity selection circuit that replaces the parity written in the failed disk with the parity written in a disk other than the failed disk among the first and second n-bit parities; and parity in the read buffer. A parity check circuit that outputs a parity error signal when a parity check is performed on n-bit data in the read buffer using the parity of the parity selection circuit and a parity error is detected, and a fault signal when the parity error signal is received are indicated. Logical value of data from the failed disk 2. The parallel disk device according to claim 1, further comprising an inverting circuit for inverting the logical value of data from a disk other than the failed disk.