JPH0540552Y2 - - Google Patents

Description

[Detailed Description of the Invention] Technical Field The present invention is implemented in, for example, an electronic display device, and includes a first transmission device that creates display data, and a first transmission device that is installed at a location away from the first transmission device and that transmits the transmitted data. and a second transmission device that displays.

Background Art FIG. 7 is a block diagram showing a typical prior art configuration. The display device 51 is composed of a parent device A as a first transmission device, and slave devices B1, B2, ..., Bn (indicated by reference numeral B when collectively named) as a plurality of second transmission devices. Display data for one channel to be displayed is created in the display data creation section 52 of the parent device A, and is sent by wire from the telegraph circuit 53 to the reception section 54 of the slave device B via the transmission line l. The receiving unit 54 sends the transmitted data to a storage circuit 55 consisting of a plurality of storage areas 55a to 55n, and the storage circuit 55 stores the display data in one of the storage areas 55a to 55n for each channel. do. The display data for each channel stored in the memory circuit 55 is sent to the display channel selection circuit 56.
The display data of the selected channel is displayed on the display section 57.

In such prior art, the display data stored individually in the storage areas 55a to 55n in the child device B can be selected only in the child device B, and channels cannot be selected from the parent device A. Therefore, this is particularly inconvenient when the parent device A and the slave device B are far apart.

Purpose The purpose of the present invention is to solve the above-mentioned technical problems and provide a display device that allows the first transmission device to directly and freely select the channel of display data to be displayed on the second transmission device. That's true.

Configuration In the present invention, (a) a parent device C and a plurality of slave devices M are connected via a common transmission line l1, (b) a parent device C is connected to (b1) each of a plurality of channels to be transmitted. (b2) a data creation circuit 7 that creates display data for each channel; and (b2) a first circuit that stores display data for each channel from the data creation circuit 7 for each channel.
a first memory circuit 10 having a storage area Y; (b3) a monitor 5 for display; (b4) a transmission channel selection circuit 6 for selecting a channel of data to be transmitted; (b6) A transmission circuit 4 that sends transmission data to the transmission line l1; (b7) A slave address selected by the slave address selection circuit 3. A code D1, instruction codes D2 and D3 representing the channel selected by the display or transmission channel selection circuit 6, and a plurality of displays read from the first storage area Y of the first storage circuit 10 for the selected channel. code D4
(b8) a first display channel selection circuit 14 that selects a channel to be displayed; (b9) ) a first character generator 13 for storing character data for displaying a character corresponding to the display code D4 on the monitor 5; The plurality of display heads D4 stored in the first storage area Y of the channel selected by the first display channel selection circuit 14 of the first storage circuit 10 are read out, and the character corresponding to the read display data D4 is read out. (c) Each slave device M includes: (c1) an address setter for each slave device M; c2) a second storage circuit 22 having a second storage area S for storing instruction codes D2 and D3 and a plurality of display codes D4 for each channel; When the received slave device address code D1 matches the address set in the address setting device, the instruction codes D2, D3 and display code D4 that follow the slave device address code D1 are
receiving means 21 and 26 for applying and storing the instruction codes D2 and D3 in the second storage area S corresponding to the channels represented by the second storage circuit 22; (c4) a second display channel selection circuit 23; -1) Clock means 3 that outputs the current time
0, (c4-2) a timer time setting means 31 that outputs the time to be displayed for each channel, and (c4-3) an output of the clock means 30 and an output of the timer time setting means 31 for each channel. Comparators E1 and E2 for each channel output a matching signal when there is a match, and (c4-4) direct selection means 32 provided for each channel to directly select a channel.
(c4-5) OR gates G1 and G2 are provided for each channel and derive the coincidence signals of comparators E1 and E2 and the output of the direct selection means 32, (c4-6) OR gate G1 , G2, the second storage area S of the second storage circuit 22
(c5) selected by the second display channel selection circuit 23 of the second storage circuit 22 or selected by instruction codes D2 and D3; a counter 28 that sequentially selects one by one a plurality of display codes D4 stored in the second storage area S of the selected channel; (c6) a display means 24 that performs visual display; and (c7) a display code corresponding to the display code. (c8) a second character generator 29 for storing character data for displaying the character to be displayed by the display means 24; In response to the selected display code D4, character data from the second character generator 29 is read out and supplied to the display means 24 for display.
This is a display device characterized by including display data creation means 27.

Embodiment FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention. The display device 1 includes a parent device C as a first transmission device, and slave devices M1 and M as a plurality of second transmission devices connected to the parent device C via a transmission line l1.
2,...,Mn (indicated by reference mark M when used collectively)
It consists of

The master unit C includes a display data creation unit 2 equipped with an input means such as a keyboard, and a slave unit address selection circuit realized by a dip switch or a numeric keypad for selectively specifying the address number of the slave unit M to be transmitted. 3, and a transmission channel selection circuit 6 realized using a similar switch.
A transmission circuit 4 that transmits the transmission data created by the display data creation section 2 to the child device M via the transmission line l1
and a monitor circuit 5 realized by display means such as a CRT (cathode ray tube) for checking the contents of the created display data. A signal generating means is constituted by the display data creation section 2, the slave address selection circuit 3, the transmission circuit 4, the transmission channel selection circuit 6, and the transmission circuit 4.

The child device M includes a receiving unit 21 that receives data transmitted from the parent device C, and a plurality of storage areas S1 and S to store the received data for each channel.
2,...,Sn (indicated by the reference mark S when collectively referred to); a channel selection circuit 23 that selects which channel of the memory circuit 22 is to display the contents; The display unit 24 includes a display section 24 realized by a display means such as a CRT for displaying the contents of the channel.

FIG. 2 is a block diagram showing the detailed configuration of this embodiment. FIG. 2 includes all the content shown in FIG. 1, and common parts are given the same reference numerals.

The display data creation unit 2 of the parent device C includes a channel data creation circuit 7 that creates display content for each channel;
It is comprised of a transmission data creation circuit 8 that creates transmission data to the child device M, and a display data creation circuit 9 that creates display data to be displayed on the monitor circuit 5. Further, in the periphery of the display data creation section 2, there is a storage circuit 10 consisting of storage areas Y1, Y2..., Yn (indicated collectively by the reference mark Y) such as a plurality of RAMs (random access memories), and a storage circuit 10 for storing the channel data. A channel selection circuit 11 selects in which channel (Y1 to Yn) of the storage circuit 10 the data created by the creation circuit 7 is to be stored; A display channel designation circuit 12 selectively designates which data is to be displayed and inputs it to the transmission data creation circuit 8, and the display data creation circuit 9 inputs character data such as characters and figures necessary for creating display data. A character generator 13 for supplying a signal to the monitor circuit 5 and a monitor channel selection circuit 14 for selecting a channel to be displayed on the monitor circuit 5 are arranged. Note that the channel selection circuit 1 described above
1. The display channel designation circuit 12 and the monitor channel selection circuit 14 are both equipped with switch means such as a dip switch or a numeric keypad.

The child device M decodes the transmission data inputted from the parent device C via the receiving portion 21 and reproduces it into data to be stored in the storage circuit 22. The receiving data generating section 25 includes a display data generating circuit 27 and a counter 28, which generate data necessary for displaying the stored contents on the reading display section 24. Further, a character generator 29 that supplies character data such as characters and graphics to the display data creation circuit 27 described above is arranged in relation to the receiving section 21, the storage section 22, the display channel selection section 23, and the display section 24. has been done. Next, the operation of this embodiment will be explained with reference to FIGS. 1 and 2.

In the main device C, a channel selection signal is given to the transmission data creation circuit 8 by the transmission channel selection circuit 6, and display data to be displayed is created by the channel data creation circuit 7, and this created data is The data is stored in storage areas (hereinafter referred to as memories) Y1 to Yn in the storage circuit 10 that are selected and designated by the channel selection circuit 11. Memory circuit 10
When you want to check the content of the display data stored in the display data, select the channel you want to display on the monitor using the display channel selection circuit 14, and the monitor display data creation circuit 9 will then select the memory (Y1 to Yn) corresponding to the channel. ) and read it out. On the other hand, according to the read data code signal, the character generator 13 sends data related to the character corresponding to the code to the monitor circuit 5, and the display data of the selected channel is displayed by the monitor circuit 5. be done.
In this way, the stored contents of each of the memories Y1 to Yn of the storage circuit 10 can be monitored.

Here, the character generator 13 is composed of, for example, four 1C chips, and for example, the character "A" is represented by 16 of 0820 (H) to 082F (H) of one chip, as shown in FIG. byte and 16 bytes of 0820(H) to 082F(H) of the other chip. Therefore, the code signal of the character generator 13 is stored in 2 bytes of 0082 (H), with the lower 4 bytes of 0820 (H) being omitted. Using this code, 32 bytes of data are read from the character generator 13, and are sequentially output to the monitor circuit 5 for display.

The display data for each channel stored in each of the memories Y1 to Yn of the storage circuit 10 is selected by the transmission channel selection unit 6, and the address corresponding to the destination slave device M, for example, slave device M1 is 01.
(H), 02(H)... for the slave device M2 is selected by the slave device address selection circuit 3, and when it is desired to change the display content of the slave device M to that of another channel, the display channel designation circuit 12 selects the slave device M2. The channel is designated, and both of these data are input to the transmission data creation circuit 8, and the transmission data creation circuit 8 selects the memory Y in the storage circuit 10 based on the above data, reads the stored contents, and generates the transmission data. input to the creation circuit 8, while the child device address selection circuit 3
When the address of the slave device M to be transmitted to is selected by , the transmission data creation circuit 8 creates transmission data as shown in FIG.
Send to.

FIG. 4 is a diagram showing an example of transmission data.
Transmission data is created with 1-byte and 2-byte codes, and the first 1-byte code D1 indicates the address code of the slave device. For example, in the case of 01 (H), the first slave device M1 is selected on the parent device side. indicates that it has been done. The next 2-byte code D2 is the first code D1
This is an instruction code that instructs the slave device selected in (the first slave device M1 in the example shown in the fourth figure) to display or change the channel. For example, if it is 00 (H),
This is a command to change the display on the slave device to the content of the channel specified by the next code D3.
If it is 11 (H) as shown in the fourth diagram, code D4
This command is to store the data to be sent below in the channel indicated by code D3. In the fourth diagram, since code D3 is 03 (H), the command is to store data of code D4 and below in 3 channels. The code D4 and the following are 8-byte instruction codes, which are displayed on the child device M side or stored in the memory S in the storage circuit 22 corresponding to the specified channel.

In the code example shown in FIG.
In the memory S3 corresponding to the channel (3 channels), data of code D4 and below are stored as shown in FIG.

Referring again to FIGS. 1 and 2, such transmission data is transmitted from the transmission circuit 4 to the child device M via the transmission line I1 by serial transmission or parallel transmission. What should be noted in this embodiment is that in this way, the parent device C arbitrarily selects and calls the address of the child device M, changes the display contents, and stores display data by specifying a channel. This is what we have made possible.
Although in the above embodiment, only one child device (for example, child device M1) can be selected on the parent device C side, it is possible to select a plurality of child devices depending on the combination of codes D1. For example, one byte constituting the code D1 is the final FF(H).
If so, the call may be made to all the child devices (M1 to Mn).

In the child device M, the transmission data from the parent device C is received by the reception circuit 21, and is derived to the reception data reproducing circuit 26 in the reception data creation section 25. The received data reproducing circuit 26 receives a code D1 indicating the address for the child device M sent from the parent device C, a code D2 instructing the operation, and a code D3 instructing the channel.
If the data of the address code D1 matches its own address, the following command is taken in and executed. For example, in the code example shown in FIG. 4 above, the child device M1 determines that the command is directed to itself due to 01 (H) of the code D1, and reads the following code.
Since the next code D2 is 11 (H), it is determined that the command is to store the data of code D4 and below in the channel indicated by the next code D3, and is executed. If the data of code D2 is, for example, 00 (H), in this case, slave device M1 determines that this is a command to change the displayed content to that of the channel indicated by the next code D3, and executes it. .

Next, when a channel is selected and the data stored in the memory circuit 22 is read out, the counter 28 sequentially increments from, for example, 0000, and the data at the address corresponding to the count number of the counter 18 is read out. is read out one byte at a time.
For example, assume that three channels of slave device M1 are selected and the counter 28 counts sequentially from 0000. Memory circuit 22 of child device M1
The data contents of the 3rd channel in the memory S3 are the 5th channel.
Assuming that the data is stored as shown in the figure, at the first count of 0000 of the counter 28, the memory S3 is first stored.
The 1-byte code [08 (H)] of the first address of is read out, and at the next count 0001, [2A (H)] is
Furthermore, at the next count 0002, [03(H)] is...
It is read out like this. Note that the data at this time is a code signal of the character generator 29, and the read data is a code signal of the character generator 29.
7, the display data creation circuit 27 gives the code signal to the character generator 29,
The display circuit 24 displays the character corresponding to that code.
The desired display is performed. In the above embodiment, all commands such as channel selection and display contents to slave device M are transmitted from parent device C side. The channel to be displayed can also be selected on the device M side.

As mentioned above, the slave device M is equipped with the display channel selection circuit 2, which selects the memory S corresponding to the channel in the storage circuit 22 using a switch such as a dip switch or a numeric keypad (not shown). The stored contents are read out and outputted to the display data creation circuit 27, and the characters for each code are read out from the character generator 29 and outputted to the display circuit 24 for display. In this way, it is possible to select and display a desired display channel on the slave device M side as well.

FIG. 6 is a circuit diagram showing a specific configuration of the display channel selection circuit 23 provided in the slave M.
This display channel selection circuit 23 performs two operations for each channel: timer setting to display the contents of that channel at a predetermined time, and direct selection to directly select a channel. It is configured so that it can be done. This display channel selection circuit 23 directly selects a desired channel using a clock means 30, a timer time setting means 31, comparators E1, E2, . It is composed of a direct selection means 32 and OR gates G1, G2, . . . (generally referred to by reference numeral G). The direct selection means 32 includes switches SW1, SW2, . The timer time setting means 31 includes channel time setting means L1, L2, . . . (indicated by reference numeral L when collectively named) for setting the display time for each channel.

The data regarding the current time from the clock means 30 is applied to one input terminal of the comparator E, and the data regarding the set time from the time setting means L (i.e., the time) is applied to the other input terminal of the comparator E. and time) are given. The output from comparator E is given to one input terminal of OR gate G,
The other input terminal of OR gate G is connected to a switch.
A reference voltage Vcc is applied via SW. In the case of direct selection, turn on the switch SW corresponding to that channel. As a result, a high level signal is applied to the memory circuit 22 from the OR gate G corresponding to that channel, and the desired channel is selected.

Effects As described below, according to the present invention, both the parent device C and the child device M can be displayed on the display means 24 of the child device M. This is especially important when the present invention is used to display information to a large number of people, such as with an electronic display device, and when the parent device C is trying to change the displayed content on a preferential basis. That's true. In a device like this that displays information to a large number of people, it is important to prevent errors in the displayed content. Even if a display error is noticed on the main unit C, the displayed content must be immediately changed or corrected. etc.

Further, according to the present invention, display data for each of various channels can be displayed at a desired time by using the second display channel selection circuit 23,
For example, every hour, on the hour, i.e. 7 o'clock, 8 o'clock, 9 o'clock
The excellent effect of being able to display news display data at any time is achieved.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention, FIG. 2 is a block diagram showing the detailed configuration of this embodiment, and FIG. 3 shows the form of characters created by the character generator 13. 4 is a diagram showing an example of transmission data, FIG. 5 is a diagram for explaining the state in which display data is stored in the memory of the storage circuit 22, and FIG. 6 is a diagram showing an example of the display channel selection circuit 2.
FIG. 7 is a block diagram showing the structure of a display device according to the prior art. 1, 51... Display device, 2, 52... Display data creation section, 3... Child device address selection circuit, 4, 5
3... Transmission circuit, 5... Monitor circuit, 6... Transmission channel selection circuit, 7... Channel data creation circuit, Type... Transmission data creation circuit, 9... Display data creation circuit, 10, 22, 55... ...Memory circuit, 1
1... Channel selection circuit, 12... Display channel designation circuit, 13, 29... Character generator, 14... Monitor channel selection circuit, 21, 5
4... Receiving section, 23, 56... Display channel selection circuit, 24, 57... Display section, 25... Received data creation section, 26... Received data reproducing section, 27...
Display data creation circuit, C... Master device, M1 to Mn...
...Children.

Claims (1)

[Claims for Utility Model Registration] (a) Transmission line l1 common to the parent unit C and multiple slave units M
(b) The parent device C is connected to (b1) a data creation circuit 7 that creates display data for each of a plurality of channels to be transmitted, and (b2) display data for each channel from the data creation circuit 7. A first storage circuit 10 having a first storage area Y that stores , for each channel.
(b3) Monitor 5 for displaying, (b4) Transmission channel selection circuit 6 for selecting the channel of data to be transmitted, (b5) Slave device address for selecting a predetermined address for each slave device M. a selection circuit 3, (b6) a transmission circuit 4 that sends transmission data to the transmission line l1, (b7) a slave address code D1 selected by the slave address selection circuit 3, and a display or transmission channel selection circuit. Instruction codes D2 and D3 representing the channel selected by 6
and a plurality of display codes D4 read from the first storage area Y of the first storage circuit 10 of the selected channel are given to the transmission circuit 4 as one transmission data unit to transmit the transmission data to the transmission line l1. (b8) a first circuit for selecting a channel to be displayed;
a display channel selection circuit 14; (b9) a first character generator 13 that stores character data for displaying a character corresponding to display code D4 on the monitor 5; and (b10) a first display channel selection. In response to the output of the circuit 14, the plurality of display codes D4 stored in the first storage area Y of the channel selected by the first display channel selection circuit 14 of the first storage circuit 10 are read out; (c) Each child device M includes a first display data creation means 9 that reads a character corresponding to the display data D4 from the first character generator 13 and supplies it to the monitor 5 for display. (c2) a second storage circuit 22 having a second storage area S for storing instruction codes D2, D3 and a plurality of display codes D4 for each channel;
(c3) When the slave device address code D1 transmitted from the transmitting circuit 4 via the transmission line l1 matches the address set in the address setting device, the instruction code D2 following the slave device address code D1 is , D3 and the display code D4 as the instruction code D of the second storage circuit 22.
2. Receiving means 21 for storing in the second storage area S corresponding to the channel represented by D3;
26, (c4) a second display channel selection circuit 23, (c4-1) clock means 30 for outputting the current time, and (c4-2) a timer for outputting the time to be displayed for each channel. time setting means 31; (c4-3) comparators E1 and E2 for each channel that output a coincidence signal when the output of the clock means 30 and the output of the timer time setting means 31 for each channel match; c4-4) Direct selection means 3 provided for each channel and directly selecting the channel
2 and (c4-5) an OR which is provided for each channel and derives the coincidence signals of the comparators E1 and E2 and the output of the direct selection means 32.
(c4-6) A second channel for selecting a channel to be displayed in the second storage area S of the second storage circuit 22 according to the outputs of the OR gates G1 and G2.
display channel selection circuit 23; (c5) second storage area S of the channel selected by the second display channel selection circuit 23 of the second storage circuit 22 or selected by the instruction codes D2 and D3; A counter 28 for sequentially selecting a plurality of stored display codes D4 one by one; (c6) A display means 24 for visually displaying; (c7) A character corresponding to the display code is displayed by the display means 24. (c8) a second storage area S of the second storage circuit 22;
second display data creation means for reading character data from the second character generator 29 and supplying it to the display means 24 for display in response to the display code D4 selected by the counter 28 stored in the display code D4; 27. A display device comprising: 27.