JPH0572797B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to an ACC circuit used in a television receiver that digitizes and processes video signals.

BACKGROUND ART AND PROBLEMS There has been proposed a television receiver that processes video signals by digitizing them. In such a case, the so-called ACC detects the average value of the peak values of the burst period of the chroma signal, and controls so that this value becomes a constant value. However, in that case, the average value is obtained for each horizontal period, so
As a result, if ACC is performed sequentially, the image will often be disturbed by the influence of noise and the like. To deal with this, it has been considered to integrate the average value over a predetermined period and perform ACC using this integrated value, but in this case, when the chroma signal level changes significantly at switch-on or channel change, etc. It takes a long time to complete the integration, resulting in the problem of slow pull-in.

OBJECTS OF THE INVENTION In view of these points, the present invention is intended to enable quick retraction and stable operation after retraction.

Summary of the Invention The present invention detects the maximum and minimum values of the burst portion of a digitized chroma signal, and compares this average value with a reference value using a comparator with hysteresis.
The positive and negative values of this comparison are supplied to the control terminal of a reversible counter to count horizontal pulses, and when the average value falls within a predetermined range near the reference value, the average value is integrated for one vertical period, This integral value is compared with the reference value by the comparator with hysteresis, and the positive/negative result of this comparison is supplied to the control terminal of the reversible counter to count vertical pulses, and this count value is fed back to the chroma signal. This is an ACC circuit that performs multiplication, and with this, the pull-in is quick and the operation after the pull-in is stable.

Embodiment In the figure, reference numeral 1 denotes an input terminal to which a chroma signal digitized with, for example, 8 bits is supplied, and a signal from this input terminal 1 is taken out through a multiplier circuit 2 to an output terminal 3. This multiplication circuit 2
The output signal is supplied to a detection circuit 4 which detects the maximum and minimum peak values of the burst period. The average value of the detected values is supplied to a hysteretic comparator 6 through one contact of the switch 5 and compared with a reference value co-fed to the input terminal 7. The positive or negative result of this comparison is supplied to the control terminal of the reversible counter 8. Further, the horizontal pulse supplied to the input terminal 9 is supplied to the clock terminal of the reversible counter 8 through one contact of the switch 10. Further, the detected value from the detection circuit 4 is supplied to an integrating circuit 11 for one vertical period, and this integrated value is supplied to the other contact of the switch 5. The vertical pulse supplied to input terminal 12 is also supplied to the other contact of switch 10. Furthermore, when the average value from the above-mentioned detection circuit 4 falls within a predetermined range near the reference value in the comparator 6, the switches 5 and 10 are switched to the other contact point. Then, the count value of counter 8 is
is supplied to

In this circuit, when the input terminal of the comparator 6 is larger than the reference value, the reversible counter 8 is set to the subtraction mode, and when it is smaller, the reversible counter 8 is set to the addition mode, thereby providing feedback so that the level of the average value of the burst period approaches the reference value. ACC is performed.

In this circuit, until the average value from the detection circuit 4 becomes close to the reference value, comparison is performed based on the average value, and the counter 8 is added or subtracted for each horizontal pulse, and when the value falls within a predetermined range near the reference value, A comparison is made based on the integral value of the vertical period, and the counter 8 is added or subtracted for each vertical pulse.

Therefore, during the pull-in, the drive is performed in the horizontal period, and the pull-in is performed extremely quickly, and after the pull-in, the vertical period is integrated, resulting in stable operation.

Effects of the Invention According to the present invention, the retraction is quick and the operation after the retraction is stable.

[Brief explanation of drawings]

The figure is a configuration diagram of an example of the present invention. 1 is an input terminal, 2 is a multiplication circuit, 3 is an output terminal,
4 is a burst peak value detection circuit, 6 is a comparator with hysteresis, 7 is a reference value input terminal, 8 is a reversible counter, 9 is a horizontal pulse input terminal, 11 is an integration circuit for one vertical period, and 12 is a vertical pulse input terminal. This is an input terminal.

Claims (1)

[Claims] 1 The signal from the input terminal 1 is taken out to the output terminal 3 through the multiplication circuit 2, and the output signal of this multiplication circuit 2 is supplied to the detection circuit 4 that detects the maximum and minimum peak values of the burst period. The average value of the values is supplied to a comparator 6 with hysteresis through one contact of the switch 5, and is input to an input terminal 7.
The positive or negative result of this comparison is supplied to the control terminal of the reversible counter 8, and the horizontal pulse supplied to the input terminal 9 is supplied to the clock terminal of the reversible counter 8 through one contact of the switch 10. The detection value from the detection circuit 4 is supplied to the integration circuit 11 for one vertical period, this integral value is supplied to the other contact of the switch 5, and the vertical pulse supplied to the input terminal 12 is supplied to the switch 10.
When the comparator 6 detects that the average value from the detection circuit 4 falls within a predetermined range near the reference value, the switches 5 and 10 are switched to the other contact, and the counter In the ACC circuit in which the count value of 8 is supplied to the multiplication circuit 2,
An ACC circuit in which a reversible counter 8 is set in a subtraction mode when the input signal of a comparator 6 is larger than a reference value, and set in an addition mode when it is smaller.