JPH0574858A - Circuit board for flip-chip bonding use - Google Patents
Circuit board for flip-chip bonding useInfo
- Publication number
- JPH0574858A JPH0574858A JP3267024A JP26702491A JPH0574858A JP H0574858 A JPH0574858 A JP H0574858A JP 3267024 A JP3267024 A JP 3267024A JP 26702491 A JP26702491 A JP 26702491A JP H0574858 A JPH0574858 A JP H0574858A
- Authority
- JP
- Japan
- Prior art keywords
- circuit board
- flip
- chip bonding
- connection pad
- lead wire
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistors
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3431—Leadless components
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/072—Connecting or disconnecting of bump connectors
- H10W72/07251—Connecting or disconnecting of bump connectors characterised by changes in properties of the bump connectors during connecting
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
Landscapes
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Wire Bonding (AREA)
Abstract
(57)【要約】
【目的】 高い形成技術が要求される半田ダムを形成す
ることなしに、周囲の導電パターンに悪影響を与えるこ
とがなく、しかも製造工程の簡略化が可能になるととも
に、より狭い接続ピッチの半導体チップにも対応可能と
する。
【構成】 半導体チップ100 に設けられたバンプ200 が
接続される接続パッド611 と、この接続パッド611 に連
なる引き出し線612 とを有しており、引き出し線612 の
一部にはくびれ部613 が形成されている。
(57) [Abstract] [Purpose] Without forming a solder dam, which requires high formation technology, it does not adversely affect the conductive pattern in the surroundings, and the manufacturing process can be simplified. It is also possible to support semiconductor chips with a narrow connection pitch. [Structure] It has a connection pad 611 to which the bump 200 provided on the semiconductor chip 100 is connected, and a lead wire 612 connected to this connection pad 611, and a constricted portion 613 is formed in a part of the lead wire 612. Has been done.
Description
【０００１】[0001]
【産業上の利用分野】本発明は、フリップチップボンデ
ィングに適した回路基板に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a circuit board suitable for flip chip bonding.
【０００２】[0002]
【従来の技術】従来のこの種の回路基板について図４〜
図６を参照しつつ説明する。パッドに予めバンプ200 が
形成された半導体チップ100 は、回路基板300 に直接ボ
ンディングされる。すなわち、回路基板300 に形成され
た接続パッド311 にバンプ200 を押し当てながら金属ろ
う210 を加熱溶融することにより、前記バンプ200 と接
続パッド311 とを電気的、構造的に接続するのである。
このようにして回路基板300 にボンディングされた半導
体チップ100 は、エポキシ系樹脂等の封止樹脂400 で気
密に封止される。前記バンプ200 の表面には、半田等の
金属ろう210 が予め塗布されている。2. Description of the Related Art A conventional circuit board of this type is shown in FIG.
This will be described with reference to FIG. The semiconductor chip 100 having the bumps 200 previously formed on the pads is directly bonded to the circuit board 300. That is, the bumps 200 are pressed against the connection pads 311 formed on the circuit board 300 while the metal solder 210 is heated and melted, so that the bumps 200 and the connection pads 311 are electrically and structurally connected.
The semiconductor chip 100 bonded to the circuit board 300 in this manner is hermetically sealed with a sealing resin 400 such as an epoxy resin. A metal brazing material 210 such as solder is applied to the surface of the bump 200 in advance.
【０００３】ボンディング時、接続パッド311 に連なっ
た引き出し線312 に金属ろう210 が流れ出して周囲の導
電パターン310 に付着して短絡等の悪影響を与えること
がある（図６参照）。かかる悪影響が生じないように、
接続パッド311 の周囲には半田ダム500 が形成される。
この半田ダム500 とは、前記金属ろう210 に濡れない絶
縁性薄膜であって、接続パッド311 以外の部分、すなわ
ち金属ろう210 が付着してはならない部分に形成される
ものをいう。かかる半田ダム500 がなければ、図６に示
すように、金属ろう210 が流れ出して周囲の導電パター
ン310 に付着してしまうため、接続パッド311 とバンプ
200 の電気的・機械的接続が十分得られない。At the time of bonding, the metal braze 210 may flow out to the lead wire 312 connected to the connection pad 311 and adhere to the surrounding conductive pattern 310 to give a bad effect such as a short circuit (see FIG. 6). To prevent such adverse effects,
A solder dam 500 is formed around the connection pad 311.
The solder dam 500 is an insulating thin film that does not wet the metal braze 210 and is formed on a portion other than the connection pads 311; that is, a portion to which the metal braze 210 should not adhere. Without such a solder dam 500, as shown in FIG. 6, the metal solder 210 flows out and adheres to the surrounding conductive pattern 310, so that the connection pad 311 and bump
Not enough 200 electrical and mechanical connections.
【０００４】[0004]
【発明が解決しようとする課題】しかしながら、上述し
た従来のフリップチップボンディング用回路基板には以
下のような問題点がある。すなわち、半田ダムの形成に
は、回路基板に形成される接続パッドと、半田ダムの開
口部とを高精度に位置合わせしなければならないため、
接続パッドのピッチが狭くなった場合に高い形成技術が
要求される。これは、高密度実装が進むほど強く要求さ
れるようになる。However, the above-mentioned conventional circuit board for flip chip bonding has the following problems. That is, in order to form the solder dam, the connection pad formed on the circuit board and the opening of the solder dam must be aligned with high precision.
A high forming technique is required when the pitch of the connection pads becomes narrow. This will be strongly demanded as high-density packaging progresses.
【０００５】本発明は、高い形成技術が要求される半田
ダムを形成することなしに、周囲の導電パターンに悪影
響を与えることがなく、しかも製造工程の簡略化が可能
になるとともに、より狭い接続ピッチの半導体チップに
も対応することができるフリップチップボンディング用
回路基板を提供することを目的としている。The present invention does not adversely affect the surrounding conductive pattern without forming a solder dam, which requires a high forming technique, and enables simplification of the manufacturing process, and a narrower connection. It is an object of the present invention to provide a flip-chip bonding circuit board that can be applied to pitch semiconductor chips.
【０００６】[0006]
【課題を解決するための手段】本発明に係るフリップチ
ップボンディング用回路基板は、半導体チップに設けら
れたバンプが接続される接続パッドと、この接続パッド
に連なる引き出し線とを有しており、前記引き出し線の
一部にはくびれ部が形成されている。A flip-chip bonding circuit board according to the present invention has a connection pad to which a bump provided on a semiconductor chip is connected, and a lead wire connected to the connection pad. A constriction is formed in a part of the lead line.
【０００７】[0007]
【実施例】図１は本発明の一実施例に係るフリップチッ
プボンディング用回路基板の模式図、図２は他の実施例
に係るフリップチップボンディング用回路基板の模式
図、図３は本発明に係るフリップチップボンディング用
回路基板にフリップチップボンディングを行った場合の
模式的側面図である。1 is a schematic view of a flip-chip bonding circuit board according to an embodiment of the present invention, FIG. 2 is a schematic view of a flip-chip bonding circuit board according to another embodiment, and FIG. 3 is a schematic view of the present invention. It is a typical side view when flip-chip bonding is performed on the flip-chip bonding circuit board.
【０００８】本実施例に係るフリップチップボンディン
グ用回路基板600 は、半導体チップ100 に設けられたバ
ンプ200 が接続される接続パッド611 と、この接続パッ
ド611 に連なる引き出し線612 とを有しており、前記引
き出し線612 の一部にはくびれ部613 が形成されてい
る。The flip-chip bonding circuit board 600 according to the present embodiment has a connection pad 611 to which the bump 200 provided on the semiconductor chip 100 is connected, and a lead wire 612 connected to this connection pad 611. A constricted portion 613 is formed on a part of the lead wire 612.
【０００９】このフリップチップボンディング用回路基
板600 は、材質、形状等は通常のものとなんらかわりな
く、所定の導電パターン610 が形成されている。この導
電パターン610 のうち、先端に円型の接続パッド611 が
形成されたもの、すなわち前記引き出し線612 に相当す
るものにはくびれ部613 が形成されている。このくびれ
部613 は、引き出し線612 の一部が細く形成されること
によって形作られている。The circuit board 600 for flip chip bonding has a predetermined conductive pattern 610 regardless of its material, shape, etc. A constricted portion 613 is formed in a portion of the conductive pattern 610 having a circular connection pad 611 formed at the tip thereof, that is, a portion corresponding to the lead wire 612. The constricted portion 613 is formed by forming a part of the lead wire 612 to be thin.
【００１０】接続パッド611 に、半導体チップ100 のバ
ンプ200 を押し当て加熱すると、引き出し線612 に沿っ
てバンプ200 に塗布された金属ろう210 が流れだす。し
かし、くびれ部613 にまで来た金属ろう210 は、金属ろ
う210 の表面張力によりそれ以上は流出しなくなる。When the bump 200 of the semiconductor chip 100 is pressed against the connection pad 611 and heated, the metal solder 210 applied to the bump 200 starts to flow along the lead wire 612. However, the metal brazing 210 reaching the constricted portion 613 cannot flow out any more due to the surface tension of the metal brazing 210.
【００１１】なお、上述した実施例では、接続パッド61
1 は円型としたが、半導体チップ100 のバンプ200 の大
きさ等の諸条件によっては、図２に示すような形状、す
なわち引き出し線612 と同じ太さのものであってもよ
い。In the above embodiment, the connection pad 61
Although 1 has a circular shape, it may have a shape as shown in FIG. 2, that is, the same thickness as the lead wire 612, depending on various conditions such as the size of the bump 200 of the semiconductor chip 100.
【００１２】[0012]
【発明の効果】本発明に係るフリップチップボンディン
グ用回路基板は、半導体チップに設けられたバンプが接
続される接続パッドと、この接続パッドに連なる引き出
し線とを有しており、前記引き出し線の一部にはくびれ
部が形成されているので、ボンディング時に流れ出した
金属ろうはくびれ部において流出が阻止される。このた
め、従来のように半田ダムが不要になるので、フリップ
チップボンディング用回路基板の製造工程の簡略化が可
能になるとともに、より狭い接続ピッチの半導体チップ
にも対応することができる。The flip-chip bonding circuit board according to the present invention has the connection pads to which the bumps provided on the semiconductor chip are connected, and the lead lines connected to the connection pads. Since the constricted part is formed in a part, the metal braze that has flowed out at the time of bonding is prevented from flowing out at the constricted part. Therefore, unlike the conventional case, a solder dam is not required, so that the manufacturing process of the flip-chip bonding circuit board can be simplified and a semiconductor chip having a narrower connection pitch can be dealt with.
【図１】本発明の一実施例に係るフリップチップボンデ
ィング用回路基板の模式図である。FIG. 1 is a schematic view of a flip-chip bonding circuit board according to an embodiment of the present invention.
【図２】他の実施例に係るフリップチップボンディング
用回路基板の模式図である。FIG. 2 is a schematic view of a flip-chip bonding circuit board according to another embodiment.
【図３】本発明に係るフリップチップボンディング用回
路基板にフリップチップボンディングを行った場合の模
式的側面図である。FIG. 3 is a schematic side view when flip-chip bonding is performed on the flip-chip bonding circuit board according to the present invention.
【図４】従来の回路基板にフリップチップボンディング
を行った場合の模式的側面図である。FIG. 4 is a schematic side view when flip chip bonding is performed on a conventional circuit board.
【図５】半導体チップのバンプと金属ろうとの関係を示
す側面図である。FIG. 5 is a side view showing the relationship between the bumps of the semiconductor chip and the brazing metal.
【図６】半田ダムがない回路基板にフリップチップボン
ディングを行った場合の模式的側面図である。FIG. 6 is a schematic side view when flip-chip bonding is performed on a circuit board having no solder dam.
100 半導体チップ 200 バンプ 600 フリップチップボンディング用回路基板 610 導電パターン 611 接続パッド 612 引き出し線 613 くびれ部 100 Semiconductor chip 200 Bump 600 Circuit board for flip chip bonding 610 Conductive pattern 611 Connection pad 612 Lead wire 613 Constriction
Claims (1)
される接続パッドと、この接続パッドに連なる引き出し
線とを具備しており、前記引き出し線の一部にはくびれ
部が形成されていることを特徴とするフリップチップボ
ンディング用回路基板。1. A semiconductor device comprising: a connection pad to which a bump provided on a semiconductor chip is connected; and a lead wire connected to the connection pad, and a constricted portion is formed in a part of the lead wire. A circuit board for flip chip bonding, which is characterized by:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3267024A JPH0574858A (en) | 1991-09-17 | 1991-09-17 | Circuit board for flip-chip bonding use |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3267024A JPH0574858A (en) | 1991-09-17 | 1991-09-17 | Circuit board for flip-chip bonding use |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0574858A true JPH0574858A (en) | 1993-03-26 |
Family
ID=17438998
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3267024A Pending JPH0574858A (en) | 1991-09-17 | 1991-09-17 | Circuit board for flip-chip bonding use |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0574858A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2010010611A (en) * | 2008-06-30 | 2010-01-14 | Toshiba Corp | Printed circuit board and electronic equipment |
-
1991
- 1991-09-17 JP JP3267024A patent/JPH0574858A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2010010611A (en) * | 2008-06-30 | 2010-01-14 | Toshiba Corp | Printed circuit board and electronic equipment |
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