JPH0612821B2 - Semiconductor device - Google Patents

Description

The present invention relates to the structure of a novel semiconductor device capable of high speed operation.

MOS (Metal Oxide Semi) is one of the active semiconductor devices.
conductor) transistor, it is widely used as a constituent element of an integrated circuit because of its simple structure and relatively simple manufacturing process, and the size of the element is reduced in order to make the integrated circuit highly integrated. In addition, the speed of operation is being measured.

FIG. 1 is a schematic diagram for explaining the schematic structure and operation of a conventional MOS transistor. In FIG. 1, 1 is a semiconductor substrate having one conductivity type, 2 is an impurity-containing region having a second conductivity type different from the substrate 1, and 3 is an impurity-containing region 2.
Impurity containing regions having the same conductivity type as 4 are insulating films formed on the substrate 1, and 5 are gate electrodes. In the expression in the electric circuit, the impurity-containing region 2 is called a source, the impurity-containing region 3 is called a drain electrode, and 5 is called a gate electrode.

The operation of this MOS transistor using the P type semiconductor substrate 1 will be described below. The substrate 1 and the source 2 are set to zero potential, and a positive voltage is applied to the drain 3.
Now, if a negative voltage is applied to the gate 5 so that the inversion layer is not formed on the substrate surface, most of the electrons, which are majority carriers in the source and drain, exist on the surface of the semiconductor substrate 1 between the source 2 and the drain 3. Therefore, no current flows between the source 2 and the drain 3. Now,
When a positive voltage above the threshold is applied to the gate 5 to form an inversion layer on the surface of the substrate, a large number of electrons are present in the inversion layer, so that a current flows due to the movement of electrons between the source 2 and the drain. However, these two states do not change stepwise, but when the gate voltage is near the threshold value, a weak inversion layer is formed on the substrate surface, and the inversion layer is formed between the source 2 and the drain 3. A current (drain current) limited to the number of electrons inside flows. Thus, there is a weak inversion region in which the drain current changes with the change of the gate voltage.

The second is the weak inversion characteristic of the drain current (log Ib) with respect to the gate voltage (V _G ) of the conventional structure MOS transistor. In FIG. 2, the solid line is the characteristic of the conventional structure MOS transistor, the dotted line is the characteristic of the ideal switching transistor,
a is a region where a leak current flows at the junction of the source 2 and the drain 3, b is a weak inversion region, V _T is a threshold voltage,
c is a strong inversion region in which an inversion layer through which a large drain current can flow is formed. Only two regions a and c are used for the switching operation, and b is essentially unnecessary.
However, it is practically difficult to remove it. MO
When the S transistor is miniaturized and the operating voltage becomes low,
Since the transition region b is not narrowed, the operation margin of each region of a and c is narrowed. Therefore, it is extremely effective if the characteristic (dotted line) without the transition region can be realized.

The present invention eliminates the drawbacks of the conventional MOS transistor and provides a new semiconductor device based on a new operation principle that enables high-speed operation and high density.

The gist thereof is that a semiconductor substrate, a first degenerate high-concentration impurity-containing region that is provided on a part of the surface of the semiconductor substrate, has the same conductivity type as the substrate, and has a sharp impurity distribution at the junction with the substrate; A second degenerate high-concentration impurity-containing region that is provided on another part of the substrate surface and has a second conductivity type different from that of the substrate and has a steep impurity distribution at the junction with the substrate; A high-concentration carrier region formed on the surface of the semiconductor substrate below the gate electrode, and a gate electrode provided on the entire semiconductor substrate between the second degenerated high-concentration impurity-containing region and an insulating film. A semiconductor device for controlling a tunnel current between the first or second degenerate high-concentration impurity-containing regions. In this semiconductor device, depending on the voltage applied to the gate electrode, the first and second
It is possible to control the tunnel current flowing between the high-concentration impurity region and the high-concentration impurity region, and to realize the characteristic that the conventional structure does not have the fiber region.

Hereinafter, the operating principle of the present invention will be described in detail with reference to the accompanying drawings.

FIG. 3 is a schematic sectional view showing an embodiment of the present invention. In FIG. 3, those having the same numbers as in FIG. 1 are equivalent to those in FIG. 1 and show the same functions. 11 is a substrate having one conductivity type, 12 is a first degenerate high-concentration impurity-containing region having the same conductivity as the substrate 11, and 13 is a second conductivity type different from the high-concentration impurity-containing region 12. The second degenerate high-concentration impurity-containing region has. Two degenerated high-concentration impurity-containing regions 12 and 13
It is desirable that the impurity concentration at the junction with the substrate 1 of 1 × 10 ¹⁹ cm ⁻³ or more and the distribution thereof be stepwise. This is not easy to realize, but when arsenic having a small diffusion constant is ion-implanted on the surface of the substrate 1 to form a junction, this condition is almost satisfied if the surface concentration is 1 × 10 ²¹ cm ⁻³ and the junction depth is 0.3 μm. Be satisfied. The two degenerated high-concentration impurity-containing regions 12 and 13 are called a source and a drain, respectively.

The operation of this new semiconductor device using the P type semiconductor substrate 11 is as follows. Regarding the bias voltage (drain voltage) between the source 12 and the drain 13, the source 12 has a zero potential and the drain 13 has a positive voltage so that the pn junction has a reverse bias. It should be noted that the substrate 1 has no electrodes connected thereto, but its potential is almost determined by the potential of the source 12. Now, assuming that the absolute value of the voltage of the gate electrode 5 is small and the high-concentration carrier region of the accumulation layer or the inversion layer is not formed on the substrate surface, a thick depletion layer is formed in the pn ⁺ junction between the substrate 11 and the drain 13. Are formed in the substrate 11 so that the source 12 and drain
A current (drain current) does not flow between 13's. On the other hand, when a sufficiently large negative voltage is applied to the gate electrode 5 to form a high concentration hole accumulation layer on the substrate surface, the junction between the accumulation layer and the drain 13 on the substrate surface is equivalent to p ⁺ -n ⁺ It becomes a tunnel junction, the depletion layer on the surface hardly spreads, and this junction has a high electric field. When the width of this depletion layer becomes several tens of liters or less, carriers can pass through this depletion layer by a tunnel,
A tunnel current comes to flow between the source 12 and the drain 13. When a voltage higher than the threshold voltage is applied to the gate electrode 5 to form a high-concentration electron inversion layer on the substrate surface, the inversion layer and the drain 13 are connected, and the junction on the substrate surface is the source 12 and the inversion. An equivalent p ⁺ + n ⁺ tunnel junction is formed between the layer and the layer, and the depletion layer on the surface hardly spreads, and this junction has a high electric field. As a result,
At the junction, a carrier tunnel occurs as in the junction between the storage layer and the drain 13 described above, and the source 12 and the drain 13 are tunneled.
The tunnel current comes to flow between. In this way, the drain current can be controlled by the gate voltage.

Since the present invention is based on such a principle, no current flows until carrier tunneling occurs, and there is no weak inversion region as shown in FIG. 2b, which is close to the ideal characteristic (dotted line) in FIG. The characteristics are obtained. However, since the semiconductor device according to the present invention does not have a mechanism for limiting the current in the conductive state of the element, it is desirable to insert a resistor for limiting the current or a special-priced resistor for the active device in series.

The novel semiconductor device according to the present invention has a possibility of achieving miniaturization and high speed, but has some other features which are not present in the conventional active semiconductor device. The first is that the operation is bipolar with respect to the gate voltage, the second is that it can be formed in the same process regardless of the conductivity type of the substrate, and the third is that the drain current flows due to the tunnel effect, so the drain voltage The characteristic of the drain current with respect to is that it is a non-saturation characteristic.

Although the structure and operation of the novel semiconductor device according to the present invention have been described above using the p-type substrate, it is obvious that the same can be realized when the substrate is an n-type. Also,
It is also clear that the novel semiconductor device according to the present invention can be realized by using a thin film or thick film semiconductor instead of the semiconductor substrate.

[Brief description of drawings]

FIG. 1 is a schematic view of a conventional structure MOS transistor,
1 is a semiconductor substrate having one conductivity type, 2 is an impurity-containing region having a second conductivity type different from that of the substrate 1, 3 is an impurity-containing region having the same polarity as the impurity-containing region 2, and 4 is a substrate 1. The insulating films 5 formed on the gate electrodes are gate electrodes. FIG. 2 shows the weak inversion characteristic of the drain current with respect to the drain voltage of the conventional structure MOS transistor, the solid line shows the characteristic of the conventional structure MOS transistor, the dotted line shows the characteristic of the ideal switching transistor, and a is the junction leak current of the source and drain. A flowing region, b is a weak inversion region, V _T is a threshold voltage, and c is a strong inversion region. FIG. 3 is a schematic cross-sectional view showing an embodiment of the present invention, in which the same numbers in FIG. 1 are equivalent and show the same function, 11 is a substrate having one conductivity type, 12 is the same as the substrate. A first degenerate high-concentration impurity-containing region having a conductivity type, and 13 is a second degenerate high-concentration impurity-containing region having a second conductivity type different from the high-concentration impurity-containing region 12.

Claims (1)

[Claims] 1. A semiconductor substrate, a first degenerate high-concentration impurity-containing region which is provided on a part of the surface of the semiconductor substrate, has the same conductivity type as the substrate, and has a sharp impurity distribution at the junction with the substrate. A second degenerate high-concentration impurity-containing region, which is provided on another part of the surface of the semiconductor substrate, has a conductivity type opposite to that of the substrate and has a steep impurity distribution at the junction with the substrate, and the first and second degenerate regions. A high-concentration carrier region formed on the surface of the semiconductor substrate below the electrode, and the first or second degenerated region. A semiconductor device characterized by controlling a tunnel current between high-concentration impurity-containing regions.