JPH0636626B2 - Loop detection circuit - Google Patents

Loop detection circuit

Info

Publication number
JPH0636626B2
JPH0636626B2 JP59083549A JP8354984A JPH0636626B2 JP H0636626 B2 JPH0636626 B2 JP H0636626B2 JP 59083549 A JP59083549 A JP 59083549A JP 8354984 A JP8354984 A JP 8354984A JP H0636626 B2 JPH0636626 B2 JP H0636626B2
Authority
JP
Japan
Prior art keywords
current
terminal
voltage
loop detection
loop
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP59083549A
Other languages
Japanese (ja)
Other versions
JPS60226297A (en
Inventor
茂樹 森崎
勇 植木
敏夫 林
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
NTT Inc
Original Assignee
Nippon Telegraph and Telephone Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp, Nippon Electric Co Ltd filed Critical Nippon Telegraph and Telephone Corp
Priority to JP59083549A priority Critical patent/JPH0636626B2/en
Publication of JPS60226297A publication Critical patent/JPS60226297A/en
Publication of JPH0636626B2 publication Critical patent/JPH0636626B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04M—TELEPHONIC COMMUNICATION
    • H04M3/00—Automatic or semi-automatic exchanges
    • H04M3/22—Arrangements for supervision, monitoring or testing
    • H04M3/2272—Subscriber line supervision circuits, e.g. call detection circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Interface Circuits In Exchanges (AREA)

Description

【発明の詳細な説明】 〔発明の属する技術分野〕 本発明は、電話交換機に設けられ、加入者回線のループ
が閉成されたか否かを検出するためのループ検出回路に
関する。Description: TECHNICAL FIELD The present invention relates to a loop detection circuit provided in a telephone exchange for detecting whether or not a loop of a subscriber line is closed.

〔従来技術の説明〕[Description of Prior Art]

第１図は従来例のループ検出回路のブロック構成図であ
る。FIG. 1 is a block diagram of a conventional loop detection circuit.

従来のループ検出回路は、第１図に示すように抵抗Ｒ１
〜Ｒ６、トランジスタＱ１、Ｑ２、演算増幅器ＯＰ１、
ＯＰ２および電源Ｖ11から構成される直流給電部分と、
抵抗Ｒ11〜Ｒ17、ホトダイオードＰＤ１、ＰＤ２、ホト
トランジスタＰＴ１、ＰＴ２、演算増幅器ＯＰ11、ＯＰ
12および電源Ｖ12、Ｖ13、Ｖ14から構成されるループ検
出部分から構成されている。端子Ｔ１、Ｔ２は加入者回
線に接続される端子であり、端子Ｔ３、Ｔ４はループ検
出出力端子であり、線路抵抗ＬＲは加入者回線の線路抵
抗である。電源Ｖ11の電圧を抵抗Ｒ11と抵抗Ｒ12、Ｒ13
とによって分圧して第一の閾値電圧を設定し、抵抗
Ｒ11、Ｒ12と抵抗Ｒ13とによって分圧して第二の閾値電
圧を設定しており、線路抵抗ＬＲの抵抗値が大きく、線
路抵抗ＬＲを流れるループ電流が小さい場合は、地気に
対する端子Ｔ１の電圧が第一の閾値電圧より大きく、演
算増幅器ＯＰ11の出力は地気電位に近くなり、ホトダイ
オードＰＤ１には電流が流れない。同様に、電源Ｖ11に
対する端子Ｔ２の電圧が第二の閾値電圧より小さく、演
算増幅器ＯＰ12の出力は電源Ｖ11の電位に近くなりホト
ダイオードＰＤ２には電流が流れない。したがって、ホ
トトランジスタＰＴ１、ＰＴ２にも電流は流れず、端子
Ｔ３、Ｔ４は電圧Ｖcc（電源Ｖ14の電圧をＶccとす
る。）になる。線路抵抗ＬＲの抵抗値が小さくループ電
流が大きい場合は、地気に対する端子Ｔ１の電圧が第一
の閾値電圧より小さく、演算増幅器ＯＰ11の出力は電源
Ｖ12の電圧に近くなり、ホトダイオードＰＤ１に電流が
流れる。同様に、電源Ｖ11に対する端子Ｔ２の電圧が第
二の閾値電圧より大きく演算増幅器ＯＰ12の出力は電源
Ｖ13の電圧に近くなり、ホトダイオードＰＤ２に電流が
流れる。したがって、ホトトランジスタＰＴ１、ＰＴ２
にも電流が流れ、端子Ｔ３、Ｔ４は地気電位になり、ル
ープ検出出力を送出する。ループ検出出力が端子Ｔ３と
端子Ｔ４とで二種類あるのは、端子Ｔ４における検出出
力は端子Ｔ２が地絡した場合の地絡電流検出のためであ
り、端子Ｔ３における検出出力は端子Ｔ１が電源に混触
した場合の混触電流検出のためである。As shown in FIG. 1, the conventional loop detection circuit has a resistor R 1
~ R 6 , transistors Q 1 and Q 2 , operational amplifier OP 1 ,
A direct-current power supply part composed of OP 2 and power supply V 11 , and
Resistor R 11 to R 17, photodiode PD 1, PD 2, phototransistor PT 1, PT 2, operational amplifier OP 11, OP
And a loop detection portion comprised of 12 and the power source V 12, V 13, V 14 . The terminals T 1 and T 2 are terminals connected to the subscriber line, the terminals T 3 and T 4 are loop detection output terminals, and the line resistance LR is a line resistance of the subscriber line. The voltage of the power source V 11 is set to the resistance R 11 and the resistances R 12 and R 13.
The first threshold voltage is set by dividing by and the second threshold voltage is set by dividing by the resistors R 11 , R 12 and the resistor R 13 , and the line resistance LR has a large resistance value. When the loop current flowing through the resistor LR is small, the voltage of the terminal T 1 with respect to the ground is higher than the first threshold voltage, the output of the operational amplifier OP 11 becomes close to the ground potential, and the current flows through the photodiode PD 1. Absent. Similarly, the voltage of the terminal T 2 with respect to the power source V 11 is smaller than the second threshold voltage, the output of the operational amplifier OP 12 is close to the potential of the power source V 11 , and no current flows through the photodiode PD 2 . Therefore, no current flows through the phototransistors PT 1 and PT 2 , and the terminals T 3 and T 4 become the voltage V cc (the voltage of the power source V 14 is V cc ). When the resistance value of the line resistance LR is small and the loop current is large, the voltage of the terminal T 1 with respect to the ground is smaller than the first threshold voltage, the output of the operational amplifier OP 11 becomes close to the voltage of the power source V 12 , and the photodiode PD A current flows through 1 . Similarly, the voltage of the terminal T 2 with respect to the power supply V 11 is larger than the second threshold voltage, the output of the operational amplifier OP 12 becomes close to the voltage of the power supply V 13 , and a current flows through the photodiode PD 2 . Therefore, the phototransistors PT 1 and PT 2
Also, a current flows through the terminals T 3 and T 4 to the ground potential, and the loop detection output is sent. The loop detection output is two in the terminal T 3 and the terminal T 4, the detection output at terminal T 4 is for ground fault current detection in the case where the terminal T 2 is grounded, the detection output at terminal T 3 Is for detecting a mixed current when the terminal T 1 is mixed with the power supply.

以上ような回路で構成されていたために、演算増幅器が
必要なことから素子数が多く、閾値を設定するための抵
抗の抵抗値が大きいために、集積化に不向きであり、演
算増幅器の電源電流により消費電力が大きく（電源の電
池は−48Ｖであるため）、またホトダイオード、ホトト
ランジスタを使っているために大規模集積化が困難であ
る欠点があった。Since it is composed of the above circuits, the number of elements is large because an operational amplifier is required, and the resistance value of the resistor for setting the threshold value is large, which makes it unsuitable for integration. Therefore, there is a drawback that the power consumption is large (because the battery of the power supply is -48V) and the large scale integration is difficult because the photodiode and the phototransistor are used.

〔発明の目的〕[Object of the Invention]

本発明は、上記欠点を解決し、集積化による小型化に適
し、経済化を図れるループ検出回路を提供することを目
的とする。An object of the present invention is to provide a loop detection circuit that solves the above-mentioned drawbacks, is suitable for miniaturization by integration, and is economical.

〔発明の特徴〕[Characteristics of the Invention]

本発明は、二線式加入者回線を介して端末装置に直流電
流を供給する電流供給回路を備え、この加入者回線のル
ープ閉成の有無を検出するループ検出回路において、上
記電流供給回路により供給される直流電流により発生さ
れる前記加入者回線の端子電圧に比例する電流を出力す
る電圧電流変換手段と、基準電流を出力する基準電流発
生手段と、上記電圧電流変換手段からの出力電流と上記
基準電流発生手段からの基準電流とを入力し、二入力の
差の符号によってループ検出出力を送出する比較手段と
を備え、集積化により小型化、経済化が図れるように構
成されたことを特徴とする。The present invention comprises a current supply circuit for supplying a direct current to a terminal device via a two-wire subscriber line, and in a loop detection circuit for detecting the presence or absence of loop closure of the subscriber line, the current supply circuit Voltage-current conversion means for outputting a current proportional to the terminal voltage of the subscriber line generated by the supplied direct current, reference current generation means for outputting a reference current, and output current from the voltage-current conversion means Comparing means for inputting the reference current from the reference current generating means and sending out a loop detection output according to the sign of the difference between the two inputs, it is possible to achieve miniaturization and economy by integration. Characterize.

〔実施例による説明〕[Explanation by Examples]

本発明の実施例について図面を参照して説明する。第１
図は本発明一実施例ループ検出回路の回路図である。線
路抵抗ＬＲの加入者回線が端子Ｔ１、Ｔ２に接続され
る。端子Ｔ１は抵抗Ｒ１、Ｒ２を介して接地され、端子
Ｔ２は抵抗Ｒ３、Ｒ４を介して電源Ｖ21の「−」側に接
続され、電源Ｖ21の「＋」側は接地される。トランジス
タＱ１のエミッタと演算増幅器ＯＰ１の一方の入力とは
抵抗Ｒ５を介して接地され、抵抗Ｒ１と抵抗Ｒ２との接
続点は上記演算増幅器ＯＰ１の他の入力に接続され、演
算増幅器ＯＰ１の出力はトランジスタＱ１のベースに接
続され、トランジスタＱ１のコレクタは端子Ｔ１に接続
される。また、トランジスタＱ２のエミッタと演算増幅
器ＯＰ２の一方の入力とは抵抗Ｒ６を介して電源Ｖ21の
「−」側に接続され、抵抗Ｒ３と抵抗Ｒ４との接続点は
上記演算増幅器ＯＰ２の他の入力に接続され、演算増幅
器ＯＰ２の出力はトランジスタＱ２のベースに接続さ
れ、トランジスタＱ２のコレクタは端子Ｔ２に接続され
る。Embodiments of the present invention will be described with reference to the drawings. First
The drawing is a circuit diagram of a loop detection circuit according to an embodiment of the present invention. The subscriber line of the line resistance LR is connected to the terminals T 1 and T 2 . The terminal T 1 is grounded via the resistors R 1 and R 2 , the terminal T 2 is connected to the “−” side of the power source V 21 via the resistors R 3 and R 4, and the “+” side of the power source V 21 is Grounded. The emitter of the transistor Q 1 and one input of the operational amplifier OP 1 are grounded via the resistor R 5 , and the connection point between the resistor R 1 and the resistor R 2 is connected to the other input of the operational amplifier OP 1 . the output of the operational amplifier OP 1 is connected to the base of the transistor Q 1, the collector of the transistor Q 1 is connected to the terminal T 1. Further, the emitter of the transistor Q 2 and one input of the operational amplifier OP 2 are connected to the “−” side of the power supply V 21 via the resistor R 6 , and the connection point between the resistor R 3 and the resistor R 4 is the above-mentioned operation. is connected to the other input of the amplifier OP 2, the output of the operational amplifier OP 2 is connected to the base of the transistor Q 2, the collector of the transistor Q 2 is connected to the terminal T 2.

ここに本発明の特徴とするところは、一点鎖線で囲むル
ープ検出部分にある。すなわち、端子Ｔ１は抵抗Ｒ21を
介してカレントミラＣＭ21の第一の端子に接続され、カ
レントミラＣＭ21の第二の端子は接地される。閾値電流
ＩthがカレントミラＣＭ22の第一の端子に入力され、カ
レントミラＣＭ22の第二の端子は電源Ｖ22の「−」側に
接続され、電源Ｖ22の「＋」側は接地される。カレント
ミラＣＭ21、ＣＭ22の第三の端子は共にトランジスタＱ
21のベースに接続される。トランジスタＱ21のエミッタ
は電源Ｖ23の「−」側に接続され、電源Ｖ23の「＋」側
は接地される。電源Ｖ24の「−」側は接地され、電源Ｖ
24の「＋」側は、トランジスタＱ22のエミッタおよび抵
抗Ｒ22、電流リミッタＣＬ１を介してトランジスタＱ21
のコレクタに接続される。抵抗Ｒ22と電流リミッタＣＬ
１との接続点はトランジスタＱ22のベースに接続され、
トランジスタＱ22のコレクタは端子Ｔ３に接続される。
端子Ｔ３は抵抗Ｒ23を介して接地される。The feature of the present invention lies in the loop detection portion surrounded by the alternate long and short dash line. That is, the terminal T 1 is connected to the first terminal of the current mirror CM 21 via the resistor R 21, and the second terminal of the current mirror CM 21 is grounded. The threshold current Ith is input to the first terminal of the current mirror CM 22, the second terminal of the current mirror CM 22 is a power supply V 22 "-" is connected to the side, "+" side of the power source V 22 is grounded It The third terminals of the current mirrors CM 21 and CM 22 are both transistors Q.
Connected to 21 bases. The emitter of the transistor Q 21 is the power source V 23 "-" is connected to the side, "+" side of the power source V 23 is grounded. The “−” side of the power supply V 24 is grounded, and the power supply V 24
The “+” side of 24 is connected to the transistor Q 21 via the emitter of the transistor Q 22 , the resistor R 22 , and the current limiter CL 1.
Connected to the collector. Resistor R 22 and current limiter CL
The connection point with 1 is connected to the base of the transistor Q 22 ,
The collector of the transistor Q 22 is connected to the terminal T 3 .
The terminal T 3 is grounded via the resistor R 23 .

また、端子Ｔ２は抵抗Ｒ24を介してカレントミラＣＭ23
の第一の端子に接続され、カレントミラＣＭ23の第二の
端子は電源Ｖ21の「−」側に接続される。カレントミラ
ＣＭ23の第三の端子はカレントミラＣＭ24の第一の端子
に接続される。閾値電流ＩthがカレントミラＣＭ25の第
一の端子に入力され、カレントミラＣＭ25の第二の端子
は電源Ｖ22の「−」側に接続される。カレントミラＣＭ
24、ＣＭ25の第三の端子は共にトランジスタＱ23のベー
スに接続される。電源Ｖ24の「＋」側がトランジスタＱ
24のエミッタ・カレントミラＣＭ24の第二の端子および
抵抗Ｒ25、電流リミッタＣＬ２を介してトランジスタＱ
23のコレクタに接続される。抵抗Ｒ25と電流リミッタＣ
Ｌ２との接続点はトランジスタＱ24のベースに接続さ
れ、トランジスタＱ24のコレクタは端子Ｔ４に接続され
る。端子Ｔ４は抵抗Ｒ26を介して接地される。Further, the terminal T 2 is connected to the current mirror CM 23 via the resistor R 24.
The second terminal of the current mirror CM 23 is connected to the “−” side of the power supply V 21 . The third terminal of the current mirror CM 23 is connected to the first terminal of the current mirror CM 24 . The threshold current Ith is input to the first terminal of the current mirror CM 25, the second terminal of the current mirror CM 25 is a power supply V 22 - are connected to the side "." Current Mira CM
The third terminals of 24 and CM 25 are both connected to the base of the transistor Q 23 . Transistor Q is on the “+” side of power supply V 24
The transistor Q is connected via the second terminal of the 24 emitter current mirror CM 24 , the resistor R 25 and the current limiter CL 2.
Connected to 23 collectors. Resistor R 25 and current limiter C
Connection point of the L 2 is connected to the base of the transistor Q 24, the collector of the transistor Q 24 is connected to the terminal T 4. The terminal T 4 is grounded via the resistor R 26 .

このような構成のループ検出回路の動作について説明す
る。第２図において、線路抵抗ＬＲにループ電流が流れ
ている場合に、地気と端子Ｔ１との電位差をＶ１（この
例では正の値）、端子Ｔ２と電源Ｖ21との電位差をＶ２
（この例では正の値）とし、カレントミラＣＭ21、ＣＭ
23をベース電流ＩＢ補償型のカレントミラとすれば、次
の条件が成立する場合にトランジスタＱ21、Ｑ23はオン
する。The operation of the loop detection circuit having such a configuration will be described. In FIG. 2, when a loop current flows through the line resistance LR, the potential difference between the ground and the terminal T 1 is V 1 (a positive value in this example), and the potential difference between the terminal T 2 and the power source V 21 is V 2
(In this example, a positive value), the current mirror CM 21 , CM
Assuming that 23 is a base current I B compensation type current mirror, the transistors Q 21 and Q 23 are turned on when the following conditions are satisfied.

ここに、ＶBE：ベースエミッタ間電圧 トランジスタＱ21、Ｑ23がオンするとトランジスタ
Ｑ22、Ｑ24がオンし、端子Ｔ３、Ｔ４におけるループ検
出出力は電圧Ｖcc（電源Ｖ24の電圧をＶccとする。）に
なる。条件(1)、(2)が成立しない場合は、トランジスタ
Ｑ22、Ｑ24はオフしているために、端子Ｔ３、Ｔ４にお
けるループ検出出力は地気電位となる。端子Ｔ１が電源
に混触した場合の混触電流検出のためおよび端子Ｔ２が
地気に地絡した場合の地絡電流検出のためにループ検出
出力が端子Ｔ３と端子Ｔ４との二種類ある。また、カレ
ントミラＣＭ22、ＣＭ25の閾値電流Ｉthの値を変えるこ
とによって容易にループ検出閾値を変えることができ
る。 V BE : Base-emitter voltage When the transistors Q 21 and Q 23 are turned on, the transistors Q 22 and Q 24 are turned on, and the loop detection outputs at the terminals T 3 and T 4 are the voltage V cc (voltage of the power source V 24 V cc ). Condition (1), if not satisfied (2), in order to transistors Q 22, Q 24 are turned off, the loop detection output at terminal T 3, T 4 becomes earthed potential. There are two types of loop detection outputs, that is, a terminal T 3 and a terminal T 4 for detecting a contact current when the terminal T 1 is in contact with a power source and for detecting a ground fault current when the terminal T 2 is grounded. is there. Further, the loop detection threshold can be easily changed by changing the value of the threshold current Ith of the current mirrors CM 22 and CM 25 .

〔発明の効果〕 本発明は、以上説明したように、加入者回線の電圧に比
例して電流変換し、この電流値と基準電流源の電流とを
比較し、両者の差の符号によってループ検出する構成に
することにより、ホトカプラを含まず、しかも演算増幅
器などの素子数を少なくして、大規模集積化することが
でき、装置の小型化、経済化が図れる優れた効果があ
る。As described above, the present invention performs current conversion in proportion to the voltage of the subscriber line, compares the current value with the current of the reference current source, and detects the loop by the sign of the difference between the two. With such a configuration, a photo coupler is not included, the number of elements such as an operational amplifier can be reduced, and large-scale integration can be achieved. Therefore, there is an excellent effect that the device can be downsized and economical.

【図面の簡単な説明】[Brief description of drawings]

第１図は従来のループ検出回路の回路図。 第２図は本発明一実施例ループ検出回路の回路図。 ＣＬ…電流リミッタ、ＣＭ…カレントミラ、ＯＰ…演算
増幅器、ＰＤ…ホトダイオード、ＰＴ…ホトトランジス
タ、Ｑ…トランジスタ、Ｒ…抵抗、Ｔ…端子、Ｖ…電
源。FIG. 1 is a circuit diagram of a conventional loop detection circuit. FIG. 2 is a circuit diagram of a loop detection circuit according to an embodiment of the present invention. CL ... Current limiter, CM ... Current mirror, OP ... Operational amplifier, PD ... Photodiode, PT ... Phototransistor, Q ... Transistor, R ... Resistor, T ... Terminal, V ... Power supply.

Claims (1)

【特許請求の範囲】[Claims] 【請求項１】二線式加入者回線を介して端末装置に直流
電流を供給する電流供給回路を備え、この加入者回線の
ループ閉成の有無を検出するループ検出回路において、 上記電流供給回路により供給される直流電流により発生
される前記加入者回線の一方の端子と地気との間の電圧
に比例する電流を出力する第一の電圧電流変換手段と、 地気側の検出しきい値となる基準電流を出力する第一の
基準電流発生手段と、 前記第一の電圧電流変換手段からの出力電流と前記第一
の基準電流発生手段からの基準電流とを入力し、その二
つの電流の差を検出して地気側ループ検出出力を送出す
る第一の比較手段と、 上記電流供給回路により供給される直流電流により発生
される前記加入者回線の他方の端子と電源との間の電圧
に比例する電流を出力する第二の電圧電流変換手段と、 電源側の検出しきい値となる基準電流を出力する第二の
基準電流発生手段と、 上記第二の電圧電流変換手段からの出力電流と上記第二
の基準電流発生手段からの基準電流とを入力し、その二
つの電流の差を検出して電源側ループ検出出力を送出す
る第二の比較手段と を備えたことを特徴とするループ検出回路。1. A loop detection circuit comprising a current supply circuit for supplying a direct current to a terminal device through a two-wire subscriber line, the loop detection circuit detecting whether or not a loop of the subscriber line is closed. First voltage-current converting means for outputting a current proportional to the voltage between one terminal of the subscriber line and the ground generated by the DC current supplied by the A first reference current generating means for outputting a reference current, and an output current from the first voltage-current converting means and a reference current from the first reference current generating means are input, and the two currents Between the power supply and the other terminal of the subscriber line generated by the direct current supplied by the current supply circuit. Outputs current proportional to voltage Second voltage-current converting means, second reference current generating means for outputting a reference current serving as a detection threshold value on the power supply side, output current from the second voltage-current converting means, and the second reference current And a reference current from the current generating means, a second comparing means for detecting a difference between the two currents and transmitting a loop detection output on the power supply side, the loop detecting circuit.
JP59083549A 1984-04-24 1984-04-24 Loop detection circuit Expired - Lifetime JPH0636626B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59083549A JPH0636626B2 (en) 1984-04-24 1984-04-24 Loop detection circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59083549A JPH0636626B2 (en) 1984-04-24 1984-04-24 Loop detection circuit

Publications (2)

Publication Number Publication Date
JPS60226297A JPS60226297A (en) 1985-11-11
JPH0636626B2 true JPH0636626B2 (en) 1994-05-11

Family

ID=13805586

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59083549A Expired - Lifetime JPH0636626B2 (en) 1984-04-24 1984-04-24 Loop detection circuit

Country Status (1)

Country Link
JP (1) JPH0636626B2 (en)

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5941627B2 (en) * 1979-10-11 1984-10-08 沖電気工業株式会社 Subscriber line interface circuit
JPS5868394A (en) * 1981-10-19 1983-04-23 Fujitsu Ltd Line scanning circuit
JPS5921192A (en) * 1982-07-27 1984-02-03 Nippon Telegr & Teleph Corp <Ntt> Monitor circuit for state of subscriber line

Also Published As

Publication number Publication date
JPS60226297A (en) 1985-11-11

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