JPH065485A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPH065485A JPH065485A JP16050292A JP16050292A JPH065485A JP H065485 A JPH065485 A JP H065485A JP 16050292 A JP16050292 A JP 16050292A JP 16050292 A JP16050292 A JP 16050292A JP H065485 A JPH065485 A JP H065485A
- Authority
- JP
- Japan
- Prior art keywords
- wafer substrate
- internal stress
- semiconductor device
- wafer
- curved
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
Abstract
(57)【要約】
【目的】 デバイス形成時の内部応力を緩和する。
【構成】 1は半導体装置を構成するウェハ基板で、こ
のウェハ基板1上にデバイスが形成される。このウェハ
基板1はウェハ基板1表面に対してのデバイスの内部応
力に応じて予め湾曲形成されている。すなわち、デバイ
スに圧縮方向の内部応力がある場合には、ウェハ基板1
を予め図1(a)のように湾曲させる。また、デバイス
に引張方向の内部応力がある場合には、ウェハ基板1を
予め図1(b)のように湾曲させる。また、内部応力が
ない場合には、図1(c)のように平坦状にしておく。
これにより、内部応力は湾曲部によって矯正される。
(57) [Summary] [Purpose] To alleviate internal stress during device formation. [Structure] 1 is a wafer substrate which constitutes a semiconductor device, and devices are formed on the wafer substrate 1. This wafer substrate 1 is formed in advance according to the internal stress of the device with respect to the surface of the wafer substrate 1. That is, when the device has internal stress in the compression direction, the wafer substrate 1
Is curved in advance as shown in FIG. When the device has internal stress in the tensile direction, the wafer substrate 1 is curved in advance as shown in FIG. If there is no internal stress, it is flattened as shown in FIG.
Thereby, the internal stress is corrected by the curved portion.
Description
【0001】[0001]
【産業上の利用分野】本発明は、半導体装置の製造方法
に関し、特にウェハの製造方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device manufacturing method, and more particularly to a wafer manufacturing method.
【0002】[0002]
【従来の技術】図5は従来の半導体装置のウェハの全体
斜視図、図6は従来の半導体装置の全体斜視図である。
これらの図において、1はウェハ基板で、図5(a)〜
(c)に示すように製造過程において湾曲方向および湾
曲率が種々にばらついている。2はウェハ基板1上に形
成された薄膜である。なお、図中矢印はウェハ基板1の
湾曲方向を示している。2. Description of the Related Art FIG. 5 is an overall perspective view of a conventional semiconductor device wafer, and FIG. 6 is an overall perspective view of a conventional semiconductor device.
In these figures, 1 is a wafer substrate, which is shown in FIG.
As shown in (c), the bending direction and the bending rate are variously varied in the manufacturing process. Reference numeral 2 is a thin film formed on the wafer substrate 1. In addition, the arrow in the figure indicates the bending direction of the wafer substrate 1.
【0003】次に、これら湾曲方向および湾曲率が種々
にばらついているウェハ基板1上に、内部応力が異なる
薄膜2を形成した場合を説明する。まず、薄膜2の内部
応力がウェハ基板1の表面に対して圧縮方向の薄膜2を
ウェハ基板1上に形成すると、図5(a)、(b)、
(c)のように湾曲していたウェハ基板1は図6
(c)、(e)、(b)に示すように変形する。この場
合、薄膜2の内部応力が強いほど、ウェハ基板1の湾曲
は(e)に示す方向となる。次に、薄膜2の内部応力が
ウェハ基板1の表面に対して引張方向の薄膜2をウェハ
基板1上に形成すると、図5(a)、(b)、(c)の
ように湾曲していたウェハ基板1は図6(d)、
(c)、(a)に示すように変形する。この場合、薄膜
2の内部応力が強いほど、ウェハ基板1の湾曲は(d)
に示す方向となる。Next, a case will be described in which a thin film 2 having different internal stress is formed on a wafer substrate 1 having various variations in the bending direction and the bending rate. First, when the thin film 2 in which the internal stress of the thin film 2 is compressed on the surface of the wafer substrate 1 is formed on the wafer substrate 1, as shown in FIGS.
The wafer substrate 1 which is curved as shown in FIG.
It deforms as shown in (c), (e), and (b). In this case, the stronger the internal stress of the thin film 2, the more the wafer substrate 1 is curved in the direction shown in (e). Next, when the thin film 2 in which the internal stress of the thin film 2 is in the tensile direction with respect to the surface of the wafer substrate 1 is formed on the wafer substrate 1, the thin film 2 is curved as shown in FIGS. The wafer substrate 1 is shown in FIG.
It deforms as shown in (c) and (a). In this case, the stronger the internal stress of the thin film 2 is, the more curved the wafer substrate 1 is (d).
It becomes the direction shown in.
【0004】[0004]
【発明が解決しようとする課題】上記したように、従来
の半導体装置においては、ウェハ基板の湾曲方向および
湾曲率が種々にばらついているために、このウェハ基板
上に内部応力の異なるデバイスを形成すると、ウェハ基
板の湾曲方向および湾曲率は千差万別となり、このため
に露光時のズレを起こしたり、また内部応力が大きいと
きにはクラックが生じる等の問題があった。本発明は上
記した従来の問題点に鑑みてなされたものであり、その
目的とするところは、デバイス形成時におけるデバイス
の内部応力を緩和した半導体装置の製造方法を提供する
ことにある。As described above, in the conventional semiconductor device, since the bending direction and the bending rate of the wafer substrate are variously varied, devices having different internal stresses are formed on the wafer substrate. Then, the bending direction and the bending rate of the wafer substrate are varied, and there is a problem that a deviation occurs at the time of exposure and a crack occurs when the internal stress is large. The present invention has been made in view of the above-mentioned conventional problems, and an object of the present invention is to provide a method for manufacturing a semiconductor device in which internal stress of a device is relaxed during device formation.
【0005】[0005]
【課題を解決するための手段】この目的を達成するため
に、本発明は、ウェハ上にデバイスを形成する半導体装
置の製造方法であって、前記デバイスの内部応力に応じ
て予めこの内部応力を緩和する方向に前記ウェハを湾曲
形成したものである。In order to achieve this object, the present invention is a method for manufacturing a semiconductor device in which a device is formed on a wafer, wherein the internal stress is previously set in accordance with the internal stress of the device. The wafer is curved in a direction of relaxation.
【0006】[0006]
【作用】本発明においては、デバイスの内部応力をウェ
ハの湾曲形成により緩和することにより、ウェハの湾曲
率が常に一定で、かつ小さいものとなる。In the present invention, the internal stress of the device is relieved by the curved formation of the wafer, so that the curvature rate of the wafer is always constant and small.
【0007】[0007]
【実施例】以下、図に基づいて本発明の一実施例を説明
する。図1は本発明に係る半導体装置の製造方法におけ
るウェハ基板の全体斜視図、図2は同じく半導体装置の
全体斜視図、図3は同じくウェハ基板の製造方法を示す
側面図、図4は同じくウェハ基板の製造方法の第2の例
を示す側面図である。本発明の特徴とするところは、ウ
ェハ基板1上に形成するデバイスの内部応力の方向およ
び強さに応じて予めウェハ基板1を一定方向に湾曲させ
た点にある。すなわち、デバイスである薄膜2の内部応
力がウェハ基板1の表面に対して引張方向にある場合に
は、図1(a)に示すような湾曲をウェハ基板1に予め
付与しておく。ウェハ基板1に薄膜2を形成すると、薄
膜2の内部応力はウェハ基板1の湾曲によって緩和され
ると共に、ウェハ基板1の湾曲は薄膜2の内部応力によ
って矯正されて図2に示すように半導体装置は平坦状と
なる。また、薄膜2の内部応力がウェハ基板1の表面に
対して圧縮方向にある場合には、図1(b)に示すよう
な湾曲をウェハ基板1に予め付与しておけば、引張応力
の場合と同様に、半導体装置は図2に示すように平坦状
となる。また、薄膜2に内部応力が発生していない場合
には、ウェハ基板1は図1(c)に示すように平坦状に
形成しておけばよい。An embodiment of the present invention will be described below with reference to the drawings. 1 is an overall perspective view of a wafer substrate in a method for manufacturing a semiconductor device according to the present invention, FIG. 2 is an overall perspective view of the same semiconductor device, FIG. 3 is a side view showing the same method for manufacturing a wafer substrate, and FIG. It is a side view which shows the 2nd example of the manufacturing method of a board | substrate. The feature of the present invention resides in that the wafer substrate 1 is previously curved in a certain direction according to the direction and strength of the internal stress of the device formed on the wafer substrate 1. That is, when the internal stress of the thin film 2 as a device is in the tensile direction with respect to the surface of the wafer substrate 1, the wafer substrate 1 is preliminarily curved as shown in FIG. When the thin film 2 is formed on the wafer substrate 1, the internal stress of the thin film 2 is relieved by the bending of the wafer substrate 1, and the bending of the wafer substrate 1 is corrected by the internal stress of the thin film 2 to form the semiconductor device as shown in FIG. Becomes flat. When the internal stress of the thin film 2 is in the compression direction with respect to the surface of the wafer substrate 1, if the wafer substrate 1 is preliminarily curved as shown in FIG. Similarly, the semiconductor device becomes flat as shown in FIG. If no internal stress is generated in the thin film 2, the wafer substrate 1 may be formed flat as shown in FIG. 1 (c).
【0008】次に、ウェハ基板1の製造方法を説明す
る。図3において、3は一対の圧力板で、この圧力板3
の互いに対向する面には、ある一定で同一の曲率を有す
る圧力面3aが形成されている。圧力板3を加熱して一
対の圧力面3aで、ウェハ基板1を挟み込むことによっ
て、ウェハ基板1を湾曲させることができる。ウェハ基
板1の湾曲率は圧力板3の圧力面3aの曲率によって決
まる。図4はウェハ基板1の製造方法の第2の実施例
で、この実施例では、ある一定で同一の曲率を有する研
磨面4aを有する研磨板4によって、厚みのあるウェハ
基板1を研磨して形成するものである。Next, a method of manufacturing the wafer substrate 1 will be described. In FIG. 3, 3 is a pair of pressure plates.
The pressure surfaces 3a having a certain constant and the same curvature are formed on the surfaces facing each other. By heating the pressure plate 3 and sandwiching the wafer substrate 1 between the pair of pressure surfaces 3 a, the wafer substrate 1 can be curved. The curvature rate of the wafer substrate 1 is determined by the curvature of the pressure surface 3a of the pressure plate 3. FIG. 4 shows a second embodiment of the method for manufacturing the wafer substrate 1. In this embodiment, the thick wafer substrate 1 is polished by the polishing plate 4 having the polishing surface 4a having a certain constant and the same curvature. To form.
【0009】[0009]
【発明の効果】以上説明したように本発明によれば、デ
バイスの内部応力の方向および強さに応じて、この内部
応力を緩和する方向にウェハ基板を予め湾曲させたの
で、デバイスの内部応力はウェハの湾曲形成によって緩
和されることとなり、これにより半導体装置の製造時に
おけるクラック等の発生を防止できる。また、ウェハ基
板の湾曲が内部応力で矯正されることとなり、デバイス
の内部応力の強さに応じてウェハ基板の湾曲率を選択す
れば、ウェハ基板を常に一定の湾曲率で保持でき、この
ため露光時のズレを防止できる効果がある。As described above, according to the present invention, the wafer substrate is preliminarily curved in a direction for relaxing the internal stress of the device according to the direction and strength of the internal stress of the device. Is alleviated by the curved formation of the wafer, which can prevent the occurrence of cracks or the like during the manufacturing of the semiconductor device. In addition, since the curvature of the wafer substrate is corrected by the internal stress, if the curvature ratio of the wafer substrate is selected according to the strength of the internal stress of the device, the wafer substrate can always be kept at a constant curvature ratio. There is an effect of preventing a shift at the time of exposure.
【図面の簡単な説明】[Brief description of drawings]
【図1】本発明に係る半導体装置の製造方法におけるウ
ェハ基板の全体斜視図である。FIG. 1 is an overall perspective view of a wafer substrate in a method of manufacturing a semiconductor device according to the present invention.
【図2】本発明に係る半導体装置の全体斜視図である。FIG. 2 is an overall perspective view of a semiconductor device according to the present invention.
【図3】本発明に係る半導体装置の製造方法におけるウ
ェハの製造方法を示す側面図である。FIG. 3 is a side view showing a method for manufacturing a wafer in the method for manufacturing a semiconductor device according to the present invention.
【図4】本発明に係る半導体装置の製造方法におけるウ
ェハの製造方法の第2の実施例を示す側面図である。FIG. 4 is a side view showing a second embodiment of the wafer manufacturing method in the semiconductor device manufacturing method according to the present invention.
【図5】従来の半導体装置のウェハの全体斜視図であ
る。FIG. 5 is an overall perspective view of a conventional semiconductor device wafer.
【図6】従来の半導体装置の全体斜視図である。FIG. 6 is an overall perspective view of a conventional semiconductor device.
1 ウェハ基板 2 薄膜 3 圧力板 4 研磨板 1 Wafer substrate 2 Thin film 3 Pressure plate 4 Polishing plate
Claims (1)
置の製造方法おいて、前記デバイスの内部応力に応じて
予めこの内部応力を緩和する方向に前記ウェハを湾曲形
成したことを特徴とする半導体装置の製造方法。1. A method of manufacturing a semiconductor device in which a device is formed on a wafer, wherein the wafer is curvedly formed in advance in a direction to alleviate the internal stress of the device according to the internal stress of the device. Manufacturing method.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16050292A JPH065485A (en) | 1992-06-19 | 1992-06-19 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16050292A JPH065485A (en) | 1992-06-19 | 1992-06-19 | Manufacture of semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH065485A true JPH065485A (en) | 1994-01-14 |
Family
ID=15716331
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP16050292A Pending JPH065485A (en) | 1992-06-19 | 1992-06-19 | Manufacture of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH065485A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2009152548A (en) * | 2007-12-24 | 2009-07-09 | Samsung Electro-Mechanics Co Ltd | Chemical vapor deposition wafer and method of manufacturing the same |
| KR101040999B1 (en) * | 2009-08-31 | 2011-06-16 | 신경철 | Swivel Stay Bar |
| CN111343950A (en) * | 2017-11-15 | 2020-06-26 | 史密夫及内修公开有限公司 | Integrated wound monitoring and/or therapy dressing and system implementing sensors |
-
1992
- 1992-06-19 JP JP16050292A patent/JPH065485A/en active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2009152548A (en) * | 2007-12-24 | 2009-07-09 | Samsung Electro-Mechanics Co Ltd | Chemical vapor deposition wafer and method of manufacturing the same |
| KR101040999B1 (en) * | 2009-08-31 | 2011-06-16 | 신경철 | Swivel Stay Bar |
| CN111343950A (en) * | 2017-11-15 | 2020-06-26 | 史密夫及内修公开有限公司 | Integrated wound monitoring and/or therapy dressing and system implementing sensors |
| US11559438B2 (en) | 2017-11-15 | 2023-01-24 | Smith & Nephew Plc | Integrated sensor enabled wound monitoring and/or therapy dressings and systems |
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