JPH065933A - Superconductor device - Google Patents

Abstract

(57) [Summary] [Object] To provide a superconducting device as a new quantum effect device which operates at high temperature, can be easily made into a transistor, and can be easily integrated. [Structure] A quantum effect diode and a transistor are formed by using a junction of an electron conducting type superconductor and a hole conducting type superconductor. Two junctions are formed between the p-type superconductor 202 formed between the n-type superconductors 201 and 203, and a TRS having an npn (or pnp) structure.
Thus, the extraction electrodes of the emitter E, the base B and the collector C are formed respectively. [Effect] It is possible to provide an extremely high-speed superconductor device with almost no delay in transmission.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a superconductor device which is a new electronic device such as a superconductor TRS using a superconductor and a superconductor diode.

[0002]

2. Description of the Related Art Conventionally, as an electronic device using a superconductor, a Josephson device using a tunnel effect has been used.
Son) device.

[0003]

However, according to the above prior art, the Josephson device requires an extremely thin tunnel region (1 to 4 nm),
In addition, there is a problem that it requires an extremely low temperature (1 to 4 K) and it is difficult to realize TRS and its integration.

An object of the present invention is to solve the problems of the prior art and to provide a superconductor device as a new quantum effect device which operates at a high temperature, is easy to be a TRS, and is easy to integrate.

[0005]

In order to solve the above-mentioned problems of the prior art and to achieve the above-mentioned object, the present invention relates to a superconductor device, including (1) an n-type superconductor and a hole-conducting p-type superconductor. And (2) forming a junction with a diode to form a diode, and (2) forming two junctions between an n-type superconductor and a p-type superconductor and forming a bipolar TRS, and ( 3) A unipolar type in which a source region and a drain region and a gate region having a Schottky junction or a pn junction formed in a region sandwiched by the source region and the drain region are formed in an n-type superconductor or a p-type superconductor. And (4) a source region and a drain region in the n-type superconductor or the p-type superconductor, and a dielectric film in a region sandwiched between the source region and the drain region. And a gate electrode is formed on the dielectric film to form a MISFET which is a unipolar type TRS formed as a gate region, and (5) two TRSs and FETs having different polarities are complementary type ( C) and the like.

[0006]

[Function] For oxide-based high-temperature superconductors, p
Type and n-type are available. As a typical example of p-type, yttrium.
There are neodymium-cerium-copper oxide-based ones as a typical n-type of barium-copper oxide-based ones.
Using these high-temperature superconductors, diodes, bipolar TRSs, J-FETs, and MIS Fs can be used in the same manner as semiconductors.
ET can be manufactured, and complementary bipolar TRS and C-MIS FET can be manufactured. These superconductor devices can operate at high temperature (about 30K to 80K) and high speed (0.1ps to 0.5ps). There is a function to work.

[0007]

EXAMPLES The present invention will be described in detail below with reference to examples.

FIG. 1 is a sectional view of a diode showing an embodiment of the present invention. That is, (a) n-type superconductor 10
1 and a p-type superconductor 102 are joined at a joining portion 103 to form a diode, and an n-type superconductor 101 and
FIG. 3 is a principle diagram in which electrodes 104 and 105 for extraction are formed from a p-type superconductor 102. (B) In titanate strontium, molecular beam epitaxy on the surface of the substrate 110 made of sapphire or single crystal silicon or the like (M olecular B eam E pitax
ial: a p-type high temperature oxide superconductor 112 made of an yttrium-value-copper oxide film and an n-type high-temperature oxide superconductor 111 made of an yttrium-value-copper oxide film formed by MBE or the like. Junction 11
A diode having a horizontal structure formed by joining at 3
Reference numerals 115 and 115 are electrodes for extraction which are made of silver or the like. In (c), the n-type high temperature oxide superconductor 121 and the p-type high temperature oxide superconductor 1 are formed on the surface of the substrate 120 by the MBE method.
Reference numeral 22 is a diode having a vertical structure formed by joining at a joining portion 123, and 124 and 125 are electrodes for extraction.

FIG. 2 is a sectional view of a bipolar TRS showing another embodiment of the present invention. That is, (a) the p-type superconductor 20 formed between the n-type superconductors 201 and 203.
It is a TRS having an npn (or pnp) structure in which two junctions are formed between the two, and the extraction electrodes of the emitter E, the base B and the collector C are formed respectively. FIG. In (b), the surface of the substrate 210 has n
Two junctions are formed between the p-type superconductor 212 formed between the p-type superconductors 211 and 213, and npn
A TRS having a (or p-n-p) structure, which is a lateral TRS in which extraction electrodes of an emitter E, a base B, and a collector C are formed. Substrate 22 in (c)
Two joints are formed between the n-type superconductors 221 and 223 and the p-type superconductor 222 formed on the surface of 0,
The TRS has an npn (or pnp) structure, and is a vertical TRS in which extraction electrodes of an emitter E, a base B, and a collector C are formed.

FIG. 3 shows another embodiment of the present invention.
FIG. 6 is a cross-sectional view of a FET. That is, (a) a p (or n) type superconductor 302 is formed on the surface of an n (or p) type superconductor 301 to form a gate electrode G, and n (or p) type superconductors at both ends of the gate electrode G are formed. It is a principle diagram of a J-FET in which the body 301 is a source region S and a drain region D, and is a depletion type FET. Note that an enhancement type J-FET can also be formed.
In (b), an n (or p) type superconductor 311 is formed on the surface of the substrate 310, and the n (or p) type superconductor 311 is formed.
P (or n) type superconductor 312 is formed on the surface of the gate region G to form a gate electrode G, and n at both ends of the gate region G is formed.
It is a depletion type J-FET in which a (or p) type superconductor 311 is used as a source region S and a drain region D. The p (or n) type superconductor 3 in the gate region G
The gate region 12 may be formed of a metal such as platinum to form a gate region by a Schottky junction.

FIG. 4 is a sectional view of a MIS FET showing still another embodiment of the present invention. (A) A gate dielectric film 402 is formed on the surface of an n (or p) type superconductor 401, an electrode 403 is formed on the surface of the gate dielectric film 402 as a gate electrode G, and n at both ends of the gate electrode G is formed. FIG. 3 is a principle diagram of a MISFET in which a (or p) type superconductor 301 is a source region S and a drain region D, and is a depletion type MISFET. An enhancement type MIS FET can also be formed. In (b), a p (or n) type superconductor 411 is formed on the surface of the substrate 410.
And a gate dielectric film 412 is formed on the surface of the p (or n) type superconductor 411.
2. An enhancement type MIS FE in which a gate electrode G is formed on the surface of No. 2 and an n (or p) type superconductor is formed on both ends of the gate electrode G to form a source region S and a drain region D.
T. The gate dielectric film is a silicon oxide film, a silicon nitride film, a film obtained by ion-implanting oxygen or argon into an oxide superconductor to form an insulating film, or a ferroelectric composed of lead, zirconium, titanic acid (PZT). A body film can be used, and a function as a ferroelectric memory device can be provided by using PZT.

As a superconductor device, a bipolar TRS having an npn junction structure and a bipolar TRS having a pnpn junction structure, an n-type J-FET and a p-type J-FET, and an n-type MIS FET and a p-type. C-TRS such as C-bipolar TRS, C-J-FET and C-MIS FET can be formed by forming MIS FETs as a pair in a complementary type, and further reduction of power consumption and The switching speed can be increased.

The diode and TRS according to the present invention can be manufactured by using a normal semiconductor device manufacturing process. That is, element isolation is performed by making full use of film formation processing by CVD method, vapor deposition method or epitaxial method, etching processing by wet etching or dry etching, doping processing by ion implantation or thermal diffusion, patterning processing by photolithography, etc. It is possible to form a gate insulating film, an electrode, and a junction. Furthermore, the oxide superconductor crystal can be grown or purified by the Choslavski method or the floating zone method. Therefore, the superconductor wafer is used as a substrate, and the superconducting wafer is used as a substrate on the surface in the same manner as the semiconductor integrated circuit device. A body integrated circuit device can be formed. The oxide-based superconductor can be conveniently formed into a superconductor, a semiconductor, and an insulator by changing the composition, and it is also possible to form a superconductor device by mixing the respective functions.

Further, as the p-type superconductor in the present invention, there are yttrium, barium, copper oxide, lanthanum, barium, copper oxide and the like, and as the n-type superconductor, neodymium, cerium, copper oxide and neodymium. There is a thing which changed samarium to proscenium, and a thing which changed cerium to terbium.

The diode, TRS and the like according to the present invention operate similarly to the diode and TRS made of semiconductor,
Since the carriers are quantized electrons and holes, the propagation delay is almost zero, and it operates at a very high speed, and since a high-temperature oxide superconductor is used, 30
There is a feature that it operates at a relatively high temperature of K or more and about 77K,
Nm like a Josephson element
It is possible to operate at a speed comparable to that of a Josephson device without the need to manufacture a tunnel region of order.

[0016]

According to the present invention, there is an effect that a quantum effect diode or TRS that operates at a high speed and a relatively high temperature can be easily manufactured.

[Brief description of drawings]

FIG. 1 is a sectional view of a diode showing an embodiment of the present invention.

FIG. 2 is a bipolar TRS showing another embodiment of the present invention.
FIG.

FIG. 3 is a sectional view of a J-FET showing another embodiment of the present invention.

FIG. 4 is a MIS showing another embodiment of the present invention.
It is sectional drawing of FET.

[Explanation of symbols]

110, 120, 210, 220, 310, 410 ...
-Substrate 101, 111, 121, 202, 203, 211, 2
13, 223, 221, 301, 311, 401 ...
n (electron conduction) type superconductor 102, 115, 125, 202, 212, 222, 3
02, 312, 411 ... p (hole conduction) type superconductors 104, 105, 114, 115, 124, 125, 4
03 ... Electrodes 113, 123 ... Junctions 402, 412 ... Gate dielectric film E ... Emitter B ... Base C ... Collector S ... Source D ... Drain G ···Gate

Claims (5)

[Claims] 1. An electron-conducting type (hereinafter referred to as n [negative
e] type superconductor and hole conductive type (hereinafter p [positi]
ve] type) A superconductor device characterized by forming a junction with a superconductor to form a diode. Wherein the junction between n-type superconductor and a p-type superconductor has two, bipolar transistor (Tr an, s
istor: a superconducting device, characterized in that 3. An n-type superconductor or a p-type superconductor has a source region and a drain region, and a Schottky junction or a p region in a region sandwiched by the source region and the drain region.
-Unipolar type T consisting of gate region with n-junction formed
RS is a junction (J unction: less J) FET (F ield E ffect T ra
A superconductor device characterized by being formed of a nisistor (hereinafter referred to as FET). 4. An n-type superconductor or a p-type superconductor is provided with a source region and a drain region, and a dielectric film formed in a region sandwiched between the source region and the drain region, and a gate is formed on the dielectric film. MIS type is a unipolar type TRS which form an electrode made as a gate region (M etal- I nsu
lator- S uperconductor) superconductor device, characterized in that it makes with the FET. 5. Two TRSs and FETs having different polarities
Such complementary: superconductor device, characterized in that formed by forming the (C omplimentary hereinafter C).