JPH0684931A - Bipolar semiconductor device - Google Patents

Abstract

PURPOSE:To provide a bipolar semiconductor device which is improved in electrostatic breakdown strength without adding elements or increasing an element area. CONSTITUTION:The electrostatic breakdown strength is improved by forming a region 13 having the same structure as a base 11 of a vertical type transistor in a semiconductor layer at a position on the side of a collector contact 10 opposite to the base 11 of the vertical type transistor and spaced from the collector contact 10 by approximately the same distance as a distance between the base 11 and the collector contact 10 so as to surround the vertical type transistor.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a bipolar semiconductor device, and is particularly suitable for preventing electrostatic breakdown of a bipolar transistor.

[0002]

2. Description of the Related Art In a bipolar semiconductor device used in many fields, as shown in the equivalent circuit diagram of FIG. 1 and the sectional view of FIG.
There is also a type in which the protection diode 3 is provided between the ground and the ground. That is, as apparent from FIG. 2, on the surface of the P-type semiconductor substrate 4,
After selectively forming the N ⁺ buried layer 5, a so-called epitaxial layer, that is, an N ⁻ type semiconductor layer 6 is covered. A selective oxide film 7 is formed near the surface of the N ⁻ semiconductor layer 6, and a P ⁺ isolation region 9 is formed through a window 8 formed in a part thereof to provide a plurality of island regions.

In order to form a bipolar NPN transistor in the island region, in addition to removing the selective oxide film 7 and providing a deep N ⁺ layer or collector contact 10 connected to the N ⁺ buried layer 5, The base 11 and the emitter 12 are formed to complete the bipolar transistor 1. As shown in FIG. 2, a P ⁺ layer 13 is formed on the other island regions to form a diode.
Function as a card and, as shown in Fig. 1,
It is electrically connected in parallel with the emitter 12 and collector contact 10 of the transistor.

[0004]

In a bipolar semiconductor device, a protection diode is usually installed in parallel with a bipolar transistor, but the base of an NPN transistor has a pn junction and is protected. The node of the diode is P
Since it is only the mold layer and the structure is different, NPN will be used with miniaturization.
The base-emitter junction of the transistor becomes shallow, and the base-emitter junction is likely to be destroyed as the surge is applied.

That is, when an emitter reference potential with reference to the ground potential is applied as a positive surge to the collector when outputting from the collector, a reverse bias occurs between the base collectors and an electric field concentrates on the edge portion of the base. To do. This state is described as A in FIG. Further, since the breakdown voltage between the base and emitter is as low as about 8 V, the surge tries to flow into the emitter, but since the emitter X _j is shallow, an electric field concentrated at the edge portion of the base is generated in the emitter. By concentrating also on the edge part, the base emitter junction is destroyed before the anodic cathode junction part of the protection diode, and this state is shown in FIG.
Shown in.

In order that the surge does not flow into the emitter and is pulled out to the ground (semiconductor substrate), a ground contact must be provided around the element, and the distance between the elements must be increased.

The present invention has been made in view of the above circumstances, and provides a bipolar semiconductor device which improves the electrostatic breakdown resistance without adding an element or increasing the element area. With the goal.

[0008]

A semiconductor layer of a first conductivity type, an isolation region selectively provided in the semiconductor layer, an island region formed by the isolation region, and a vertical transistor provided in the island region, The same as the collector contact and the base of the vertical transistor and the base formed on the semiconductor layer portion at a position approximately equal to the distance between the bases of the vertical transistor with the collector contact as a boundary. The feature of the bipolar semiconductor device according to the present invention lies in the structural region.

[0009]

According to the bipolar semiconductor device of the present invention,
A region having the same structure as the base of the vertical transistor is formed on the semiconductor layer at a distance substantially equal to that of the base of the vertical transistor with the collector contact as a boundary to improve electrostatic breakdown resistance.

[0010]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT An embodiment of the present invention will be described with reference to the sectional views of FIGS. As is clear from FIG. 4, a P-type semiconductor substrate 4 containing about 10 ¹³ / cc of B 4
About 10 ²⁰ / cc of Sb is selectively diffused from the surface to the inside to form an N ⁺ buried layer 5, and then a so-called epitaxial layer, that is, an N ⁻ type semiconductor layer 6 is covered. The semiconductor layer 6 contains 10 ¹⁵ to ¹⁶ / cc of P, and the N ⁺ buried layer 5 is selectively formed because it corresponds to an island region described later.

The N ⁻ type semiconductor layer 6 corresponding to the N ⁺ buried layer 5 has a well-known photolithography (Photo Lithograph).
y) N ⁺ buried layer 5 through the opening formed by using the process
To form a deep N ⁺ layer or collector contact 10 (see FIG. 4).

Next, a selective oxide film 7 is formed in the vicinity of the surface of the N ⁻ semiconductor layer 6 by a conventional method using a mask using a silicon nitride layer, and a window 8 (See Fig. 2). A P-type isolation region 9 is formed through this window 8 to provide a plurality of island regions.
The concentration in the separation region 9 contains B of about 10 ²⁰ / cc.

Since the bipolar transistor 1 is formed in the island region by the same means as in the prior art, it will not be shown here and will not be described. Using a window formed by removing the selective oxide film 7 portion by a photolithography process,
Then, the spacer 11 and the emitter 12 are formed and completed. Base
The concentration of the ^soot 11 is about 10 ^{17 to 18} / cc of B, and the concentration of the emitter 12 is about 10 ²¹ / cc of As.

In the present invention, the same structural region 1 as the base 11 is formed.
The feature is that 3 is installed (see FIG. 6). That is, FIG.
As shown in FIG. 3, it is formed in the N ⁻ semiconductor layer 6 portion at a position substantially equal to the distance A to the base 11 with the collector contact 10 as a boundary. Therefore, B is 10 ^{17 to 18 in the} same structure region 13.
/ Cc is included. The same structure area 1 as the base 11
3 is formed surrounding the NPN transistor.

A photolithography technique is naturally used in the patterning process of the selective oxide film 7 portion when forming the same structure region 13, and an opening B extending over the isolation region 9 and the semiconductor layer 6 is formed. As shown in FIG. 5, a resist 15 is formed, and boron B is diffused through the resist 15. At this time
The base opening C of the transistor 1 is also installed to form the base 11 and the same structural region 13 as the base 11 at the same time. The gate oxide film 16 is shown in FIG.

Then, in the opening formed in the selective oxide film 7,
An electrode 17 made of a conductive metal, for example, an Al alloy such as Al-Si or Al-Si-Cu is formed to complete the bipolar semiconductor device having the sectional structure shown in FIG.

FIG. 7 shows an example of forming a P-type semiconductor layer 6 as another embodiment. In this example, B is 10 ¹³ / cc
About 10 ²⁰ / cc of Sb is selectively diffused inward from the surface of the P type semiconductor substrate 4 containing a certain amount to form the N ⁺ buried layer 5, and then a so-called epitaxial layer, that is, a P type semiconductor layer 6 is formed. To cover.

In the P-type semiconductor layer 6, 10 ¹⁵ to ¹⁶ P is ^added.
The N well layer 18 including the / cc position is provided, and the vertical NP is provided there.
The N-transistor 1 is formed.

N well region 18 corresponding to N ⁺ buried layer 5
Pattern using well-known photolithography technology.
To form an opening, which is used to form a deep N ⁺ layer or collector contact 10 connected to the N ⁺ buried layer 5.

Next, a selective oxide film 7 is formed in the vicinity of the surface of the N well region 18 by using a mask using a silicon nitride layer, and a window is set in a part of the selective oxide film 7 by a photolithography process. A P ⁺ isolation region 9 is formed through this window to provide a plurality of island regions. The concentration of the separation region 9 is B of about 10 ²⁰ / cc.

To form the bipolar transistor 1 in the island region, a base 11 and an emitter 12 are formed by utilizing a window formed by dissolving the selective oxide film 7 portion by a photolithography process. Complete. The concentration of the P-base 11 is about 10 ^{17 to 18} / cc of B, and the concentration of the emitter 12
Is about 10 ²¹ / cc As.

Since the present invention is characterized in that the same structural region 13 as the P base 11 is provided, the collector contact 10
Is formed in a portion of the N well region 18 that is substantially equal to the distance to the P base 11. Therefore, B is contained in the same structure region 13 as the base 11 in an amount of about 10 ^{17 to 18} / cc. The same structure region 13 as the base 11 is formed so as to surround the NPN transistor 1.

A photolithography technique is naturally used in the patterning process of the selective oxide film 7 portion when forming the same structure region 13 as the base 11, and it extends over the isolation region 9 and the N well region 18. An opening is formed and B is diffused through the opening.

After that, an electrode 17 made of a conductive metal, for example, an Al alloy such as Al--Si or Al--Si--Cu is formed in the opening formed in the selective oxide film 7 to form a bipolar film in the cross-sectional view of FIG. Type semiconductor device is completed.

[0025]

In the collector output of the bipolar type semiconductor device according to the present invention, when collector + surge is applied by the emitter reference according to the ground reference, the base collector junction part of the NPN transistor and the same structure as the base are formed. Since the regions are formed, the same electric field concentrates on both. Moreover, since the same structure region as the base and the semiconductor substrate are common, the surge does not escape to the emitter but to the ground, so that the base-emitter junction is not destroyed.

In FIG. 8, it is clarified that the electric field is not concentrated at the base-emitter junction due to the region 11 having the same structure as the base.

[Brief description of drawings]

FIG. 1 is an equivalent circuit diagram of a conventional bipolar semiconductor device.

FIG. 2 is a cross-sectional view of a bipolar semiconductor device including the circuit of FIG.

FIG. 3 is a diagram for explaining a problem of the bipolar semiconductor device of FIG.

FIG. 4 is a cross-sectional view showing a manufacturing process of a bipolar semiconductor device according to the present invention.

FIG. 5 is a cross-sectional view showing the manufacturing process following FIG.

FIG. 6 is a cross-sectional view showing the manufacturing process following FIG.

FIG. 7 is a cross-sectional view of a bipolar semiconductor device according to another embodiment.

FIG. 8 is a sectional view showing the effect of the bipolar semiconductor device according to the present invention.

[Explanation of symbols]

1: Bipolar transistor, 2: Collector, 3: Protective diode, 4: Semiconductor substrate, 5: N ⁺ buried layer, 6: Epitacal layer or semiconductor layer, 7: Selective oxidation layer, 8: Window, 9 : P ⁺ separation layer, 10: N ⁺ collector contact 11: Base, 12: Emitter, 13: Structural region same as base 17: Electrode, 18: N well region.

Claims (1)

[Claims] 1. A semiconductor layer of the first conductivity type, an isolation region selectively provided in this semiconductor layer, an island region formed by this isolation region, a vertical transistor provided in this island region, and this vertical transistor. Collector contact and base, and the same structure region as the base formed on the semiconductor layer portion at a position approximately equal to the distance between the bases of the vertical transistor with the collector contact as a boundary. Bipolar semiconductor device characterized by