JPH0695618A - Device for driving liquid crystal - Google Patents

Abstract

(57) [Abstract] [Purpose] To provide a liquid crystal drive device that facilitates mounting and has less unnecessary radiation. A TFT liquid crystal panel 101, a data holding circuit 105 that divides and holds digital display data,
A plurality of data latches 103 for storing the data stored in the data holding circuit 105 and a plurality of analog conversion means 102 for converting the digital display data stored in the data latch 103 into an analog signal to be applied to the liquid crystal panel are provided. There is. [Effect] The number of signal lines for input data can be reduced and the pin pitch of the input signal lines can be increased, which facilitates mounting. Also, the rise of the clock pulse,
By capturing the data at the falling edge, the frequency of the clock pulse can be lowered, and a liquid crystal drive device with less unnecessary radiation can be realized.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal driving device for controlling a liquid crystal display of a computer or the like with digital display data.

[0002]

2. Description of the Related Art In recent years, as computers have become smaller and lighter, portable computers have become common, and liquid crystal panels are often used for display devices.
In particular, the TFT liquid crystal display device is excellent in image quality, and is attracting attention as a display device which will replace a conventional CRT in the future.

Conventionally, a latch circuit for inputting and latching digital display data has been used in a liquid crystal driving device for driving a TFT liquid crystal panel of this type. A conventional liquid crystal driving device will be described below with reference to FIG.

FIG. 4 is a block diagram of a conventional liquid crystal driving device. 101 is a color TFT liquid crystal panel, 102 is an analog converting means for the number of display dots, 103 is an 8-bit data latch for the number of display dots, and 104 is. It is a shift register.

The operation of the conventional liquid crystal driving device having the above-described blocks will be described below. Since the liquid crystal panel 101 supports color, the data is R, G,
Input each data of B. Each color data has 8-bit gradation data, and one pixel can display about 16.7 million colors by using R, G, B 8-bit data.

Since liquid crystal has a slow response speed, it is necessary to transfer data to the liquid crystal panel in horizontal line units for display. Therefore, the liquid crystal driving device has a function of holding the input pixel data for one horizontal line. In the conventional liquid crystal driving device, R, R is set in the data latch 103 selected by the shift register 104 which is sequentially shifted pixel by pixel.
The G and B pixel data are sequentially latched, and the data for one line is stored. Upon entering the display operation, the data latch 103 transfers the data to the analog converting means 102. The TFT liquid crystal panel has a capacity for each display dot, and the display brightness can be changed by charging this capacity with electric charge. It is necessary to convert data into an analog signal in order to charge the capacitor with electric charge. The analog conversion means 102 converts the data in the data latch 103 into an analog signal of a level required for liquid crystal display. The TFT liquid crystal panel 101 can display according to the gradation held in the data latch.

[0007]

However, in the above-mentioned conventional configuration, since the multi-bit display data is latched from the outside, the input data increases as the display color increases, and the number of input signal lines of the liquid crystal drive device increases. Will increase. When a conventional liquid crystal driving device is mounted in a limited mounting space of a liquid crystal panel, it is difficult to mount due to a narrow pitch of input signal lines due to multiple inputs.

The present invention solves the above-mentioned conventional problems, and an object thereof is to provide a liquid crystal driving device in which the number of input signal lines is reduced to facilitate mounting.

[0009]

In order to achieve the above object, a liquid crystal drive device according to the present invention has the following configuration. That is, first, the input stage is provided with a data holding circuit for dividing and holding input data. The second feature is that it is provided with holding means for holding the divided input data at the rising and falling edges of the data latch clock.

[0010]

With the above structure, first, the number of input signal lines can be reduced by dividing and holding multi-bit display data. Secondly, the clock frequency can be lowered and the generation of unwanted radiation can be reduced.

[0011]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to FIG.

FIG. 1 is a block diagram of the present embodiment. 101 is a color TFT liquid crystal panel, 102 is an analog conversion means for the number of display dots, 103 is an 8-bit data latch for the number of display dots, and 104 is a shift register. , 105 is an input data holding circuit for reproducing 4-bit display data obtained by dividing 8-bit data into 8-bit data. The most different point of this embodiment from the conventional example shown in FIG. 4 is that the input data holding circuit 105 is provided.

FIG. 2 is a circuit diagram of an example of the data reproducing latch. 201 to 212 are D flip-flop circuits,
213 is an inverter.

The operation of this embodiment having the above construction will be described below. The description of the operation in FIG. 1 is omitted because it is the same as the conventional example except for the data latch function of the input stage.

The reproduction data holding circuit 105 of FIG. 2 has the D flip-flop circuit 2 at the falling edge of the clock pulse.
01 to 204 hold data, and the D flip-flop circuits 205 to 212 hold data at the rising edge. The operation at this time will be described with reference to the operation timing chart of FIG. Data is transferred in half cycle units of clock pulses. Therefore, for the data D3 to D0, it is necessary to divide the data of the nth pixel into the upper byte and the lower byte and transfer them. Reference numerals 301 to 304 indicate that the upper and lower bytes are divided and transferred in this way. The upper byte data 301 of the nth pixel is D at the falling edge 305 of the clock pulse.
It is held in the flip-flop circuits 201 to 204. n
The pixel-order lower byte data 302 is D flip-flop circuits 209 to 21 at the rising edge 306 of the clock pulse.
Held at 2. Rising edge of this clock pulse 30
6, the nth pixel upper byte held in the D flip-flop circuits 201 to 204 is transferred to the D flip-flop circuits 205 to 208. Therefore, after the rising edge 306 of the clock pulse, the D flip-flop circuit 20
The 8th bit of the nth pixel is reproduced on the outputs Q7 to Q0 of 5 to 212. The operation of sequentially reproducing the data into 8 bits is the same, so the description thereof will be omitted.

[0016]

According to the present invention, the number of signal lines for input data can be reduced, the pin pitch of the input signal lines can be widened, and mounting can be facilitated. Further, as shown in FIG. 3, the clock frequency can be lowered by taking in data at the rising and falling edges of the clock, and an excellent liquid crystal drive device with less unnecessary radiation can be realized.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of a liquid crystal drive device according to an embodiment of the present invention.

FIG. 2 is a diagram showing an input data holding circuit of a liquid crystal driving device according to an embodiment of the present invention.

FIG. 3 is an operation timing chart of the input data holding circuit of the liquid crystal driving device according to the embodiment of the present invention.

FIG. 4 is a block diagram showing a configuration of a conventional liquid crystal drive device.

[Explanation of symbols]

 101 TFT liquid crystal panel 102 Analog conversion means 103 Data latch 104 Shift register 105 Input data holding circuit 201 to 212 D flip-flop circuit 213 Inverter 301 to 310 byte data

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Yoshio Imamura 1006 Kadoma, Kadoma City, Osaka Prefecture Matsushita Electric Industrial Co., Ltd.

Claims (2)

[Claims] 1. A liquid crystal panel, data holding means for dividing and holding digital display data, a plurality of data latches for storing the data stored by the data holding means, and digital data stored by the data latches. And a plurality of analog conversion means for converting display data into analog signals to be applied to the liquid crystal panel. 2. Data holding means for holding display data in a divided manner holds the divided data, a data latch clock, and the divided data at the rising and falling edges of the data latch clock. The liquid crystal drive device according to claim 1, further comprising a circuit.