JPH0710053B2 - Spread spectrum receiver - Google Patents

Description

TECHNICAL FIELD The present invention relates to a spread spectrum receiver.

[Conventional technology]

5 and 6 are block diagrams of the conventional spread spectrum receiver disclosed in, for example, Japanese Patent Laid-Open No. 59-47858. As shown in the figure, the PSK demodulation circuit 1 has a squaring circuit 15 that receives the received signal S (t) and squares it, a bandpass filter 16, and a ÷ 2 function. Binary counter 17 for outputting components, received signal S (t) and 2
From the decimal counter 17 It is composed of a mixer 18 for mixing the components, a low-pass filter 19 and a binarization circuit 20.

Also, the PN code generator 2 It includes a K-ary counter 21 and a PN code generation circuit 22 having a ÷ K function for the component. Note that K is the ratio of the carrier frequency to the PN code clock, and the K-adic counter 21 inputs the clock signal to the clock input terminals C1 and C2 of the correlation circuit 3.

Correlation circuit 3 is a shift register type circuit, in which PSK demodulation circuit 1 is connected to D1 input terminal. L bit data is added, and the L2 bit PN code is output from the PN code generating circuit 22 to the D2 input terminal. Is added, and the correlation between the two is taken,
If there is a positive correlation, +1 is output, and if there is a negative correlation, -1 is output.

The sample circuit unit 4 receives a PN code from the PN code generating circuit 22 and outputs a sample timing, a decoder circuit 23,
A binarization circuit 24 that binarizes the output of the correlation circuit 3 and a flip-flop 25 that receives the output of the binarization circuit 24 and performs a sampling operation with a sample timing signal from a decoder circuit 23.
It consists of

Next, the operation of the circuit of FIG. 6 will be described with reference to the signal waveform time chart shown in FIG.

Spread spectrum signal S (t) sent from the transmitting side
Is added to the squaring circuit 15 and the mixer 18 of the PSK demodulation circuit 1. This spread spectrum signal (here, received signal) S
(T) is a signal having the waveform shown in FIG. 7 (c), and this signal S (t) is the carrier component co shown in FIG. 7 (a) on the transmitting side.
sωct, the PN code p (t) shown in FIG.
The information data d (t) shown in FIG. 7C is mixed and transmitted.

When the signal S (t) is squared by the squaring circuit 15, d (t) =
Since ± 1, p (t) = ± 1, its output is Becomes Then, the band pass filter 16 extracts only the frequency component of 2ωc, and the binary counter 17 counts down. Is obtained (see FIG. 7 (f)). This signal is the same as the carrier wave on the transmitting side. Therefore the signal S at the mixer 18
(T) and signal , The output signal S1 (t) becomes a signal from which the carrier component is removed, as shown in FIG. 7 (g). This signal is further passed through the low-pass filter 19 and the binarization circuit 20 outputs 2
When digitized, as shown in Fig. 7 (h), the PSK demodulated signal Is obtained. And this signal Is applied to the D1 input of the correlation circuit 3.

On the other hand, of the binary counter 17 The signal is further frequency-divided by the K-adic counter 21 to generate a PN code clock, which is added to the PN code generation circuit 22 to transmit the PN code on the transmission side.
PN code on the receiving side that is the same as code p (t) (See FIG. 7 (i)). Then, the PN code from this PN code generation circuit 22 Is applied to the D2 input of the correlation circuit.

Correlation circuit 3 is added to D1 input PN code applied to signal and D2 input The correlation is calculated and the result is output (see FIG. 7 (j)). In the waveform example of FIG. 7, the signal waveforms of both are the same in the period t1 to t2, and therefore the output is +1. However, in the periods t2 to t3, the signal waveforms of the two do not match, so that the output c (t) becomes -1.

The output c (t) of the correlation circuit 3 is binarized by the binarization circuit 24 and applied to the D input terminal of the flip-flop 25.

Further, the decoder circuit 23 receives the PN code from the PN code generation circuit 22, and receives the PN code. A sample timing signal (see FIG. 7 (k)) is output every 1 cycle of the above and is applied to the T terminal of the flip-flop 25. The flip-flop 25 samples the signal from the binarization circuit 23 every time the sample timing signal is applied and outputs the information data. (See FIG. 7 (l)) is output. Information data as above Demodulation is completed.

[Problems to be solved by the invention]

Since the conventional spread spectrum receiver is configured as described above, the spread spectrum signal is distorted due to the transmission condition such as the transmission band and the phase characteristic of the transmission system, and
The peak of the correlation value for synchronizing with the code becomes low, and the peaks of the correlation value also occur at other phase points (see correlation value 14 in FIG. 4), which easily causes the synchronization deviation,
There were problems such as an increase in transmission errors.

The present invention has been made in order to solve the above problems, and it is possible to obtain a correlation value with a high peak without being influenced by transmission conditions and transmission path characteristics and reduce transmission errors due to loss of synchronization. The purpose is to obtain a spread spectrum receiver that can be used.

[Means for solving problems]

In the spread spectrum receiver according to the present invention, when the PN code signal is input to the correlation circuit for obtaining the correlation, the PN code signal is input via the filter having the same kind of phase amplitude characteristic as that of the band filter on the transmission system or the transmission side. It was done like this.

[Action]

The filter of the spread spectrum receiving apparatus according to the present invention provides the PN code close to the PN code distorted by the phase characteristics of the transmission system to the correlation circuit. Therefore, a high peak correlation value can be obtained in a short time. Synchronization is achieved and transmission errors are reduced.

Example of Invention

An embodiment of the present invention will be described below with reference to the drawings. An example will be described in which a power line is used for the transmission path and the spread spectrum signal is frequency band limited. FIG. 1 is a block diagram showing a configuration of a spread spectrum communication receiving apparatus according to the present invention, and FIG. 2 is a circuit diagram for explaining details of the block in FIG. In the figure, reference numeral 1 denotes a waveform shaping circuit, which receives a transmission signal S (t) and outputs a binarized signal p.
(T) d (t) is output. 2 is a PN code generating circuit for outputting a signal p (t), 3 is a correlation circuit,
The filter circuit 5 outputs (t) d (t) and the signal p (t).
Is a circuit for correlating with the filtered signal FP (t), and the filter circuit 5 includes a filter having characteristics similar to the phase amplitude characteristics of the transmission-side or transmission-side range filter. 4 is a sample circuit, which is the signal p (t)
The signal d (t) and the signal FP (t) are received, sampling is performed, and the signal d (t) is output.

The PN code generation circuit 2 is composed of a PN generator 11 and a PN controller 12. Then, the PN generator 11 is composed of the clock generator 11A, the four-stage shift registers 11B, 11C, 1 connected in series.
1D, 11E, exclusive OR gate 11F, and the output of the shift register 11E is given to the PN controller 12. This PN
The controller 12 is controlled by the output of the synchronous search circuit 8 in the correlation circuit 3.

The correlating circuit 3 is a delay circuit 7A, 7B, 7C for delaying the signal FP (t) from the filter circuit 5, a signal p (t) d (t) and a digital correlator 6A for inputting the signal FP (t). p
(T) d (t), digital correlators 6B, 6C, 6C for inputting signals from the delay circuits 7A, 7B, 7C, respectively, and a synchronous search circuit 8.

The sample circuit 4 comprises a multiplier 9 and a digital integrator 10, which multiplies the binarized signal p (t) d (t) and the signal FP (t) and outputs the resulting signal. Is given to the digital integrator 10. The digital integrator 10 demodulates the input signal according to the sampling signal from the PN controller 12 and outputs a signal d (t).

Next, the operation will be described with reference to FIGS. 3 and 4. FIG. 3 is a time chart of each part of FIG. 1, and FIG. 4 is a graph showing a correlation value between a received signal and a PN code.
In this case, 13 in FIG. 4 is a correlation value between the received signal p (t) d (t) and the filtered PN code FP (t). 14 is a correlation value between the received signal p (t) d (t) and the PN code p (t).

The spread spectrum signal S (t), which has been frequency-limited and superposed on the voltage signal flowing from the transmitting side to the power line and which has been phase-distorted, is converted into a digital signal by the waveform shaping circuit 1 and is then a binarized signal. p (t) d (t).
The binarized signal p (t) d (t) is a signal in which the PN code signal p (t) and the information data d (t) are mixed. On the other hand, the PN code generation circuit 2 is a four-stage shift register.
11B to 11E are used to generate a PN code signal p (t) consisting of a 15-bit m-sequence code. The PN code signal p (t) is input to the filter circuit 5. The PN code signal p (t) input to the filter circuit 5 is the PN code signal FP after the filter whose phase distortion is corrected by the phase characteristic of the filter circuit 5.
(T) is input to the correlation circuit 3 and the sampling circuit 4.

On the other hand, the delay circuits 7A to 7C of the correlation circuit 3 are connected to the signal FP.
Each (t) is delayed by, for example, 1 / m bit (m is an m sequence code of 15 bits), and each is given to the corresponding digital correlators 6B to 6D. Then Digital Correlator 6B ~
The signal p (t) d (t) is also provided to 6D.
The signal p (t) d (t) and the signal FP (t) are input to the digital correlator 6A. Then, each of the digital correlators 6A to 6D respectively correlates the two input signals, gives each correlation value to the synchronous search circuit 8, and sends a control signal to the PN controller 12 until the specified correlation value is reached. , PN code signal p (t) is delayed by n bits to perform the synchronization probability. When the synchronization probability ends, the PN controller 12 sends a signal for establishing synchronization to the digital integrator 10. In addition, the binarized signal p (t) d (t) and the phase-corrected filtered PN code signal FP (t) are input to the multiplier 9 of the sample circuit 4. Then, the multiplier 9 receives the two input signals p (t) d
(T) and FP (t) are multiplied, and the multiplication result is given to the digital integrator 10. The digital integrator 10 integrates the multiplication result by the synchronization establishment signal from the PN controller 12 and demodulates the data d.
(T) is output. Therefore, synchronization is established by the series of operations described above, and the spread spectrum signal S (t) is demodulated. Further, the digital correlators 6A to 6D are the filter circuits 5
As a result, the phase-corrected PN signal FP (t) provides a correlation value 13 having a high peak as shown in FIG.

In the above embodiment, the power line is used for the transmission line,
It may be transmission by light or radio waves. Delay circuit 7A
.About.7C and digital correlators 6A to 6B are limited to four, but this can be increased by the bit length of the maximum PN code, so the number is not limited to four and can be appropriately selected.

〔The invention's effect〕

As described above, according to the present invention, the PN code signal input to the correlation circuit / sample circuit is input via the filter having the phase characteristics of the transmission path and the phase characteristics of the transmission signal whose frequency band is limited. A correlation value having a large correlation peak can be obtained, and the synchronization establishment time can be shortened, and out-of-sync can be reduced, so that transmission errors can be reduced.

[Brief description of drawings]

FIG. 1 is a block diagram showing the structure of a spread spectrum receiver according to an embodiment of the present invention, FIG. 2 is a detailed circuit diagram of each part of FIG. 1, and FIG. 3 is a signal waveform time of each part of FIG. Chart, FIG. 4 is a graph showing the correlation value in the PN code p (t), FIG. 5 is a block diagram showing the configuration of a conventional spread spectrum receiver, and FIG. 6 is a detailed circuit diagram of each part of FIG. , FIG. 7 is a time chart showing the signal waveform of each part of FIG. 1 is a waveform shaping circuit, 2 is a PN code generation circuit, 3 is a correlation circuit, 4 is a sample circuit, and 5 is a filter circuit. In the drawings, the same reference numerals indicate the same or corresponding parts.

Claims (1)

[Claims] 1. A waveform shaping circuit which receives a spread spectrum signal and shapes the waveform of the spread spectrum signal to binarize it.
A PN code generating circuit for generating a PN code on the receiving side, a correlation circuit for obtaining the correlation between the spread spectrum signal and the PN code from the PN code generating circuit, and the output of this correlation circuit
In a spread spectrum receiver comprising a sample circuit for sampling at a specific timing of a PN code, a filter circuit provided with a filter having characteristics similar to the phase amplitude characteristics of a band filter on the transmission system or transmission side is provided. A spread spectrum receiving apparatus, wherein a PN code signal from the PN code generating circuit is input to the correlation circuit and the sample circuit via the.