JPH07105437B2 - Method for manufacturing semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Outline] A method for forming an element isolation band by U-groove isolation, in which organic silicon and organic phosphorus are used as a source and oxygen gas is used as a carrier gas over the entire surface of a semiconductor substrate including the inside of the U-groove. Phosphorus-doped silicon oxide is deposited by the phase growth method and heat-treated. As a result, an element isolation band is formed in which the U groove is reliably filled with an insulator, which helps improve the quality of the semiconductor device.

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device such as an IC, and more particularly to a groove separation method (trench separation method) for separating semiconductor elements.
Regarding

In a method of manufacturing a semiconductor device, a forming method for further improving the quality of the semiconductor device is constantly being investigated, and the present invention is an improvement proposal regarding the groove separation process.

[Prior Art] In an IC, a large number of semiconductor elements (cells) are provided on a semiconductor substrate, and element isolation bands for electrically isolating these semiconductor elements are formed. And various methods have been proposed for such an element isolation band,
Until now, the most prominent element isolation method is the trench isolation method (trench isolation method) applied to the PI-polar IC.
It is also called P (Isolation with Oxide and Polysilicon) method.

It is a method of burying a polycrystalline semiconductor film in a groove through a silicon oxide film (SiO ₂ film) and covering it with a silicon oxide film. Initially, the crystal orientation of the substrate is used to perform wet etching. Was a method of forming a so-called V-groove separation band in which a V-shaped groove was formed. However, in recent years, along with the development of the dry etching method and the demand for high integration, a so-called U groove separation zone forming method for forming a U-shaped groove by dry etching has been widely used. This is because the U-shaped groove is more suitable for miniaturization than the V-shaped groove.

3 (a) to 3 (d) are cross-sectional views in order of the steps of the conventional method for forming a U-groove separation band by the IOP method. First, as shown in FIG. 1000 Å film thickness
Through the SiO ₂ film 2, a silicon nitride film (Si ₃ N
₄ film) 3 is formed, and the silicon substrate 1 only in the U groove formation region
Expose. This is because the SiO ₂ film 2 is a buffer layer for applying no stress to the substrate, and stress is generated when the Si ₃ N ₄ film is directly deposited on the silicon substrate, and the substrate is damaged.

Then, as shown in FIG. 3 (b), a width of 1 is obtained by using a reactive ion etching (RIE) method using chlorine-based gas.
A groove 4 having a thickness of 3 μm and a depth of 3 to 5 μm is formed.

Then, as shown in FIG. 3C, after removing the Si ₃ N ₄ film 3, a heat treatment is performed at a high temperature of about 1000 ° C. to form Si inside the groove 4.
An O ₂ film (thickness 3000 Å) 5 is formed, and a thick polycrystalline silicon film 6 is deposited on the surface including the inside of the groove by the low pressure vapor phase epitaxy (low pressure CVD) method. To bury.

Next, as shown in FIG. 3D, the polycrystalline silicon film 6 on the surface is flattened by etching or polishing up to the SiO ₂ film 5, and the polycrystalline silicon film on the groove surface is further thermally oxidized,
The SiO ₂ film 7 is formed, and thus the element isolation band for trench isolation is completed.

[Problems to be Solved by the Invention] However, in the method of forming a U-groove separation band by the IOP method as described above, the polycrystalline silicon film on the groove surface is thermally oxidized to form Si.
When the O ₂ film 7 is formed (called capping oxidation), SiO ₂
It has been found that the formation of the film causes the volume to expand and stress around the groove to induce crystal defects. This is the IC
It is considered that the influence on the device characteristics has gradually become more prominent due to the miniaturization of the substrate. In particular, a substrate ground region where impurities are diffused at a high concentration is provided around the U groove,
Further, when the high-concentration p-type region of the pnp-type transistor is provided close to the U-groove, crystal defects in that region remarkably increase. This increase in crystal defects causes deterioration of device characteristics, for example,
There is an adverse effect of increasing the leak current.

Therefore, it is desirable to bury a material other than the polycrystalline silicon film 6, for example, a SiO ₂ film inside the U-groove, but it is possible to use a conventional low pressure CVD method such as a SiO ₂ film or a PSG film (phosphorus silicate film). If such an insulator is applied, the cover rage (coverability) of these insulator films is not sufficient, the inside of the U groove cannot be sufficiently buried, and a cavity is formed. Moreover,
At present, the aspect ratio (horizontal to vertical ratio) is increasing due to the miniaturization of ICs, and the depth is about 4 ± 1 μm for a groove width of 1 μm. Therefore, the conventional low pressure CVD method, for example, monosilane gas is used. In the method of oxidizing and depositing, a SiO ₂ film is used as a U
It is impossible to bury it in the groove.

The present invention proposes a method of forming an element isolation band by U groove separation in which an insulator is buried in the U groove by solving such problems.

[Means for Solving the Problems] The purpose is to form a U groove in a semiconductor substrate, use organic silicon and organic phosphorus as sources on the entire surface of the semiconductor substrate including the inside of the U groove, and use oxygen gas as a carrier gas. This can be achieved by a method for manufacturing a semiconductor device including a step of depositing a phosphorus-doped silicon oxide film by a vapor phase growth method and then performing a heat treatment.

[Operation] That is, according to the present invention, the inside of the U groove is filled with a phosphorus-doped SiO ₂ film by a vapor phase growth method using organic silicon and organic phosphorus as sources and oxygen gas as a carrier gas.
The phosphorus-doped SiO ₂ film is heat-treated and reflowed. Then, inside the U groove, the phosphorus-doped SiO ₂ films grown toward the center of the groove from the side wall of the groove are reliably bonded and filled in the center of the groove without any voids. In the process of SiO ₂
When the film is etched with a chemical, the chemical solution does not penetrate into the groove, so that a highly reliable element isolation band is formed. Also this U
Unlike the conventional structure in which the U-groove is filled with a polycrystalline Si film and the SiO ₂ film is coated on the U-shaped groove, the element isolation band composed of the groove does not give stress to the surroundings.

[Examples] Hereinafter, examples will be described in detail with reference to the drawings.

FIGS. 1 (a) to 1 (d) are sectional views in order of steps of a method of forming U groove separation according to the present invention. First, as shown in FIG. 1A, a SiO ₂ film 2 (thickness 1000
Å) to form Si ₃ N ₄ film 3 (film thickness 2000 Å)
The silicon substrate 1 is exposed only in the groove formation region. Then, as shown in FIG. 3B, a groove 4 having a width of 1 μm and a depth of 3 to 5 μm is formed by etching using the RIE method using a chlorine-based gas.

Then, as shown in FIG. 1 (c), Si is added with hot phosphoric acid solution.
_{After the 3} N ₄ film 3 is removed by etching, it is heat-treated at a high temperature of 900 to 1000 ° C. to form a SiO ₂ film (film thickness 3000Å) 5 inside the groove 4, and then the low pressure CVD method is used to form the groove. A thick phosphorus-doped SiO ₂ film 16 having a film thickness of 1 to 2 μm is deposited on the surface including the inside to form the groove 4
Bury the inside of the. Since the phosphorus-doped SiO ₂ film 16 grows laterally from the side surface of the groove 4 inside the groove 4, the phosphorus-doped SiO ₂ film 16 is buried in the groove center in a state where a bonding surface or a slight cavity is formed.

However, the voids will surely become Si due to the heat treatment in the subsequent process.
It is filled with the O ₂ film and disappears.

FIG. 2 is a schematic diagram of a CVD apparatus for performing the low pressure CVD method according to the present invention, in which 10 is a reaction chamber, 11 is a silicon substrate, and 1 is a silicon substrate.
2 and 13 are reaction liquid containers, 14 is an oxygen gas inflow port, and 15 is an exhaust port. Using such a device, the silicon substrate 11 is
Heat to 00 ° C. On the other hand, oxygen gas is used as a carrier gas to flow into the reaction liquid containers 12 and 13, and the organic silicon liquid 20 held in the container 12 and the organic phosphoric acid liquid 30 held in the container 13 are bubbled, and the reaction chamber 10 is treated with organic silicon. And introducing organic phosphorus.
Then, the exhaust port 15 is evacuated to reduce the pressure inside the reaction chamber 10.
The pressure is set to about 1 torr and the organic silicon and organic phosphorus are thermally decomposed on the surface of the silicon substrate 11 and reacted with oxygen gas to form phosphorus-doped SiO ₂
The film 16 is applied. In addition, triethyl phosphate (TriEthyl Phosphate) is used for the organic phosphoric acid. Examples of organic silicon include tetraethyl orthosilicate (Tetra).
Ethyl Ortho Silicate; TEOS; (C ₂ H ₅ O) ₄ Si) is used. Low pressure CVD using such organic silicon as decomposition gas
The grown phosphorus-doped SiO ₂ film 16 by the method has an extremely good cover rage, and therefore the inside of the U groove is almost fully phosphorus-doped Si 2.
It is buried in the O ₂ film 16.

Then, as shown in FIG. 1 (d), after heat treatment at 900 ° C. for 30 minutes in a dry nitrogen gas atmosphere, the phosphorus-doped SiO ₂ film 16 on the surface is polished or etched up to the SiO ₂ film 2. Flatten. This heat treatment is applied to the buried phosphorus-doped SiO ₂ film 16
The joint surface can be eliminated in order to stabilize the temperature. The PSG film containing phosphorus is particularly effective for filling the U-groove because it can be melted by heat treatment. Further, chemical polishing with acidic aluminum fluoride is suitable for polishing, and full surface RIE with fluorine-based reaction gas is suitable for etching.

By using the above-mentioned forming method, compared to the conventional IOP method described with reference to FIG. 3, since there is no need for capping oxidation, crystal defects do not occur around the U-groove, and U
The inside of the groove can be sufficiently filled with the SiO ₂ film. Therefore, the adverse effect of crystal defect induction by the IOP method is eliminated, and I
The quality of C is improved.

[Effects of the Invention] As is clear from the above description of the embodiments, according to the present invention, the quality of a highly integrated IC can be greatly improved.

[Brief description of drawings]

1 (a) to (d) are cross-sectional views in order of steps of a method for forming groove separation according to the present invention. FIG. 2 is a low pressure CVD apparatus related to the present invention, and FIGS. 3 (a) to 3 (d) are conventional. FIG. 6 is a cross-sectional view in order of the steps of the method for forming groove separation of FIG. In the figure, 1 is a silicon substrate, 2, 5 are SiO ₂ films, 3 are Si ₃ N ₄ films, and 4 are U.
Grooves, 6 is a polycrystalline silicon film, 16 is a phosphorus-doped grown SiO ₂ film,
20 indicates organic silicon (TEOS) and 30 indicates organic phosphoric acid.

Claims (1)

[Claims] 1. A method for forming a U-groove element isolation band in a semiconductor device, which comprises forming a U-groove in a semiconductor substrate and using organic silicon and organic phosphorus as sources on the entire surface including the inside of the U-groove and oxygen as a carrier. A method of manufacturing a semiconductor device, comprising the steps of depositing a phosphorus-doped silicon oxide film by a vapor phase growth method using a gas and then heat-treating the phosphorus-doped silicon oxide film.