JPH0715215A - Hybrid integrated circuit - Google Patents

Abstract

(57) [Abstract] [Purpose] A dielectric circuit board with a high-frequency circuit (for example, a 900 MHz band high-frequency amplifier) mounted on the front surface and a ground conductor thick film deposited on the back surface, active elements, passive elements, and high-frequency signals. In a high-frequency hybrid integrated circuit having a terminal, a DC bias power supply terminal, and a strip line connecting these terminals, mutual interference of high-frequency signals occurs at locations where the strip lines are close to each other, and circuit operation such as parasitic oscillation occurs. Becomes unstable. In addition to solving the above problems, the distance between strip lines is reduced to reduce the size of the device. In the above hybrid IC, an electrostatic shielding island wiring line connected to a ground conductor thick film on the back surface of a substrate by a through hole or standing on the line in a substrate region between adjacent strip lines. A conductive material such as a plate fence electrostatic shield is provided. The problem is solved by using an island-shaped wiring line having a ground potential.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a high frequency hybrid integrated circuit (IC), and more particularly to a hybrid IC having a structure for reducing interference of high frequency signals between circuits in the device.

[0002]

2. Description of the Related Art Conventionally, the frequency is several tens of MHz to 1000M.
Hybrid IC for high frequency handling signals of about Hz
Is a strip line formed of a thick film metal on a dielectric substrate, a passive element such as a chip capacitance and a chip resistor, a circuit including active elements such as a transistor, and grounded to the back surface of the substrate through a through hole.

Such a hybrid IC for high frequency amplification
7 is a plan view and FIG. 8 is a circuit diagram thereof. Figure 7
In FIG. 8, T ₁ is a high frequency input signal terminal, T ₂ is a DC bias power supply terminal also serving as output control, T ₃ is a DC bias power supply terminal, and T ₄ is a high frequency output signal terminal. TR1 is a MOSFET and is used with the source (S) grounded. G and D respectively represent a gate electrode and a drain electrode, and the source electrode is not shown, but TR
It is exposed on the back surface of one chip, and the ground plate (Cu
) Is glued to. C ₁ to C ₆ are chip capacitors, which are fixed to a strip line or the like on the circuit board by using solder or the like. SL ₁ , SL ₂ , SL ₃ and SL ₄ are called strip lines and are high-frequency signal transmission lines. The small circle ◯ is a through hole H that electrically connects the front surface and the back surface of the substrate.

In FIG. 8, the same reference numerals as those in FIG. 7 represent corresponding parts. The high frequency signal is introduced from the high frequency input signal terminal T _1, and applied to the gate electrode of TR1 via the input circuit composed of SL ₁ , SL ₂ , C ₃ and C ₅ . Also S
L ₂ also serves as the DC bias circuit of TR 1, and applies the DC bias voltage supplied from the bias power supply terminal T ₂ to the gate electrode G. The high frequency signal is the transistor TR
The signal is amplified by 1 and is output from the high frequency output signal terminal T ₄ to the outside through the output circuit composed of SL ₃ , SL ₄ , C ₄ and C ₆ . The DC drain voltage is supplied from the DC bias power supply terminal T ₃ and applied to the drain electrode D via SL ₄ .

Conventionally, in order to reduce the size of the above hybrid IC, chip parts (C _{1 to} C ₆ ) and active elements (T
R1) downsized and stripline (SL ₁ ~ S
L ₄ ) The width was narrow. However, if the outputs handled are made the same and the components are made smaller and the stripline width is made narrower, mutual interference of high-frequency signals occurs, resulting in deterioration of characteristics particularly in stability.

[0006]

As described above, in the high frequency hybrid IC, the circuit pattern is formed on the circuit board by using the thick film strip line, but the strip lines are close to each other. Where
High frequency signals interfere with each other and become output noise.
Further, when the input circuit before the active element (transistor) and the output circuit after the active element come close to each other, the interference is remarkable and the circuit oscillates to deteriorate the stability.

For this reason, the strip lines constituting each circuit must be spaced at a distance that does not cause interference depending on the electric power handled by each, and miniaturization cannot be realized.

Further, when the input and output circuits are close to each other, even if an output control terminal (for example, terminal T _{2 in} FIG. 7) is used to turn off TR1 to set the output to 0, an input leak occurs and a signal appears at the output terminal. , The isolation characteristic between the input and the output is deteriorated. In particular, oscillation is likely to occur at excessive output due to environmental changes such as temperature.

According to the present invention, in a high-frequency hybrid IC, interference of high-frequency signals between adjacent strip lines constituting an input / output circuit or the like is reduced, oscillation is prevented, and stability is improved. It is an object of the present invention to provide a hybrid IC that enables downsizing of the device by making the distance between striplines smaller than before.

[0010]

The present invention according to claim 1 has a high frequency circuit mounted on the front surface thereof, and a ground conductor thick film (for example, a laminated film of Cu or the like) having a constant potential (ground potential) on the back surface.
A dielectric circuit board having a film held thereon, an active element (such as a transistor), a passive element (such as a chip component), and a high-frequency signal terminal (such as an input signal terminal).
Output signal terminal, etc.) and DC bias power supply terminal (for example, external power supply terminal for supplying DC voltage to the electrodes of active elements)
And a stripline connecting them, a high frequency hybrid integrated circuit is provided with an electrostatic shielding island wiring line formed in a substrate region between adjacent striplines and grounded by a through hole. It is a characteristic hybrid integrated circuit.

According to a second aspect of the present invention, a plate fence-shaped electrostatic shielding member (see, for example, FIG. 4) standing upright in contact with the island-shaped wiring line or a plate fence-shaped roof having a roof is provided. 5. The hybrid integrated circuit according to claim 1, further comprising the electrostatic shielding member (see FIG. 5).

In the present specification, the strip line is a transmission line formed by disposing a bare conductor thick film on a ground conductor thick film via a dielectric. Moreover, the island-shaped wiring line for electrostatic shielding grounded by the through-hole is, like the strip line, on the ground conductor thick film via the dielectric,
Although a bare conductor thick film is arranged, the conductor thick film is grounded by a through hole and can be regarded as a substantially constant potential (ground potential) over the entire island region. The through hole is a hole that penetrates the substrate,
When simply referred to as a through hole, it is a through hole for electrically connecting the front surface and the back surface of the substrate with a conductor interposed in the hole.

A part of the island-shaped wiring line also serves as a ground terminal for a chip part or the like, and a part thereof does not also serve as a ground terminal for a chip part or the like. These island-shaped wiring lines are provided in the substrate region between the adjacent strip lines and are provided so as to separate the adjacent strip lines from each other along the longitudinal direction. The island-shaped wiring line is
It has to be substantially at ground potential, has an appropriate number of through holes, and is divided into a plurality of parts if desired.

When this hybrid IC is operated, the high-frequency signal potential or electric field on the strip line fluctuates, but the potential of the island-shaped wiring line interposed between the ground conductor thick film on the back surface of the substrate and the strip line is always constant. Since the strip lines are held at the ground potential of and do not change, adjacent strip lines are electrostatically shielded from each other, and mutual interference due to electric field fluctuations is significantly reduced. As a result, oscillation can be prevented, the stability of the characteristics can be improved, and the distance between the circuits can be made narrower than in the past, so that the device can be downsized.

The plate fence-shaped electrostatic shielding conductive member or the plate fence-shaped electrostatic shielding conductive member provided with a roof on the top is always held at a constant potential (ground potential) through the island wiring line. The electrostatic shielding between adjacent strip lines is performed three-dimensionally and more effectively.

[0016]

The present invention will be described in more detail with reference to the following examples. FIG. 1 is a plan view of a first embodiment of a hybrid IC of the present invention. In FIG. 1, the same reference numerals as those in FIG. 7 indicate corresponding parts. Reference numeral 1 is a dielectric (aluminum oxide) circuit board shown by a one-dot chain line. A high-frequency amplifier circuit (for example, frequency 800MHz band, bandwidth 30-60MHz) is mounted on the front surface, and a copper plate with a ground potential is attached to the back surface. There is. High-frequency amplifier circuit of the surface, MOSFETTR1 active elements, chip capacitors C ₁ -C ₆ passive element, a high frequency input signal terminal T _1, the DC bias power supply terminal T _2, T _3, the high-frequency output signal terminal T ₄ and these It has strip lines SL _{1 to} SL ₄ to be connected and is composed of island-shaped wiring lines SL _{11 to} SL _{15 and the} like which are the features of the present invention.

The island-shaped wiring lines SL _{11 to} SL ₁₅ are made of a thick copper film and are connected to a ground copper plate (not shown) on the rear surface of the substrate by a through hole H (represented by a small circle), so that a high-frequency electric field is generated. Even if it is inside, it substantially holds the ground potential. The island-shaped wiring lines SL ₁₁ and SL ₁₂ also serve as the ground terminals of the chip capacitors C ₅ and C ₃ , respectively, and are interposed in the region between the adjacent strip lines SL ₁ and SL ₂ to connect the strip lines SL ₁ and SL ₂ to each other. Separated from each other.
Further, the island-shaped wiring line SL ₁₃ and the island-shaped wiring line SL ₁₄ also serving as the ground terminal of the chip capacitor C ₄ are provided in the region between the adjacent strip lines SL ₂ and SL ₄ ,
The strip lines SL ₂ and SL ₄ are separated. Similarly, the island-shaped wiring line SL ₁₅ is interposed in the region between the adjacent strip lines SL ₄ and SL ₃ , and SL ₄ and SL
₃ and ₃ are separated from each other.

The high frequency input signal is input from the terminal T ₁ to the gate electrode G of TR1 through the capacitor C ₁ and the input circuit composed of C ₅ , SL ₁ , SL ₂ and C ₃ . The gate bias of the TR1 is applied to the gate electrode G via SL ₂ from the terminal T _2. The high-frequency signal is amplified by the transistor TR1 and is fed from the drain electrode D to SL ₃ ,
The signal is output from the high frequency output signal terminal T ₄ to the outside via C ₂ via the output circuit composed of C ₆ , SL ₄ and C ₄ .

The drain bias of TR1 is supplied to the drain electrode D of TR1 from the DC bias power supply terminal T ₃ via SL ₄ .

During operation of the hybrid IC having the above structure, the high frequency potentials of the strip lines SL ₁ , SL ₂ , SL ₃ and SL ₄ are constantly changing, but the adjacent strip lines are fixed to the ground potential. Island-shaped wiring lines are provided, and together with the ground copper plate on the back surface of the substrate, an electrostatic shielding effect between adjacent strip lines can be obtained.

FIG. 2 is a plan view of a second embodiment of the hybrid IC of the present invention. In this embodiment, TR2 and TR3
It is a hybrid IC equipped with a high-frequency two-stage amplifier circuit that uses the two MOSFETs.

The portion surrounded by the one-dot chain line is a dielectric (aluminum oxide) circuit board 10, on which the high-frequency amplifier circuit is mounted, and the back surface is covered with a copper plate having a ground potential. T
₁₁ is a high frequency input signal terminal, T ₁₂ is a first stage DC bias power supply terminal, T ₁₃ is a final stage DC bias power supply terminal, T ₁₄
Is a high frequency output signal terminal. TR2 of the active element is a MOSFET for the first stage amplification, and TR3 is a MOSFET for the final stage amplification.
Although not shown, it is used with the source grounded. Code 2
Reference numeral 0 is a chip capacitor of a passive element (capacity is not distinguished). The above terminals and devices are connected to each other by copper thick film strip lines SL _{31 to} SL ₃₆ .

The strip line SL ₃₁ is a constituent element of the input circuit, SL ₃₂ is a constituent element of the first stage DC bias power supply circuit, SL ₃₃ and SL ₃₄ are constituent elements of the interstage circuit, and SL ₃₅ is a final element. The SL ₃₆ is a component of the stage DC bias power supply circuit, and the SL ₃₆ is a component of the output circuit. SL ₃₂ also serves as an interstage circuit, and SL ₃₅ also serves as an output circuit.

The island-shaped wiring lines SL _{41 to} SL for electrostatic shielding, which are grounded by the through holes, which is a feature of the present invention.
₄₆ is arranged as follows. That is, the island-shaped wiring lines SL ₄₁ and S also serving as the ground terminal of the chip capacitor 20.
L ₄₂ is a strip line SL of adjacent input circuit elements
_It is provided in the substrate region between ₃₁ and SL32 _of the inter-stage circuit element. The island-shaped wiring line SL ₄₃ and the island-shaped wiring line SL ₄₄ which also serves as the ground terminal of the chip capacitor are strip lines SL ₃₂ , SL ₃₃ and S which are constituent elements of the inter-stage circuit.
It is provided in the substrate region between L ₃₄ and the strip line SL ₃₅ which is a component of the output circuit adjacent to L ₃₄ . The island-shaped wiring line SL ₄₅ and the island-shaped wiring line SL ₄₆ also serving as the ground terminal of the chip capacitor are composed of a strip line SL ₃₅ which is a constituent element of an adjacent output circuit and a strip line SL ₃₆ which is a constituent element of the output circuit. It is provided in the substrate area between.

The high frequency signal is introduced from the high frequency input signal terminal T ₁₁ , is applied to the gate electrode of the MOSFET TR2 for the first stage amplification via the strip line SL ₃₁ of the input circuit, is amplified, and is then amplified from the drain electrode of the FET to the interstage circuit. Is output to. This high-frequency signal passes through the strip lines SL ₃₃ and SL ₃₄ of the interstage circuit, and is passed through the final stage amplification MOSF
Is applied to the gate electrode of the ETTR3, is further amplified by the FET, it is outputted to the outside through the stripline SL ₃₆ and the high-frequency output signal terminal T ₁₄ of the output circuit from the drain electrode.

The operation and effect of the electrostatic shielding island wiring line grounded by the through hole in the second embodiment is almost the same as that in the first embodiment.

It should be noted that the conventional thick metal film for a chip capacitor ground terminal and the island-shaped wiring line (thick metal film) which also serves as the ground terminal of the chip capacitor in the above embodiment are different in that the latter is for electrostatic shielding. To do. That is, the island-shaped wiring line of the present invention, in the direction along the strip line, so as to separate adjacent strip lines from each other,
It differs from the conventional one in that the conventional thick metal film for a ground terminal is extended and the number of through holes is increased as desired in order to guarantee the ground potential.

The electrostatic shielding island wiring line has a length, if the island-shaped entire region is substantially held at the ground potential,
The width and the like are not limited. However, according to the trial results, it is desirable that the size of one island wiring line is about (0.3 to 1.2) mm in width and (2 to 8) mm in length. This is presumed to be because if the size of the island-shaped wiring line is increased, a long flow path of high-frequency current is likely to be formed, and it is difficult to make the island-shaped region a substantially uniform ground potential.

Further the number of through holes provided in one island-like wiring line is influenced by correlation and the signal frequency such various conditions and wiring lines and the strip lines, is determined mainly by trials, prospect Summary As the width (
0.3 to 1.2) mm, 1 to 2 when the length (2 to 4) mm,
When the length is (4 to 8) mm, it is 2 to 3. In the above embodiment, the through hole has a diameter of 0.35 mm, and the side wall of the hole is covered with a conductive member by plating or the like.

FIG. 3 shows a sectional view of the island-shaped wiring line in the above-mentioned embodiment in the simplest case. In the figure, reference numeral 1 is a dielectric circuit board made of aluminum oxide, 1a is a ground conductor thick film, 2 is a through hole, and 2a is a plated film. The island-shaped wiring line 12 is made of a thick copper film and is arranged between the adjacent strip lines 11a and 11b.

FIG. 4 and FIG. 5 are sectional views of a conductive member for electrostatic shielding showing an embodiment according to claim 2 of the present invention. Figure 4
In FIG. 5, the same reference numerals as those in FIG. 3 represent the parts corresponding to each other.

In FIG. 4, a conductive material (Cu) 14 for plate fence electrostatic shielding is provided on the island-shaped wiring line 12 with solder 13
Thus, the dielectric circuit board 1 is erected substantially vertically to the main surface. The height of the conductive member (Cu) 14 is about (0.8
~ 8) mm, adjacent strip lines 11a
And 11b are partition walls provided in the region between them. Since the conductive member 14 is electrically connected to the island-shaped wiring line having substantially the ground potential by soldering, the potential can be regarded as substantially the ground potential. That is, the conductive member 14 serves as a ground plate to three-dimensionally and more effectively electrostatically shield the strip lines 11a and 11b. The shape of the plate fence-shaped electrostatic shielding conductive member is a flat plate in the present embodiment, but is not limited to this. For example, the upper portion of the conductive member 14 in FIG.
It does not matter even if it is a conductive plate having a dogleg-shaped cross section that is inclined to either side of b.

FIG. 5 is a sectional view showing an example of a plate-wall-shaped electrostatic shielding conductive member having a roof on the top. That is, soldering 13 is applied to the top of the plate-wall-shaped electrostatic shielding conductive member 14.
Therefore, the conductive roof 15 is provided, and the electrostatic shielding effect is further improved as compared with the case shown in FIG. The shape of the roof 15 is a flat plate in this embodiment, but is not limited to this. For example, a V-shaped one may be used.

The shape of the plate fence-shaped electrostatic shielding conductive member shown in FIG. 4 or FIG. 5 is basically a shape that effectively separates the high-frequency electric fields generated by the adjacent strip lines 11a and 11b. Is desirable.

In the hybrid ICs shown in FIGS. 1 and 2, island-shaped wiring lines for electrostatic shielding are provided in all regions between adjacent strip lines, but for example, adjacent strip lines are the same. If it belongs to a circuit (for example, an input circuit) and its interval is wide, the electrostatic shield island wiring line may be omitted if desired, or a plurality of strips may be provided in the same region between adjacent strip lines. It does not matter if the electrostatic shielding island wiring lines are connected in series and integrated. Further, the plate fence-shaped electrostatic shielding conductive members shown in FIGS. 4 and 5 are basically provided separately for each island wiring line, but island wiring lines provided between strip lines belonging to the same circuit, etc. Then, if desired, the same plate fence-shaped conductive member may be used for bridging.

Isolation characteristics in the 900 MHz band of the small hybrid IC having the structure of the conventional example shown in FIG. 7 and having striplines close to each other and the small hybrid IC of the first embodiment of the present invention shown in FIG. FIG. 6 shows an example of the result of the comparison. The vertical axis of FIG. 6 represents the high frequency output power Po (dB) measured at the terminal T4.
m), the horizontal axis is M supplied to the output control terminal T2
It represents the gate bias voltage V _APC (V) of the OSFET TR1. The curve in the figure is a characteristic curve showing the relationship between the output Po and the output control voltage V _APC . The dotted line is obtained for each of the conventional small hybrid ICs, and the solid line is obtained for each of the small hybrid ICs to which the present invention is applied. It is the result. In the conventional hybrid IC, V _{APC is set} to 2
Also V below (TR1 is turned off) and the output trying to "zero", the input leakage caused by the interference of the high frequency signal, to the signal of -35dBm that appears at the output terminal T _4, the hybrid IC of the present invention Input leakage is -55 dB
It is significantly reduced to m, and the isolation characteristics are improved. Also, the dynamic range when handling digital signals (for example, signal width between on and off or 1 and 0)
However, by using the island wiring line of the present invention, 78 dB
To 98 dB.

By providing the electrostatic shielding island wiring lines according to the present invention at positions where adjacent strip lines belong to different circuits and are close to each other, interference of high frequency signals on both lines is significantly reduced. Therefore, parasitic oscillation can be prevented and stable operation can be performed. In particular, the stabilizing effect at high output is remarkable, and parasitic oscillation can be prevented even at the time of excessive output due to environmental changes. As a result, even if the distance between the strip lines is narrower than the conventional one, the isolation characteristic is not deteriorated at all, the mutual interference of high frequency signals can be prevented, and further, the hybrid I
The size of C can be reduced.

Although the amplifier circuit is taken as the high frequency circuit in the above embodiment, the present invention can of course be applied to other circuits which need to prevent interference of high frequency signals between strip lines.

Further, in the above embodiment, the MO is used as the active element.
A high-frequency circuit having SFET as a passive element and a chip capacitor as a passive element has been taken up, but a circuit including a bipolar transistor or the like as an active element and an inductance (coil) element or the like as a passive element may be used.

[0040]

According to the present invention, the island-shaped wiring line for electrostatic shielding is provided in the region between the adjacent strip lines that form the input / output circuit of the high frequency hybrid IC, so that the adjacent strip lines are provided. A hybrid that reduces the interference of high-frequency signals with each other, prevents parasitic oscillation, etc., and improves the stability of the circuit, and also enables the distance between striplines to be smaller than before, thus enabling a device to be downsized. I was able to provide the IC.

[Brief description of drawings]

FIG. 1 is a schematic plan view showing a first embodiment of a hybrid IC of the present invention.

FIG. 2 is a schematic plan view showing a second embodiment of the hybrid IC of the present invention.

FIG. 3 is a cross-sectional view showing an example of an electrostatic shielding island wiring line according to the present invention.

FIG. 4 is a cross-sectional view showing an example of a plate fence-shaped electrostatic shielding conductive member of the present invention.

FIG. 5 is a cross-sectional view showing an example of a plate fence-shaped electrostatic shielding conductive member having a roof on the top of the present invention.

FIG. 6 is a characteristic curve showing the isolation characteristic of each of the small hybrid ICs of the example of the present invention and the conventional example.

FIG. 7 is a schematic plan view showing an example of a conventional hybrid IC.

8 is an electric circuit diagram of the hybrid IC shown in FIG.

[Explanation of symbols]

1,10 dielectric circuit board 11a, 11b stripline 12 island-like wiring line 14 a plate fence-like electrostatic shielding conductive member 15 roof 20 passive element (chip capacitor) TR1 to TR3 active element (MOSFET) C ₁ ~C ₆ Passive element (chip _{capacitor) T 1, T 4, T} 11, T 14 high-frequency signal terminal _{T 2, T 3, T 12} , T 13 DC bias power supply terminal SL ₁ to SL ₄ strip line SL ₃₁ to SL ₃₆ strip line SL ₁₁ ~ SL ₁₅ Island line for electrostatic shielding SL ₄₁ ~ SL ₄₆ Island line for electrostatic shielding

Claims (2)

[Claims] 1. A dielectric circuit board on which a high frequency circuit is mounted on the front surface and a ground conductor thick film is deposited on the rear surface, an active element, a passive element, a high frequency signal terminal, a DC bias power supply terminal, and these. A high-frequency hybrid integrated circuit having a connecting strip line, comprising an electrostatic shielding island wiring line formed in a substrate region between adjacent strip lines and grounded by a through hole. Hybrid integrated circuit. 2. The board fence electrostatic shielding conductive member standing upright on the island wiring line or the board fence electrostatic shielding conductive member provided with a roof at the top. Hybrid integrated circuit.