JPH071923B2 - Integrated video signal processing circuit - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a video signal processing circuit widely used in a magnetic recording / reproducing device (hereinafter abbreviated as VTR) and the like, and particularly to a video signal processing circuit suitable for integration. .

[Background of the Invention]

In video equipment such as a VTR, the level of the video signal synchronizing section and the level of the video section are set to a ratio of 40: 100. The video signal processing is performed with reference to the sync head (so-called sync chip) level or pedestal level, but a clamp circuit is widely used to hold the sync chip level or pedestal level. The basic configuration of this clamp circuit is, for example, Japanese Patent Laid-Open No. 50-11.
As described in No. 3206, the circuit shown in FIG. 4 is widely used. However, in this case, there has been a problem that the synchronizing portion of the output signal of the clamp circuit becomes shorter than the input signal, so-called sync contraction occurs, and waveform distortion occurs in the output signal synchronizing portion of the clamp circuit.

That is, in FIG. 4, the input video signal 1 is the transistor 2
An emitter follower circuit consisting of is used to drive the next stage capacitor 3, transistors 4 and 5 with low impedance. At this time, the transistor 4 becomes conductive during the synchronizing period of the video signal, and the sync tip voltage is held at the voltage corresponding to the voltage source 6.

On the other hand, in the asynchronous period, the transistor 4 is cut off, the electric charge of the capacitor 3 is hardly discharged, and the video signal is passed as it is. Here in the synchronization signal, the video signal 1 becomes to be divided by the AC impedance re ₄ of transistor 2 AC impedance re ₁ and transistor 4, the equivalent circuit is shown as Figure 5. Therefore, the synchronization part Will be shortened by the amount equivalent to. Thus, when the signal that has passed through this clamp circuit is supplied to a monitor TV, for example, the TV
It caused problems such as synchronization becoming difficult.

On the other hand, it has been proposed to provide a sync expansion circuit as shown in FIG. 6 which utilizes the non-linearity of the germanium diode 6 ', but in this case, the average video level (APL) of the video signal changes. Then, there is a drawback that the expanded portion is changed and expanded to the video portion of the video signal.

[Object of the Invention]

It is an object of the present invention to provide a video signal processing circuit which eliminates the above-mentioned drawbacks of the prior art and can eliminate the waveform distortion of the video signal synchronizing section with a simple circuit configuration suitable for integration.

[Outline of Invention]

In order to achieve the above object, the present invention clamps the sync tip voltage of an input video signal to a certain reference voltage, inputs the clamped signal to a first differential amplifier having a sufficiently wide linearity, and After being DC-shifted, they are input to a second differential amplifier having a narrow dynamic range, a voltage corresponding to the reference voltage is supplied to the other input terminals of both differential amplifiers, and the outputs of both differential amplifiers are added. In this configuration, the second differential amplifier is operated between the sync tip level and the pedestal level to perform sync extension.

Example of Invention

An embodiment of the present invention will be described below with reference to FIGS. 1 and 2.

FIG. 1 is a block diagram showing a circuit configuration of a main part of a VTR to which the present invention is applied, and FIG. 2 is a specific signal processing circuit of the present invention.

In FIG. 1, the FM luminance signal and the low-frequency conversion color signal detected by the magnetic head 7 are amplified by the preamplifier 8,
The luminance signal FM-modulated at the time of recording is demodulated by the FM demodulation circuit 9, and then the reproduced luminance signal is obtained via the de-emphasis circuit 10. On the other hand, the output of the preamplifier 8 is converted into a reproduction chroma signal via the color signal processing circuit 11. 12
Is a mixing circuit for mixing the reproduction luminance signal and the reproduction chroma signal. Since the level of the reproduction luminance signal from the de-emphasis circuit 10 is usually high, it is first clamped by the clamp circuit 13 and then mixed by the mixer 14. Therefore the mixing circuit 12
The above-mentioned sync contraction occurs in the output of. Therefore, the video amplifier circuit 15 re-clamps the video signal, amplifies the video signal to a predetermined level, and extends the sync to eliminate the waveform distortion in the synchronization section.

FIG. 2 shows a specific circuit example of the video amplifier circuit 15, in which 16 is a video signal input terminal and 17 is an integrated circuit (hereinafter referred to as an integrated circuit).
An IC (abbreviated as IC) pin, 18 is a wide dynamic range first amplifier that can amplify an input video signal without distortion, and 19 is a high gain second amplifier.

The circuit operation of FIG. 2 will be described below with reference to FIG.
In FIG. 2, the video signal having the sink contraction input to the input terminal 16 is clamped by the capacitor 20 and the transistor 21, and a waveform as shown by 23 in FIG. 3A is output to the emitter of the transistor 22. The waveform 24 shown by the dotted line in FIG. 3 (a) is a good video signal without sync shrinkage, and the difference between the synchronizing portions of the waveforms 23 and 24 is caused by the clamp operation by the clamp circuit 13 and the transistor 21. It is a thing. Next, one of the clamped video signals from the emitter terminal of the transistor 22 is directly input to the first amplifier 18, and the other is DC-shifted by the resistor 25 and the constant current source 26, and then input to the second amplifier 19. It The reference voltage 28 shown by the alternate long and short dash line in FIGS. 3 (a) and 3 (b) is input to the other input terminal of both amplifiers via the transistor 27.

Here, the first amplifier is an amplifier having a wide dynamic range by setting the resistors 29 and 30 and the constant current sources 31 and 32 so that the input video signal can be amplified without distortion. Therefore, as the output current signal of the first amplifier, a waveform signal equivalent to the input waveform 23 is obtained as shown in FIG.

On the other hand, the second amplifier has a narrow dynamic range
At 19, since both inputs become as shown by the waveforms 28 and 33 in FIG. 3 (b), the output current of the second amplifier 19 is switched between the sync tip level and the pedestal level, and this output current is As shown in FIG. 3 (d). further,
The output current signals of both amplifiers are mixed by the resistor 30 to form the waveform shown in FIG. 3 (e), and a waveform signal equivalent to the good waveform 24 shown by the dotted line is obtained. FIG. 3 (f) shows a voltage signal output to the output terminal 34 via the resistor 30, which is equivalent to the waveform 24, and a good video signal without sync shrinkage can be obtained.
In addition, the structure of the present invention is composed of a transistor and a resistor, is suitable for integration, and has an effect that it can be realized in a small size and at low cost.

〔The invention's effect〕

As described above, according to the present invention, in a circuit that processes a video signal by performing a clamp operation, a good video signal can be obtained without causing waveform distortion of the video signal, particularly sync contraction in the synchronization section. A processing circuit can be realized.

[Brief description of drawings]

FIG. 1 is a block diagram of a VTR to which the present invention is applied, FIG. 2 is a circuit diagram showing an embodiment of the present invention, FIG. 3 is a waveform diagram for explaining the operation of the present invention, FIG. 4 and FIG. Is a circuit diagram showing a conventional signal processing circuit, and FIG. 5 is a diagram for explaining the operation of the circuit shown in FIG. 15 …… video amplifier circuit, 3,20 …… capacity 16 …… input terminal, 17 …… IC input pin 18 …… first amplifier, 19 …… second amplifier 26,31,32 …… constant current source , 34 …… Output terminal

 ─────────────────────────────────────────────────── ─── Continuation of front page (72) Inventor Shigehisa Yamamoto 1479 Kamimizumoto-cho, Kodaira-shi, Tokyo Hitachi My Cross Computer Engineering Co., Ltd. (72) Inventor Takayuki Mori 1479, Kamimizumoto-cho, Kodaira-shi, Tokyo Hitachi Mai Cross Computer Engineering Co., Ltd. In-house (56) References Japanese Patent Laid-Open No. 59-50678 (JP, A) Actual No. 56-167682 (JP, U)

Claims (1)

[Claims] 1. A video signal processing circuit for outputting a video signal via a clamp circuit, a clamp means for fixing a sync tip level of a video signal to a voltage corresponding to a reference voltage source, an output of the clamp means and the above. A first amplifying means which is supplied with a voltage corresponding to a reference voltage source and amplifies and outputs a difference between the two, and a DC shift means which DC-shifts one of the output of the clamp means or the voltage corresponding to the reference voltage source. And a signal of the output of the clamp means or the voltage corresponding to the reference voltage source that is not supplied to the DC shift means and the output of the DC shift means, and the difference between the two is amplified and output. 2. An integrated video signal processing circuit comprising: the amplifying means and the mixing means for mixing both outputs of the first and second amplifying means.