JPH0722899A - Signal processor - Google Patents
Signal processorInfo
- Publication number
- JPH0722899A JPH0722899A JP18206893A JP18206893A JPH0722899A JP H0722899 A JPH0722899 A JP H0722899A JP 18206893 A JP18206893 A JP 18206893A JP 18206893 A JP18206893 A JP 18206893A JP H0722899 A JPH0722899 A JP H0722899A
- Authority
- JP
- Japan
- Prior art keywords
- input signal
- input
- filter
- output
- signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000004044 response Effects 0.000 abstract description 3
- 230000004043 responsiveness Effects 0.000 abstract description 3
- 238000001914 filtration Methods 0.000 abstract 1
- 230000006870 function Effects 0.000 description 3
- 238000010586 diagram Methods 0.000 description 2
- 238000000034 method Methods 0.000 description 1
Landscapes
- Filters And Equalizers (AREA)
- Networks Using Active Elements (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は、ディジタル装置等でサ
イクリックに信号を入力する装置の信号処理装置に関す
る。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a signal processing device for a device for cyclically inputting a signal in a digital device or the like.
【０００２】[0002]
【従来の技術】従来、ディジタル装置でアナログ信号を
入力する場合は、信号のばらつきをアナログ的に処理し
た後、Ａ／Ｄ変換器を用いてサンプリングするのが一般
的である。アナログ処理にはフィルタが用いられる。こ
のフィルタは、直流レベルで入力するため、ローパスタ
イプを使用する。ローパスフィルタは、その遮断周波数
に応じてインディシャル応答に時間遅れを生ずる。2. Description of the Related Art Conventionally, when an analog signal is input by a digital device, it is general to process the signal variation in an analog manner and then sample it using an A / D converter. A filter is used for analog processing. This filter uses a low-pass type because it inputs at a DC level. The low-pass filter causes a time delay in the indicial response according to its cutoff frequency.
【０００３】[0003]
【発明が解決しようとする課題】ところで、三相全波整
流した電圧波形は本質的にリップル成分を含んでいる。
これを、サイクリックに信号を入力するディジタル制御
装置、たとえば自動電圧調整機に入力した場合、安定し
た出力が得られない。By the way, the three-phase full-wave rectified voltage waveform essentially contains a ripple component.
When this is input to a digital control device that cyclically inputs a signal, for example, an automatic voltage regulator, a stable output cannot be obtained.
【０００４】そこで本発明は、リップル成分を含む信号
をディジタル制御装置等で処理しようとする場合、定常
的にはリップルの影響を受けず安定で、かつ急変する入
力に対しては敏速に応答する信号処理装置を提供するこ
とを目的とする。Therefore, according to the present invention, when a signal including a ripple component is to be processed by a digital controller or the like, it is stable without being affected by ripples and responds promptly to an abruptly changing input. An object is to provide a signal processing device.
【０００５】[0005]
【課題を解決するための手段】本発明の信号処理装置
は、入力信号の時間変化が所定値よりも大きいときは入
力信号をそのまま出力し、入力信号の時間変化が所定値
よりも小さいときはフィルタ演算を施して出力するよう
にした構成とする。The signal processing device of the present invention outputs the input signal as it is when the time change of the input signal is larger than a predetermined value, and when the time change of the input signal is smaller than the predetermined value. The configuration is such that filter calculation is performed and output.
【０００６】[0006]
【作用】本発明の信号処理装置においては、入力信号の
時間変化が所定値よりも大きいときは入力信号をそのま
ま出力するので応答遅れがない。また、入力信号の時間
変化が所定値よりも小いときは入力信号をフィルタを経
て出力するので安定した出力が得られる。In the signal processing apparatus of the present invention, when the time change of the input signal is larger than the predetermined value, the input signal is output as it is, so there is no response delay. Further, when the time change of the input signal is smaller than the predetermined value, the input signal is output through the filter, so that a stable output can be obtained.
【０００７】[0007]
【実施例】本発明の実施例の信号処理装置を等価的に図
１に示す。この図のように、信号処理装置１は、入力端
子２１と出力端子２２の間に直列に接続したフィルタ２
および切替器３と、フィルタ２の入力側に接続したサン
プラー４と、切替器３の出力側に接続したメモリ５と、
サンプラー４とメモリ５の保持する電流値や電圧値を比
較し切替器３を操作する制御器６とを備える。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A signal processing apparatus according to an embodiment of the present invention is equivalently shown in FIG. As shown in this figure, the signal processing device 1 includes a filter 2 connected in series between an input terminal 21 and an output terminal 22.
And a switch 3, a sampler 4 connected to the input side of the filter 2, and a memory 5 connected to the output side of the switch 3.
The controller 6 is provided with a sampler 4 and a controller 6 for operating the switching device 3 by comparing the current value and the voltage value held in the memory 5.
【０００８】この信号処理装置の動作は一定時間ごとに
一つのファンクションを実行するリアルタイム処理とす
る。そのフローチャートを図２に示す。The operation of this signal processing apparatus is real-time processing that executes one function at regular time intervals. The flowchart is shown in FIG.
【０００９】入力信号Ｘはリップルを含んだまま入力さ
れる。これと前回出力値Ｙ（Ｎ−１）との偏差の絶対値
が設定値Ｓより大きいか否かの判定を行う（ステップ３
１）。設定値Ｓはリップルの含有率に裕度を考慮した値
とする。The input signal X is input with ripples included. It is determined whether the absolute value of the deviation between this and the previous output value Y (N-1) is larger than the set value S (step 3).
1). The set value S is a value in which the margin is taken into consideration in the ripple content rate.
【００１０】 ｜Ｘ−Ｙ（Ｎ−１）｜＞Ｓ ・・・・（１） この条件が成立していれば、今回出力値はＹ（Ｎ）＝Ｘ
とする（ステップ３２）。| X−Y (N−1) |> S (1) If this condition is satisfied, the current output value is Y (N) = X
(Step 32).
【００１１】（１）式の条件が成立していなければ、次
式の一次遅れフィルタ演算を実施する（ステップ３
３）。If the condition of the expression (1) is not satisfied, the first-order lag filter operation of the following expression is executed (step 3).
3).
【００１２】 Ｙ（Ｎ）＝（Ｘ−Ｙ（Ｎ−１））＊Ｔ＋Ｙ（Ｎ−１） ・・・・（２） ここでＴは一次遅れフィルタの時定数を決める設定値と
し、次のように算出する。 Ｔ＝0.632*ファンクショ
ンの実行時間／時定数例えば、5msec のファンクション
で 100msec の時定数を得るにはＴ＝0.0316とする。Y (N) = (X−Y (N−1)) * T + Y (N−1) (2) where T is a set value that determines the time constant of the first-order lag filter, and To calculate. T = 0.632 * Function execution time / time constant For example, to obtain a time constant of 100 msec with a function of 5 msec, set T = 0.0316.
【００１３】本実施例の信号処理装置による信号処理の
例を図３に示す。(a) は入力信号波形であり、(B) は出
力信号波形である。Ａ部とＣ部では入力値の変化が大き
く、前記（１）式が成立するため、入力と出力が等し
く、応答性が良くなっている。。Ｂ部では入力信号にリ
ップルをふくむが、このリップルは設定値Ｓよりも小さ
いので、一次遅れフィルタ演算が施され、出力波形は滑
らかになっている。An example of signal processing by the signal processing apparatus of this embodiment is shown in FIG. (a) is the input signal waveform and (B) is the output signal waveform. Since the change of the input value is large in the A part and the C part and the equation (1) is satisfied, the input and the output are equal and the responsiveness is improved. . In the section B, the input signal includes a ripple, but since this ripple is smaller than the set value S, the first-order lag filter operation is performed and the output waveform is smooth.
【００１４】[0014]
【発明の効果】以上のように本発明の信号処理装置によ
れば、高い応答性と高い安定性という二つの要件を満た
すことができる。As described above, according to the signal processing device of the present invention, it is possible to satisfy the two requirements of high responsiveness and high stability.
【図１】本発明の実施例の信号処理装置の等価回路図FIG. 1 is an equivalent circuit diagram of a signal processing device according to an embodiment of the present invention.
【図２】本発明の信号処理装置の動作を示すフローチャ
ートFIG. 2 is a flowchart showing the operation of the signal processing device of the present invention.
【図３】本発明の信号処理装置の入出力波形を例示する
図FIG. 3 is a diagram illustrating an input / output waveform of the signal processing device of the present invention.
１・・信号処理装置 ２・・フィルタ ３・・切替器 ４・・サンプラ
ー ５・・メモリ ６・・制御器1 ... Signal processing device 2 ... Filter 3 ... Switching device 4 ... Sampler 5 ... Memory 6 ... Controller
Claims (1)
いときは入力信号をそのまま出力し、入力信号の時間変
化が所定値よりも小さいときはフィルタ演算を施して出
力するようにしたことを特徴とする信号処理装置。1. When the time change of the input signal is larger than a predetermined value, the input signal is output as it is, and when the time change of the input signal is smaller than the predetermined value, a filter operation is performed and output. A characteristic signal processing device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18206893A JPH0722899A (en) | 1993-06-29 | 1993-06-29 | Signal processor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18206893A JPH0722899A (en) | 1993-06-29 | 1993-06-29 | Signal processor |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0722899A true JPH0722899A (en) | 1995-01-24 |
Family
ID=16111794
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP18206893A Pending JPH0722899A (en) | 1993-06-29 | 1993-06-29 | Signal processor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0722899A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100849972B1 (en) * | 2007-01-25 | 2008-08-01 | 삼성전자주식회사 | RF filter, digital broadcast receiving tuner and RF signal processing device using the RF filter device |
| US11642581B1 (en) * | 2022-01-03 | 2023-05-09 | Matthew Gucu | Water game apparatus |
-
1993
- 1993-06-29 JP JP18206893A patent/JPH0722899A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100849972B1 (en) * | 2007-01-25 | 2008-08-01 | 삼성전자주식회사 | RF filter, digital broadcast receiving tuner and RF signal processing device using the RF filter device |
| US11642581B1 (en) * | 2022-01-03 | 2023-05-09 | Matthew Gucu | Water game apparatus |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN112311269B (en) | Dead zone compensation method and device, inverter and vehicle | |
| US7126832B2 (en) | Controller for power converter | |
| JPH06233530A (en) | Variable-gain voltage control system of dc/dc converter using detection of load current | |
| JP3234109B2 (en) | Process control equipment | |
| JPS5941004A (en) | Process control device | |
| JPS624951B2 (en) | ||
| JPH03273890A (en) | Digital servo controlling equipment | |
| JPH0638530A (en) | DC power supply with feedforward control function | |
| JPH0638372A (en) | Power system simulator | |
| JPH06105562A (en) | Pwm controller for inverter | |
| JP3334005B2 (en) | Current limit circuit | |
| JPH02117202A (en) | Parametric equalizer | |
| JP2516168B2 (en) | Integration time control type digital integration circuit | |
| JPH09121458A (en) | Control method of active filter | |
| JPH01205202A (en) | auto tuning controller | |
| JPH09289798A (en) | Signal detection device | |
| JPH01250127A (en) | Data input method | |
| JPH04157324A (en) | Signal processing method for electromagnetic flowmeter | |
| JPH0196561A (en) | Dc voltage generating circuit | |
| JPS6323586A (en) | Sepeed controller for induction motor | |
| JPH05127701A (en) | Controller | |
| JPH03183357A (en) | chopper control device | |
| JPH03154902A (en) | Digital controller | |
| JPS6269120A (en) | Signal processing system | |
| JPS59100904A (en) | Control method of process |