JPH0729902A - Method of forming insulating film - Google Patents

Abstract

PURPOSE:To ensure non-excitation time of active species and improve the fluidity of reaction intermediates by intermittently applying AC or DC and intermittently generating plasma. CONSTITUTION:In an H2O-TEOS plasma CVD method., ammonia is added as basic catalyst capable of forming TEOS reaction product of high molecular weight on a wafer surface, and RF output is intermittently applied in order to smoothly progress the fluidity of reaction product on a wafer. A wafer wherein eat layer insulating film 22 composed of silicon oxide or the like and an Al wiring layer 23 are formed on a semiconductor substrate 21 composed of silicon or the like is prepared. An interlayer film 24 is formed by a normal method, in order to supplement the film quality of plasma CVD wherein basic gas (basic catalyst) is added in the next process. Thereby a flattened insulating film excellent in film quality can be formed.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming an insulating film. INDUSTRIAL APPLICABILITY The present invention can be used in the field of manufacturing semiconductor integrated circuits such as highly miniaturized and highly integrated memory devices.

[0002]

2. Description of the Related Art With the advancement of devices, wiring technology is advancing toward miniaturization and multilayering. However, high integration may be a factor that reduces reliability. This is because the step of the interlayer insulating film becomes large and steep due to the miniaturization of wiring and the progress of multi-layering, and the processing accuracy and reliability of the wiring formed thereon are lowered. For this reason, it is necessary to improve the flatness of the interlayer insulating film at present when the step coverage of the Al wiring cannot be significantly improved.

Up to now, various insulating film forming techniques and flattening techniques shown in Table 1 below have been developed. However, when the technique is applied to a fine and multi-layered wiring layer, when the wiring interval is wide, Due to lack of planarization and occurrence of "stain" in the interlayer film at the wiring interval, connection failure between wirings has become an important problem.

[0004]

[Table 1]

Therefore, as a means for improving this problem, a technique for flattening an Al wiring having a high aspect ratio by plasma CVD of an organic silicon compound containing water has been attracting attention. This kind of technology is described, for example, in the 1993 38th Applied Physics Association Association Lecture (P.632, 2).
9p-v-8, 29p-v-9).

On the other hand, the self-flow shape is maintained,
As a method of removing organic components in the film, it is necessary to form a reaction product with a high molecular weight on the wafer surface that does not contain organic components and can obtain a flow shape. There has been proposed a method of adding a basic gas as a catalyst capable of remarkably improving the rate of.

However, although the addition of the basic gas can remove the organic component by the dehydration condensation reaction, the fluidity is decreased by the dehydration condensation reaction. For this reason, it is necessary to bury a groove with a high aspect ratio in the future, so that improvement in fluidity is further desired.

[0008]

The present invention provides a method for forming an insulating film on the surface of a substrate by a plasma CVD method using at least a basic gas, water and an organic silicon compound. The solution is to apply the output intermittently.

[0009]

In the method of forming an insulating film according to the invention of the present application, plasma is intermittently generated by intermittently applying alternating current and direct current, and the flow of the reaction intermediate is ensured by securing the non-excitation time of active species. It will be done smoothly. As a result, the fluidity reduced by the addition of the basic catalyst is recovered, and the interlayer insulating film with good film quality can be formed.

Further, according to the present invention, such a process can be sufficiently realized by using a commonly used parallel plate type plasma CVD apparatus.

[0011]

EXAMPLES Specific examples of the present invention will be described below. Here, prior to the description of the actual insulating film forming process, a parallel plate type CVD apparatus used for carrying out the present invention will be described with reference to FIG.

Reference numeral 11 in the drawing denotes a reaction vessel, and an introduction pipe 12 for introducing an organometallic compound (for example, TEOS) and an oxygen gas such as an oxidant in the direction of arrow B1 is provided above the reaction vessel 11. Has been. A dispersion plate 13 and a shower head 14 capable of uniformly dispersing the introduced gas in the reaction vessel 11 so as to ensure high in-plane uniformity.
Is provided. Further, inside the reaction container 11, a wafer mounting table 16 on which a wafer 15 as a substrate to be processed is mounted.
Is provided. Further, a heater 17 for keeping the wafer 15 at a predetermined temperature is embedded.

Next, plasma CV using the reaction vessel 11
An actual process example of the D method will be described.

(Embodiment 1) In this embodiment, the present invention is applied to the case where a semiconductor device is obtained by forming a planarization insulating film on a substrate having a step during the manufacture of a semiconductor circuit. That is, in this embodiment, ammonia is added as a basic catalyst capable of forming a reaction product of TEOS having a high molecular weight on the surface of the wafer in the H ₂ O-TEOS plasma CVD method, and the reaction product on the wafer is added. The RF output is intermittently applied in order to smoothly proceed the flow. As a method of applying RF output intermittently, R
By connecting a pulse generator to the F transmitter and synchronizing it with the pulse generator, RF output was intermittently applied to the electrodes to generate plasma.

In this embodiment, as shown in FIG. 1A, a wafer is prepared in which an interlayer insulating film 22 made of silicon oxide and an Al wiring layer 23 are formed on a semiconductor substrate 21 made of silicon. . Then, as shown in FIG. 1B, an interlayer film 24 was formed by a conventional method. The interlayer film 24 was formed for the purpose of supplementing the film quality of plasma CVD by adding a basic gas (basic catalyst) in the next step.

Next, as shown in FIG. 1C, an interlayer insulating film 25 was formed under the following conditions.

Gas flow rate: TEOS / H ₂ O / NH ₃ = 50
0/100/10 [sccm] Pressure: 1330 [Pa] Temp: 100 [° C.] RF: 350 [W] Duty Ratio = 0.1 (However, the duty ratio of RF output is Duty Rat
io = Te / Tall Te; actual RF application time, T
all; defined as the Duty ratio by the actual RF application time to the total time as the total time. ) Then Figure 1
As shown in (D), the interlayer film 26 is formed so as to have a required film thickness under the same conditions as those for forming the interlayer film 24, and the interlayer flattening is completed. Further, although tetraethoxysilane was used for forming the interlayer film, it can be appropriately changed to an organic metal alkoxide capable of forming an insulating film. For example, OM
CTS (octa methyl cyclo tet)
ra siloxane), TPOS (tetrapr)
opoxy silane), TMCTS (tetra)
methyl cyclo tetra silox
ane) or the like is also possible.

(Embodiment 2) This embodiment also applies the present invention when a semiconductor device is obtained by forming a planarization insulating film on a substrate having a step during the manufacture of a semiconductor circuit. That is, according to the present invention, methylamine is added as a basic catalyst capable of forming a reaction product of TEOS having a high molecular weight on the wafer surface in the H ₂ O-TEOS plasma CVD method, and the reaction product on the wafer is added. As a method of intermittently applying a DC voltage in order to make the flow rate smoothly, a pulse generator is connected to the DC power supply and synchronized with the pulse generator to intermittently generate a plasma for the application of electrodes. It was made.

In this example, as shown in FIG. 2A, a wafer was prepared in which an interlayer insulating film 32 made of silicon oxide and an Al wiring layer 33 were formed on a semiconductor substrate 31 made of silicon. Then, as shown in FIG. 2B, an interlayer film 34 was formed by a conventional method. The interlayer film 34 was formed for the purpose of supplementing the film quality of plasma CVD by adding a basic gas in the next step.

Then, as shown in FIG. 2C, the interlayer insulating film 35 was formed under the following conditions.

Gas flow rate: TEOS / H ₂ O / CH ₃ NH ₂
= 500/100/100 [sccm] Pressure: 1330 [Pa] Temp: 100 [° C.] DC: 350 [W] Duty Ratio = 0.2 (However, the duty ratio of DC output is Duty Rat
io = Te / Tall Te; actual RF application time, T
all; defined as the duty ratio by the actual DC application time with respect to the total time as the total time. ) Then Fig. 2
As shown in (D), the interlayer film 36 is formed so as to have a required film thickness under the same conditions as those for forming the interlayer film 34, and the interlayer flattening is completed.

(Embodiment 3) This embodiment also applies the present invention to the case where a semiconductor device is obtained by forming a planarizing insulating film on a substrate having a step during the manufacture of a semiconductor circuit. That is, according to the present invention, methylamine is added as a basic catalyst capable of forming a reaction product of TEOS having a high molecular weight on the wafer surface in the H ₂ O-TEOS plasma CVD method, and the reaction product on the wafer is added. The RF output is intermittently applied to the upper and lower electrodes in order to smoothly advance the flow rate. As a method of intermittently applying the RF output, a pulse generator is connected to the RF oscillator and the RF output is intermittently applied to the upper and lower electrodes by synchronizing with the pulse generator to generate plasma. .

In this example, as shown in FIG. 3A, a wafer was prepared in which an interlayer insulating film 42 made of silicon oxide and an Al wiring layer 43 were formed on a semiconductor substrate 41 made of silicon. Then, as shown in FIG. 3B, an interlayer film 44 was formed by a conventional method. The interlayer film 44 was formed for the purpose of supplementing the film quality of plasma CVD by adding a basic gas in the next step.

Next, as shown in FIG. 3C, the interlayer insulating film 45 was formed under the following conditions.

Gas flow rate: TEOS / H ₂ O / NH ₂ = 50
0/100/100 [sccm] Pressure: 1330 [Pa] Temp: 100 [° C.] RF: 350 [W] Duty Ratio = 0.1 to 0.5 (however, the duty ratio of RF output is Duty Rat
io = Te / Tall Te; actual RF application time, T
all; defined as the duty ratio by the actual DC application time with respect to the total time as the total time. ) Then Fig. 3
As shown in (D), the interlayer film 46 is formed so as to have a required film thickness under the same conditions as those for forming the interlayer film 44, and the interlayer flattening is completed. In this embodiment, the frequency of RF applied to the upper and lower electrodes is set to 16.56 MHz, but the frequency of RF applied to the upper and lower electrodes need not be the same or synchronized, and can be changed appropriately.

The present invention is not of course limited to the above embodiment, and the structure, conditions and the like can be changed as appropriate without departing from the spirit of the present invention.

[0027]

As is apparent from the above description, according to the present invention, the fluidity reduced by the addition of the basic catalyst is recovered by the intermittent application of the output, and the flattening insulating film having a good film quality is obtained. There is an effect that can be formed.

[Brief description of drawings]

1A to 1D are process sectional views of a first embodiment of the present invention.

2A to 2D are process sectional views of a second embodiment.

3A to 3D are process cross-sectional views of a third embodiment.

FIG. 4 is an explanatory diagram of a CVD apparatus used in the examples.

[Explanation of symbols]

 21 ... Semiconductor substrate 23 ... Al wiring layer 25 ... Interlayer insulating film

Claims (1)

[Claims] 1. A method for forming an insulating film on a substrate surface by a plasma CVD method using at least a basic gas, water and an organic silicon compound, wherein an AC output or a DC output as a plasma excitation means is intermittently applied. And a method for forming an insulating film.