JPH08204009A - Semiconductor device and method of manufacturing the semiconductor device - Google Patents

Abstract

(57) [Abstract] [Purpose] To realize a highly reliable contact portion with low resistance in the contact hole portion of a semiconductor device. [Structure] After the contact hole opening step (S1 to
4), a refractory metal film forming step (S5) of forming a refractory metal film on the semiconductor substrate, and a silicon ion implantation step of implanting silicon ions into the refractory metal film after the refractory metal film forming step. (S6) and a refractory silicide layer forming step (S7) of performing a heat treatment after the silicon ion implantation step to form a refractory silicide layer on the contact surface of the contact hole with the gate region and the drain region. .

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device having a highly reliable contact portion having a low electric resistance in the contact portion of the semiconductor device, and a manufacturing method for manufacturing the semiconductor device.

[0002]

2. Description of the Related Art In semiconductor integrated circuits, high integration has been advanced in recent years, and a fine pattern with a gate length of 0.35 to 0.25 .mu.m is required, and even in a contact hole connecting a source region and a drain region to a wiring. Diameter is 0.5
Miniaturization of up to 0.4 μm □ is required. For this reason, the electrical resistance at the contact portion becomes large, which causes a load in the circuit operation, which causes a problem that the calculation speed cannot be increased. As a method of reducing the electric resistance in the contact portion, there is a method of forming a silicide layer between the refractory metal and silicon of the semiconductor substrate to reduce the electric resistance. This method will be described with reference to FIGS. 8 to 10, the same components are designated by the same reference numerals. First, as shown in FIG. 8, an oxide film 102 is formed on a semiconductor substrate 101, and a polycrystalline silicon layer 103 having impurities introduced therein is further formed on the oxide film 102. Then, the gate electrode 104 is formed by selectively etching. Next, referring to FIG. 9, using the gate electrode 104 and the field oxide film 105 as a mask, impurity ions are implanted to form a source region 106 and a drain region 107. Then, a thick oxide film 118 to be an interlayer insulating film is deposited. Next, referring to FIG. 10, contact holes 119 are formed in the source region 106 and the drain region 107 by photolithography, and then a refractory metal film 114 is deposited on the entire substrate. Next, heat treatment is performed to form the source region 10
6. In the drain region 107, the silicide portion 120 is formed by mutual diffusion of the refractory metal film 114 and silicon. At this time, for example, when titanium is used as the refractory metal, titanium is deposited to a thickness of 50 nm and 650
When the heat treatment is performed at ℃, a silicide layer having a thickness of 10 to 20 nm is formed.

[0003]

However, in the conventional method of forming the contact portion as described above, since the silicidation is performed only by the heat treatment, the formed silicide layer has a small thickness, and further the film thereof is formed. There is a large variation in thickness. Therefore, in order to form a silicide layer having a sufficient thickness, it is necessary to raise the heat treatment temperature or lengthen the heat treatment time. However, when the heat treatment temperature is increased or the heat treatment time is lengthened, the impurities are re-diffused in the source region and the drain region, and the refractory metal is diffused into the semiconductor substrate to cause a short circuit, a leak, or the like. There is a point. The present invention has been made in order to solve such a problem, and does not cause re-diffusion of impurities in the source region and the drain region, so that the refractory metal does not diffuse into the semiconductor substrate, and thus a short circuit occurs. An object of the present invention is to provide a semiconductor device and a manufacturing method for manufacturing the semiconductor device, which realizes a contact portion having low resistance and high reliability, which does not cause a leak or the like.

[0004]

According to a method of manufacturing a semiconductor device of the present invention, an oxide film is formed on a surface of a semiconductor substrate of a first conductivity type, and a polycrystalline silicon film having impurities introduced therein is formed on the oxide film. Then, a gate electrode forming step of forming a gate electrode structure by selectively removing the polycrystalline silicon film and the oxide film, and a step of forming a gate electrode structure on the surface of the semiconductor substrate after sandwiching the gate electrode. A source / drain region forming step of forming a source region and a drain region in which high-concentration impurities of two-conductivity type are diffused, and an insulating film is deposited on the semiconductor substrate after the source / drain region forming step. A method for manufacturing a semiconductor substrate, comprising: a contact hole opening step of opening a contact hole reaching a drain region and a drain region in the insulating film. After that, a refractory metal film forming step of forming a refractory metal film on the semiconductor substrate, and a silicon ion implantation step of implanting silicon ions into the refractory metal film after the refractory metal film forming step. And a high melting point silicide layer forming step of forming a high melting point silicide layer on the contact surface of the contact hole with the gate region and the drain region after the silicon ion implantation step. .

Further, in the semiconductor device of the present invention, the second conductivity type source and drain regions are formed on the surface of the first conductivity type semiconductor substrate with the channel region interposed therebetween, and the oxide film is formed on the channel region. A semiconductor device having a gate electrode formed via an insulating film covering the source region, the drain region, and the gate electrode, wherein a hole is formed in the insulating film on the source region and the drain region. The contact surface of the contact hole with the gate region and the drain region has a refractory metal silicide layer formed by heat-treating a refractory metal film into which silicon ions are implanted.

[0006]

When the silicon ions are implanted into the refractory metal, the refractory metal deposited in the contact holes is silicided from both the semiconductor substrate side and the silicon ion implanted side, so that the heat treatment time is short and the thickness is high. It acts to form a silicide layer.

[0007]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of a method of manufacturing a semiconductor device according to the present invention will be described below with reference to FIGS. still,
The semiconductor device of the present invention is manufactured by the above manufacturing method. In this embodiment, the semiconductor device is an n-type MOS.
A FET (MOS field effect transistor) is taken as an example.
2 to 7, the same components are designated by the same reference numerals. First, referring to FIG. Boron, which is a p-type impurity ion, is selectively ion-implanted into the p-type silicon substrate 201 corresponding to the first conductivity type semiconductor substrate by a known method to form the p ⁺ -type channel stopper region 211. After that, the field oxide film 205 is formed on the channel stopper region 211 by the selective oxidation method. At this time, the previously implanted ions are diffusion activated and function as a channel stopper.

Subsequently, a dry thermal oxidation process is performed to grow a thermal oxide film 202 serving as a gate oxide film to a thickness of about 10 nm on the silicon substrate 201 in the element formation region, and then the polycrystalline silicon film 203 is thermally oxidized. Approximately 20 on the entire surface of the membrane 202
Deposit to a thickness of 0 nm. After that, arsenic ions are applied to the entire surface of the silicon substrate 201 at 10 Kev, 5 × 10 ¹⁵ / cm.
Implantation is performed under the condition of ² , and then arsenic ions are diffusion activated by heat treatment at about 800 ° C. In this example, after depositing non-doped polycrystalline silicon as described above,
Although ion implantation is performed, doped polycrystalline silicon doped with arsenic or the like may be deposited. Note that the above steps are steps shown in FIG. 1 (indicated by “S” in FIG. 1)
This corresponds to the transistor formation preparation step in 1.

Next, patterning is performed by using a photo-etching method to form a gate electrode 204. This process is shown in Figure 1.
This corresponds to the gate electrode forming step in step 2 shown in FIG. Subsequently, the gate electrode 204 and the field oxide film 20
5 is used as a mask to remove 50
Kev, 6 × 10 ¹⁵ / cm ² conditions, and then about 9
The n ⁺ type source region 212 and the drain region 213 are heat-treated at 00 ° C. to diffuse and activate the implanted arsenic.
Are formed on the silicon substrate 201. This process is shown in Figure 1.
This corresponds to the source / drain region forming step in step 3 shown in FIG.

Then, a silicon dioxide film is formed on the entire surface of the substrate 201 by the CVD method, as shown in FIG.
Deposited to a thickness of nm to form an interlayer insulating film 218. Then, as shown in FIG. 4, the insulating film 2 is formed by using a photo-etching method.
A contact hole 219 is formed from the surface of 18 to the surfaces 212a and 213a of the source region 212 and the drain region 213 of the n ⁺ layer. Note that this step corresponds to the contact hole opening step in step 4 shown in FIG. After that, a refractory metal film 214 made of titanium is deposited to a thickness of about 50 nm on the entire surface of the insulating film 218 including the contact hole 219 by a method such as sputtering. This process corresponds to the high melting point metal film forming process in step 5 shown in FIG.

Next, as shown in FIG. 5, refractory metal film 2
50Kev, 1 × 1 on the entire surface of 14
After the implantation under the condition of 0 ¹⁴ / cm ^2, the semiconductor device is heat-treated at a temperature of about 650 ° C. to silicide the refractory metal film 214. These steps correspond to the step of implanting silicon ions into the refractory metal film and the step of forming a silicide layer in steps 6 and 7 shown in FIG. At this time, in the contact hole 219, the surfaces 212 a and 213 of the source region 212 and the drain region 213 are formed.
The refractory metal film 214a deposited on a is silicidized by the implanted silicon and the silicon from the semiconductor substrate 201. That is, the refractory metal film 214a
On the surface 21 of the silicon in the silicon substrate 201.
2a and 213a interdiffuse inwardly into the refractory metal film 214a, and the ion-implanted silicon interdiffuses inward from the surface 214b of the refractory metal film 214a inwardly into the refractory metal film 214a to give a refractory metal film 214a. Is silicided. In this way, the refractory metal film 214a is silicidized by both the implanted silicon and the silicon of the silicon substrate 201, so that the time required for the heat treatment is
Approximately 700 to 8 of conventional by lamp annealing (RTA) method
Shorter than about 30-60 seconds at 00 ℃, about 65
A thick silicide layer 215 can be formed at 0 to 700 ° C. for 25 to 35 seconds. Also, using tungsten as the refractory metal, the above-mentioned 50Kev, 1 × 10
^When silicon was implanted under the implantation condition of ¹⁴ / cm ² , the silicon concentration in the silicide layer was tungsten: silicon = 1: 2.3 to 3.0, and titanium was used as the refractory metal. In this case, titanium: silicon = 1: 2.0 to 3.0. Thus, the n-type MOSFET in which the refractory metal silicide layer 215 is formed on the surfaces 212a and 213a of the source region 212 and the drain region 213 of the contact hole 219 can be formed. In addition, the silicide layer 216 silicified in a portion other than the contact hole 219 is
It is etched and removed according to the wiring pattern in the subsequent wiring process.

On the other hand, in the above embodiment, after forming the contact hole 219, the refractory metal film 214 is deposited on the entire surface of the insulating film 218, but the following manufacturing method may be used. That is, as shown in FIG.
2 and the surface 212 of the n ⁺ layer of the drain region 213.
After forming the contact hole 219 reaching a, 213a, a refractory metal film 320 made of tungsten having a thickness of about 50 nm is selectively formed on the exposed portion of the surface 212a, 213a located at the bottom of the contact hole 219 by the tungsten CVD method. Deposit to thickness.

Next, silicon ions are applied to the refractory metal film 320 through the contact hole 219 at 50 Kev, 1 × 1.
Implantation is performed under the condition of 0 ¹⁴ / cm ² , and then the semiconductor device is heat-treated at about 650 ° C. At this time, the refractory metal film 320
As in the case of the refractory metal film 214a made of titanium described above, the silicon in the silicon substrate 201 interdiffuses from the surfaces 212a and 213a toward the inside of the refractory metal film 320, and the ion-implanted silicon is The refractory metal film 320 is silicified by interdiffusion from the surface 320a of the refractory metal film 320 toward the inside of the refractory metal film 320. Therefore, the time required for the heat treatment is shorter than in the conventional case, and the thick silicide layer 321 can be obtained. Thus, the surface 212a of the source region 212 and the drain region 213 of the contact hole 219,
An n-type MOSFET in which the refractory metal silicide layer 321 is formed in 213a can be formed. Further, according to this method, since the refractory metal silicide layer 321 is formed only on the surfaces 212a and 213a, the removal step by etching as in the above manufacturing method can be omitted.

As described above, according to the method of manufacturing the semiconductor device of this embodiment, the heat treatment can be performed for a shorter time or at a lower temperature than before, and a silicide layer having a larger thickness can be formed. Source area,
No re-diffusion of impurities occurs in the drain region, and
The refractory metal does not diffuse into the semiconductor substrate, so that short circuit, leak, etc. do not occur. Therefore, by forming the silicide layer, a contact portion having a low resistance is realized, and further, as described above, a short circuit, a leak or the like does not occur, so that a highly reliable contact portion can be realized. Further, it is possible to provide a semiconductor device having a contact portion with low resistance and high reliability.

[0015]

As described above in detail, according to the present invention, by implanting silicon ions into the refractory metal film, the refractory metal deposited in the contact hole portion is implanted into the semiconductor substrate and the silicon ion. Since the silicidation can be performed from both sides, the heat treatment time of the semiconductor device when performing the silicidation can be shortened or the heat treatment temperature can be lowered, and a thick silicide layer can be formed. That is, since the heat treatment can be performed in a shorter time or at a lower temperature than before, re-diffusion of impurities does not occur in the source region and the drain region, and the refractory metal does not diffuse into the semiconductor substrate. Therefore, no short circuit or leak will occur. Therefore, by forming the silicide layer, a contact portion having a low resistance is realized, and further, as described above, a short circuit, a leak or the like does not occur, so that a highly reliable contact portion can be realized. Further, it is possible to provide a semiconductor device having a contact portion with low resistance and high reliability.

[Brief description of drawings]

FIG. 1 is a flowchart showing a manufacturing process in an embodiment of a method for manufacturing a semiconductor device of the present invention.

FIG. 2 is a cross-sectional view of the semiconductor device during a manufacturing process in the embodiment of the method for manufacturing the semiconductor device of the present invention, in which a gate electrode is formed.

FIG. 3 is a cross-sectional view of the semiconductor device during a manufacturing process in an embodiment of the method for manufacturing a semiconductor device of the present invention, in which source and drain regions are formed.

FIG. 4 is a cross-sectional view of the semiconductor device during a manufacturing process in one embodiment of the method for manufacturing a semiconductor device of the present invention, which is a cross-sectional view of the semiconductor device with a refractory metal film deposited thereon.

FIG. 5 is a cross-sectional view of the semiconductor device during a manufacturing process in the embodiment of the method for manufacturing the semiconductor device of the present invention, in which a silicide layer is formed.

FIG. 6 is a cross-sectional view of the semiconductor device during a manufacturing process in another embodiment of the method for manufacturing a semiconductor device of the present invention, which is a cross-sectional view of the semiconductor device with a refractory metal film deposited in the contact holes.

FIG. 7 is a cross-sectional view of the semiconductor device during a manufacturing process in an embodiment of the method for manufacturing a semiconductor device of the present invention, which is a cross-sectional view of the semiconductor device with a silicide layer formed.

FIG. 8 is a cross-sectional view of the semiconductor device during a manufacturing process in a conventional method of manufacturing a semiconductor device, which is a cross-sectional view of the semiconductor device with a gate electrode formed.

FIG. 9 is a cross-sectional view of the semiconductor device during a manufacturing process in a conventional method of manufacturing a semiconductor device, in which the source and drain regions are formed.

FIG. 10 is a cross-sectional view of the semiconductor device during a manufacturing process in a conventional method of manufacturing a semiconductor device, which is a cross-sectional view of the semiconductor device with a silicide layer formed.

[Explanation of symbols]

201 ... Semiconductor substrate, 204 ... Gate electrode, 212 ... Source region, 213 ... Drain region, 219 ... Contact hole, 214 ... Refractory metal film, 215 ... Silicide layer, 320 ... Refractory metal film, 321 ... Silicide layer.

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁶ Identification number Internal reference number FI Technical display location H01L 21/3205 (72) Inventor Yasuyuki Shindo 1-3-6 Nakamagome, Ota-ku, Tokyo Stock company In Ricoh

Claims (4)

[Claims] 1. An oxide film is formed on the surface of a semiconductor substrate of the first conductivity type, a polycrystalline silicon film having impurities introduced therein is formed on the oxide film, and the polycrystalline silicon film and the oxide film are selectively formed. Forming a gate electrode structure by removing the gate electrode structure, and after the gate electrode forming step, a source region in which a high-concentration impurity of the second conductivity type is diffused into the surface of the semiconductor substrate with the gate electrode sandwiched therebetween. And a source / drain region forming step of forming a drain region, and, after depositing an insulating film on the semiconductor substrate after the source / drain region forming step, a contact hole reaching the source region and the drain region is opened in the insulating film. A method of manufacturing a semiconductor substrate, comprising a step of forming a contact hole for forming a hole, wherein a refractory metal film is formed on the semiconductor substrate after the step of forming the contact hole. A refractory metal film forming step, a silicon ion implanting step of implanting silicon ions into the refractory metal film after the refractory metal film forming step, and a heat treatment after the silicon ion implanting step. And a refractory silicide layer forming step of forming a refractory silicide layer on the contact surfaces with the gate region and the drain region in the above. 2. The refractory metal film is selectively formed on the surface of the semiconductor substrate in the source region and the drain region in the opened contact hole in the refractory metal film forming step, and is selectively formed. The method of manufacturing a semiconductor device according to claim 1, wherein the refractory metal film thus formed is implanted with silicon ions in the silicon ion implantation step. 3. The implantation of silicon ions into the refractory metal film in the step of implanting silicon ions is performed at 50 Ke.
v, 1 × 10 ¹⁴ cm ⁻² , and the silicon concentration in the silicide layer formed in the refractory silicide layer formation step is such that the refractory metal: silicon ratio is 1: 2.0.
The manufacturing method of the semiconductor device according to claim 1 or 2, which is in the range of 3.0. 4. A source / drain region of a second conductivity type formed on the surface of a semiconductor substrate of the first conductivity type with a channel region interposed therebetween, and a gate electrode formed on the channel region via an oxide film. A semiconductor device having the source region, the drain region and the gate electrode covered with an insulating film, and the gate region in a contact hole formed in the insulating film on the source region and the drain region, A semiconductor device having a refractory metal silicide layer formed by heat-treating a refractory metal film into which silicon ions are implanted, on a contact surface with a drain region.