JPH08214326A - Non-standard video signal detection circuit - Google Patents

Abstract

(57) [Abstract] [Object] The present invention relates to a non-standard video signal detection circuit for determining whether a video signal of a television receiver, a video tape recorder or a laser disk is a standard video signal or a non-standard video signal. Provide a non-standard video signal detection circuit that can easily determine whether the input video signal is a standard video signal or a non-standard video signal by measuring the length of one frame with a clock synchronized with the burst To do. [Structure] The non-standard video signal detection circuit of the present invention comprises a counter 1, a flip-flop 2 and a determination circuit 3.
With this configuration, according to the present invention, the counter 1 clears with the frame identification signal generated once per frame in synchronization with the input video signal to count the main clock, and the flip-flop 2 outputs the counter output to the frame identification signal. Then, the judgment circuit 3 can judge whether the input video signal is a standard video signal or a non-standard video signal from the output of the flip-flop.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a non-standard detecting circuit for determining whether a video luminance signal of a television receiver, a video tape recorder or a video projector is a standard video signal or a non-standard video signal. Is.

[0002]

2. Description of the Related Art In recent years, attention has been paid to three-dimensional YC separation in which YC separation is performed using a frame memory as the size of a television receiver increases. In the three-dimensional YC separation, if the input video signal is a non-standard video signal, correct calculation cannot be performed. Therefore, it is determined whether the input video signal is a standard video signal or a non-standard video signal. The circuit is important.

A conventional non-standard video signal detection circuit will be described below with reference to FIG. FIG. 6 shows a configuration of a conventional non-standard video signal detection circuit. In FIG. 6, 100
Is a frame memory for delaying the input signal by one frame, 101 is an adder for adding the input signal and the output of the frame memory, and 102 is a BPF for extracting the burst signal from the output of the adder. 10,
Reference numeral 3 is a peak detection circuit for detecting the peak value of the output of the BPF, and reference numeral 104 is a comparison circuit for comparing the output of the peak detection circuit with a certain set value A to obtain the output.

The operation of the non-standard video signal detection circuit configured as described above will be described below with reference to FIG. As shown in FIG. 7, in the NTSC standard video signal, the input signal and the burst signal of the signal one frame before the input signal always have an inverted relationship. Therefore, if the addition between frames is performed, the sum becomes 0 as shown in FIG. 7A for a standard video signal. However, in the case of a non-standard video signal, for example, if the bursts are in phase between frames as shown in FIG. 7B, the burst remains as is in the frame sum, so this is extracted by the BPF and peaked by the peak detection circuit. It is possible to determine that the signal is a non-standard video signal by measuring the value and comparing the value with a certain set value A by a comparison circuit.

[0005]

However, this method can be detected in a system in which a clock is generated in synchronization with a horizontal synchronizing signal, but the peak value of the burst is measured in a system in which a clock is generated in synchronization with a burst. It doesn't make sense and this circuit cannot detect it.

In view of the above problems, the present invention provides a nonstandard detection circuit capable of detecting a nonstandard video signal even when a clock synchronized with a burst is used.

[0007]

To achieve this object, the non-standard video signal detection circuit of the present invention comprises a counter, a flip-flop and a decision circuit.

[0008]

With the above-described structure, the present invention clears the counter with the frame identification signal generated once per frame in synchronization with the input video signal, counts the main clock synchronized with the burst, and outputs the counter. Is latched with the frame identification signal by using a flip-flop, and a determination circuit determines whether the input video signal is a standard video signal or a non-standard video signal from the output of the flip-flop.

[0009]

【Example】

(Embodiment 1) First, a non-standard video signal detection circuit according to a first embodiment of the present invention will be described with reference to FIGS. FIG. 1 is a block diagram of a non-standard video signal detection circuit according to the first embodiment of the present invention.

The non-standard video signal detection circuit according to the first embodiment of the present invention shown in FIG. 1 includes a counter 1 for clear input of a frame identification signal and counting in synchronization with a main clock, and output data of the counter 1. And a determination circuit 3 for determining whether the input video signal is a standard video signal or a non-standard video signal based on the value of the output data of the flip-flop 2.
Consists of

The operation of the non-standard video signal detection circuit according to the first embodiment of the present invention constructed as above will be described below with reference to FIG.

First, in synchronization with the input video signal, a frame identification signal which becomes 1 clock LOW once per frame is input to the counter 1 as a clear input. That is, the output of the counter 1 becomes 0 when it is cleared, and counts by 1 each time a clock is input from it.
Next, the output of the counter 1 is input to the flip-flop 2 and latched in synchronization with the rising edge of the frame identification signal. That is, as shown in FIG. 2, the output of the flip-flop 2 becomes x, and the frame length can be measured. Then, the output of the flip-flop 2 is input to the determination circuit 3. Since the determination circuit 3 has a constant length for a standard video signal (910 * 525 clocks if the main clock is 14.3 MHz in NTSC), the standard video signal is normally always this clock number ± 1. To determine.

By measuring the length between frames in this way, it is possible to easily determine whether or not the input signal is a standard video signal.

(Embodiment 2) Next, a non-standard video signal detection circuit according to a second embodiment of the present invention will be described with reference to FIGS. FIG. 3 is a block diagram of a non-standard video signal detection circuit according to the second embodiment of the present invention. The difference from the first embodiment is that the output of the counter 1 is input to the timing generation circuit 20 and the output is used to control the frame memory 30 used for three-dimensional YC separation or the like. The operation of the non-standard video signal detection circuit according to the second embodiment of the present invention configured as described above will be described below with reference to FIG.

First, a frame identification signal which becomes 1 clock LOW once per frame in synchronization with the input video signal is input to the counter 1 as a clear input. That is, the output of the counter 1 becomes 0 when it is cleared, and counts by 1 each time a clock is input from it.
This is the same as the first embodiment. Therefore, the output of the counter 1 is used to control the frame memory required when performing the three-dimensional YC separation. That is, as shown in FIG.
By decoding the output of the counter 1 (2 and n in FIG. 4), an enable pulse and a reset pulse are obtained.

The determination as to whether or not it is a standard video signal can be made in the same manner as in the first embodiment. If the counter for measuring the length between frames is also used for controlling the frame memory as described above, it is possible to easily determine whether the input signal is a standard video signal because the circuit scale is small.

(Third Embodiment) Next, a non-standard video signal detection circuit according to a third embodiment of the present invention will be described with reference to FIG. FIG. 5 shows the operation of the decision circuit of the non-standard video signal detection circuit of the third embodiment of the present invention.

In the first embodiment, if the judgment is x ± 1, the standard video signal is judged, but this is when the length between the frames of the input signal is measured by the clock synchronized with the burst signal. Because the input signal is analog, the true length is not an integral multiple of the clock. That is, as shown in FIG. 5, when the length is c, there is a state of bd. If it is a clock unit, it is necessary to check the margin up to ae, so it must be ± 1 clock.
However, since it is bd in reality, skew data, which is phase difference information between the horizontal synchronizing signal and the main clock, is used to improve the accuracy of the determination circuit. That is, the skew data indicates the fractional part of the length of the analog input signal, which is 0.5 in the case of b and d in FIG.
When it is e, it becomes 0. Therefore, if the skew data is used, more accurate determination can be performed.

[0019]

As described above, according to the present invention, by using the counter, the flip-flop, and the judging circuit, the counter clears the frame identification signal generated once per frame in synchronization with the input video signal. Then, the main clock synchronized with the burst is counted, the counter output is latched by the flip-flop with the frame identification signal, and the judgment circuit judges from the flip-flop output whether the input video signal is a standard video signal or a non-standard video signal. be able to. A non-standard video signal detection circuit can be realized with a very simple circuit, and its practical effect is great.

[Brief description of drawings]

FIG. 1 is a block diagram of a non-standard video signal detection circuit according to a first embodiment of the present invention.

FIG. 2 is a timing chart for explaining the operation of the circuit.

FIG. 3 is a block diagram of a non-standard video signal detection circuit according to a second embodiment of the present invention.

FIG. 4 is a timing chart for explaining the operation of the circuit.

FIG. 5 is a diagram for explaining the operation of the third embodiment of the present invention.

FIG. 6 is a block diagram of a conventional non-standard video signal detection circuit.

FIG. 7 is a timing chart for explaining the operation of the circuit.

[Explanation of symbols]

 1 Counter 2 Flip-Flop 3 Judgment Circuit 20 Timing Generation Circuit 30 Frame Memory 100 Frame Memory 101 Adder 102 BPF 103 Peak Detection Circuit 104 Comparison Circuit

Claims (4)

[Claims] 1. One per frame in synchronization with an input video signal
Non-standard video signal detection that detects whether the input video signal is a standard video signal or a non-standard video signal by measuring the length between the frame-identified signals that are generated twice using a clock synchronized with the burst circuit 2. One per frame in synchronization with an input video signal
A counter that counts the main clock synchronized with the burst by clearing the frame-identified signal generated once, a flip-flop that latches the output of the counter with the frame-identified signal, and an input video signal from the output of the flip-flop. Non-standard video signal detection circuit equipped with a determination circuit that determines whether a standard video signal or a non-standard video signal 3. The non-standard according to claim 2, wherein the counter which counts the main clock synchronized with the burst by inputting the frame identification signal as a clear input is a counter used in the timing generation circuit of the frame memory used in the three-dimensional YC separation. Video signal detection circuit 4. The determination circuit is a determination circuit that determines whether the input video signal is a standard video signal or a non-standard video signal from the output of the flip-flop and skew data that is phase difference information between the horizontal synchronizing signal and the main clock. Non-standard video signal detection circuit described in 2