JPH08250486A - Semiconductor device - Google Patents

Abstract

PURPOSE: To obtain the configuration of a semiconductor element suitable for a three- dimensional device by providing a substrate carrying projecting sections composed of semiconductors and insulating film which covers the surface of the substrate except the top faces of the projecting sections so that the upper end of the insulating film can be flashed roughly with the top faces of the projecting sections. CONSTITUTION: Projecting sections 33 having widths of about 1-2μm and recessed sections 34 having widths of about 1-2μm and depths of about 1.5μm are formed on the surface of a single-crystal silicon substrate 1. A silicon nitride film 31 having a thickness of about 1,000Å is formed on the surface of the substrate 1 including the top faces of the projecting sections 33 and the film 31 is coated with a resist 32. Then, after the resist 32 is etched off only from the top faces of the projecting sections 33, the silicon nitride film 31 is removed from the top faces of the sections 33 and the remaining resist 32 is also removed so that the upper end of the silicon nitride film 31 can be roughly flashed with the top faces of the sections 33. Thereafter, various kinds of semiconductor elements are obtained through a process for selectively mixing an impurity in the sections 33, etc. Thus a semiconductor element suitable for three-dimensional devices is obtained.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device and a manufacturing method.

[0002]

2. Description of the Related Art Conventionally, in a parallel plate type plasma vapor phase reaction method (that is, a plasma vapor phase film forming method or a plasma etching method, hereinafter simply referred to as a plasma process, that is, a PP method), the surface to be formed is a cathode. (Casodo)
Further, there is known a method of using a cathode dark part or an anode dark part which is generated on the anode or in the vicinity of these electrodes. In such a conventionally known method, the area of the surface to be formed cannot be made larger than the area of the electrode. For this reason, the semiconductor, insulator, or conductor coating can be formed on a large-area substrate, but it cannot have a surface to be formed that is 5 to 30 times as large as the electrode area. That is, it had a drawback that mass production was not possible.

[0003]

Therefore, when a non-single-crystal semiconductor containing amorphous silicon is to be produced by the PCVD method, the production price per 1 cm ^{2 of} the substrate becomes as high as 1 yen or more, and the solar cell, etc. It has a major drawback that it cannot be applied to the production of products whose unit price is low.
In addition, the film formation rate is not sufficient at 1 to 2Å / sec, and from these points, a PCVD method having a large productivity and a large film growth rate of 3 to 10Å / sec has been demanded. The present invention has been made to achieve such an object.

[0004]

That is, the present invention uses a positive column of plasma glow discharge. In the present invention, substrates having a surface to be formed in the positive column region are arranged in parallel and separated from each other. Regarding the PCVD method using such a positive column, Patent Application 57-163729 filed by the present inventor,
57-163730 (Plasma vapor phase reactor) (filed September 20, 1982).

In the present invention, a reaction is caused by such a positive column,
This is a large-scale production. However, since the positive column generally spreads over a large space, the plasma density in the vicinity of the surface to be formed is reduced, and as a result, there is another drawback that only the same film growth rate as in the method using the dark portion can be obtained.

By removing such a defect, the positive column is converged (stuck), that is, the spread of the discharge plasma is suppressed, the plasma density in the central portion is further increased, the active reactive gas is increased, and eventually the active reactive gas is increased. The feature is that the film growth rate is increased to 2 to 3 times.

FIG. 1 shows a parallel plate type electrode (2) according to the conventional method,
(3) and its electric lines of force (5) Moreover, the equipotential surface (15) orthogonal to this line of electric power is shown. These electrodes are arranged in the reaction vessel (4) under reduced pressure, and the reactive gas (6) supplied from (7) is discharged from one of the electrodes and the other substrate (1) is discharged. A film is formed on the surface to be formed.

In FIG. 2A, 13.56 MHz is applied between the electrodes (2) and (3) from the high frequency power source (10). Unnecessary reaction products are valve (11) in the exhaust system (8), pressure adjustment valve
(12), Exhausted to the outside by the vacuum pump (13).

In such a conventional method, the lines of electric force (5) are applied perpendicularly to the surface to be formed, so that there is another drawback that the surface to be formed is sputtered (damaged). In FIG. 1B, the needle-shaped electrode (9) is arranged separately from one of the electrodes (2) of FIG. 1A. Here, the electrode (2) (50 cm x 50 cm), the interval between the electrodes (2) and (3) was 4 cm, the needle electrode length was 1 cm, and the interval was 5 cm. Such a needle electrode is shown in FIG.
Even when the device is arranged in the device (A), the lines of electric force are dispersed from the needle-shaped electrode and are supplied in the expanding direction, and are applied vertically to the substrate (1). The equipotential surface (15) is only provided perpendicular to the lines of electric force. Therefore, the needle-shaped electrode does not improve the film quality of the film and the film growth rate, although it has some features such as facilitating the start of discharge even when it is arranged in the device in FIG. 1 (A). It was

FIG. 2 shows an electrode and its outline in the PP method, that is, the PCVD method or the plasma etching method of the present invention. Other parts of this reactor are in accordance with the above-mentioned patent application of the present inventor.

In the drawing, the pair of mesh electrodes (2),
(3) and substrates (1) and (1 ′) having a surface to be formed. The supply of reactive gas is from (23) to the quartz hood (21),
The positive column region (5) is reached through the mesh electrode (2). Substrates (1), (1) are arranged in the positive column region so that their back surfaces are in close contact with each other and parallel to the lines of electric force (5). The substrate is surrounded by a quartz basket. The reaction products are exhausted (24) through the lower hood (22). High-frequency energy is externally supplied to the pair of electrodes (2) and (3) and is discharged to a region (10) where a uniform electric field is formed.

In this drawing, the electrode area is 25 cmφ (electrode spacing
15 cm) or 70 cm × 70 cm (electrode spacing 35 cm), and by forming an opening or groove (14) in this electrode, the first glob in the uniform electric field region of the present invention is formed.
A high-brightness second glow discharge was simultaneously generated in the discharge and the opening or groove (14). As can be seen from this figure, the lower electrode (13) is, for example, simply a hole or groove (0.5
~ 3cm eg only about 1cmφ or about 1cm width). In another example, like the upper electrode, the opening or groove is provided with a curved surface (16) in the direction opposite to the positive column to make it concave. As shown in FIG. 1 (B), in the device of the present invention, the electrodes are not flat or convex on the discharge surface, but conversely, by making the electrodes flat or concave, the lines of electric force (5) become regions (17), It can be seen that convergence occurs at (18) and a high-density electric flux region occurs. By doing so, in addition to the first plasma discharges (27), (28) generated by the conventionally known uniform electric field, the high-intensity second plasma region ( We were able to generate 17) and 18) at the same time.

As a result, in the conventional case, the positive column (25) has a large lateral spread and the plasma is dispersed. However, in the PP device of the present invention, the plasma gathers in the central part (20) of the electrode (3).
5) I was able to show a tendency. Further, by performing the second discharge of this high-intensity plasma, the film growth rate could be increased by 2 to 3 times. For example, using 100% silane, 0.1torr, 30W, (13.56MHz), electrode surface 25cm
When φ is set and the electrode interval is 15 cm, the substrate is 10 cm, and 6 plates are arranged (total area 600 cm ² ).
Without 4), the film growth rate was 1-2 Å / sec, but it was 4-6 Å / sec, which was 2-3 times higher by only providing several holes or grooves (14) in each electrode. It has become possible to increase.

This is compared with the conventional method of FIG.
It can be seen that, in addition to being able to increase the amount of substrates provided by up to 20 times, the film formation rate can be increased by 2 to 3 times, which is excellent in double. In addition, as a result of the convergence of the positive column, this positive column sputters the inner wall of the reactor, activates the water and adhering impurities adsorbed on the inner wall and takes them into the film, and the film quality is improved. Considering that the possibility of deterioration can be further reduced, it was proved to be excellent in triplex.

In the above description, only the production of the semiconductor film is described. However, it is also effective to use the method of the present invention for the plasma etching used for the positive column. That is, for the substrate to be etched, CF
The method of the present invention is particularly effective when an etching gas such as Br or CHF is introduced to perform anisotropic etching on the surface to be processed on the substrate in a direction parallel to the surface of the substrate. That is, plasma etching only requires deep anisotropic etching in the direction perpendicular to the substrate. However, when selective etching is performed to flatten the convex portion of the substrate, the electric field (electric flux) is parallel to the substrate, and decomposition occurs for a bond having a high bond energy of C—F bond. Then, a large amount of F radicals can be obtained by performing a high-intensity plasma discharge in addition to the so-called one-step glow discharge that allows the radicals to have sufficient energy to form radicals, and only the substrate-like convex portions can be obtained. It was possible to perform selective etching, and it was possible to perform it particularly effectively. The present invention is complemented with the following examples.

[0016]

【Example】

[Embodiment 1] A case where silicon is formed in the PCVD method using FIG. 2 is shown. The numbers correspond to those in FIG. In the drawing, the lower mesh electrode (3) is provided with three high-intensity plasma discharge regions and four upper regions. The substrate (1) is arranged in a quartz holder, and this jig is rotated at 3 to 5 times / minute. Non-single-crystal silicon was produced from silane as a reactive gas. That is, substrate temperature 210 ℃, pressure
With 0.1 torr, silane 30 cc / min, discharge output 30 W (13.56 MHz), a film growth rate of 4.1 Å / sec is 20 min to obtain a thickness of 5000Å.

It can be seen that no discharge is observed in the outer space of the quartz holder in which the substrate is arranged, and there is little possibility of spattering the stainless wall surface of the reaction vessel and mixing impurities such as water.

As the substrate, 6 pieces of 10 cm × 10 cm are arranged,
In addition to the shape as shown in FIG. 1 (A), the yield of the reactive gas (component forming the coating film / gas to be supplied, etc.) was nearly 8 times. Further, in FIG. 2, it was possible to double the height compared with the case where no opening or groove (14) was provided.

Example 2 In FIG. 3, methane (CH ₄ ) and silane (SiH ₄ ) were mixed at a ratio of 1: 1, and Si _x C _1-x (0
The coating of <x <1) was produced. In the drawing, high-intensity plasma discharge was observed in the groove. As compared with the case where there is no such local discharge, there is a large amount of Si--C bonds that become silicon carbide, and even if chemical etching occurs, the film is hard and dense. Others are the same as in the first embodiment.

[Embodiment 3] In this embodiment, FIG. 2 is used for plasma etching. In FIG.
The case where the silicon nitride film at the apex of the convex portion is removed is shown. FIG.
As shown in (A), the surface of the silicon single crystal substrate (1) has convex portions (3) having a width of 1 to 2 μm and concave portions (1 to 2 μm). Its depth was 1.5 μm. Further, silicon nitride (31) was formed on the upper surface to a thickness of 1000Å, and then a resist (32) was coated.

Next, using the apparatus shown in FIG. 2, plasma in the direction perpendicular to the drawing (parallel to the surface of the substrate) was added with 5% oxygen to CFBr. The frequency of this plasma was low at 30 KHz. Then, as shown in FIG. 3B, only the resist (32) on the convex portion (33) could be removed. Further, the silicon nitride is removed, and the resist is removed by a known method.
(C) was obtained. After that, various semiconductor devices could be manufactured by providing a process of selectively mixing impurities into the convex portion.

[Embodiment 4] In this embodiment, the silicon single crystal has irregularities, the upper surface is flat, and the depressions are filled with silicon oxide. That is, as shown in FIG. 3 (A), silicon nitride (33) and silicon oxide (32) were laminated and formed on the uneven substrate.

After that, the convex portions are removed by the plasma etching apparatus for applying an electric field in parallel to the substrate surface shown in FIG. 2, and as shown in FIG. 3B, the convex portions (33) and concave portions for the semiconductor are formed. Silicon oxide (23) was left on the upper surfaces of (34) to flatten these upper surfaces.

[Embodiment 5] In this embodiment, the concave portion of the electrode portion of the VLSI is removed. That is, the case is shown in which the recesses of the electrode portion are filled with a conductor to substantially form the electrode lead pattern. In FIG. 4, the semiconductor surface (1)
Buried field insulator (36), source, drain region (37), (38), gate (39), interlayer insulator (41), 1-2μ
It has an opening (42) of mφ (depth ± 0.5 to 2 μm). Even if the lead (43) is not formed on this electrode portion, the groove (4
Due to the concave portion in 2), a fine pattern of 2 μm or less cannot be cut even by using the electron beam exposure technique. For this reason, in this embodiment, an aluminum (43) having silicon added thereto is formed on the entire surface thereof to a thickness of 0.5 to 2 μm. Then, this aluminum has a recess (40). Further, this substrate was subjected to anisotropic plasma etching using a reactive gas of CCl _{4 in} the apparatus shown in FIG.
3) was removed. Thus, the upper surfaces of the concave portions (34) and the convex portions are made substantially flat as shown in FIG. 4 (B). Then, the aluminum selectively remains in the opening (42) and its upper surface (3
3) It became possible to make it a roughly flat surface in (34). For this reason, a second aluminum (44)
Was added to form a film having a thickness of 0.2 to 0.5 μm.

After that, by a known plasma etching apparatus for performing anisotropic etching in the vertical direction, 1 to 2 μm is obtained.
I was able to get the lead of the narrow pattern. 4 and 3 are extremely demanded for manufacturing a three-dimensional device in which semiconductor elements are vertically stacked on a substrate.

[0026]

As described above, according to the present invention, as shown in FIG. 2, in the PP device, the electrodes are provided with holes or grooves, and the lines of electric force are converged in this region to generate high-intensity discharge. Is. In this system, when the substrate is arranged on the parallel plate electrodes as shown in FIG. 1, a part of the substrate may have a high flux reaction region. However, when considering the sputtering effect due to high-intensity discharge, it is effective to improve the film quality by disposing a surface to be formed in this discharge to reduce the sputtering (damage), and as a result, the method of the present invention It was found to be particularly effective for the PP method in which the substrate is arranged in parallel with the lines of electric force by pillars.

Further, the embodiment of the present invention is based on non-single crystal Si and Si.
_x C _1-x . However, using silane and germane, Si _x Ge
_1-x (0 ≦ x <1) Si _x Sn using silane and tin chloride
_{Even 1-x} (0 <x ≦ 1) is effective. Al to AlCl ₃
And Si ₃ N ₄ with SiH ₄ and NH ₃ , SiO ₂ with SiH ₄
And N ₂ O are used to form an insulating film by the PCVD method, or the plasma etching method is used to selectively form the Si film.
The present invention is also effective when removing O ₂ , Si, Si ₃ N ₄ , photoresist and other compound semiconductors.

[Brief description of drawings]

FIG. 1 shows a conventional plasma vapor phase reactor.

FIG. 2 shows an outline of a plasma gas phase reaction apparatus of an example.

FIG. 3 shows another embodiment in which a semiconductor device is manufactured.

FIG. 4 shows another embodiment in which a semiconductor device is manufactured.

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[Procedure amendment]

[Submission date] April 5, 1996

[Procedure Amendment 1]

[Document name to be amended] Statement

[Name of item to be amended] Detailed explanation of the invention

[Correction method] Change

[Correction content]

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device and a manufacturing method.

[0002]

2. Description of the Related Art Conventionally, the degree of integration of semiconductor devices is increased.
The composition has been studied variously.

[0003]

However, in the semiconductor device
Fabrication of three-dimensional devices that are vertically stacked on a substrate
Is difficult, and the construction of a semiconductor device suitable for it is desired.
Was there.

[0004]

[Means for Solving the Problems ] To solve the above problems
In addition, one of the configurations of the present invention is that a semiconductor protrusion is provided.
Cover the substrate and the area other than the upper surface of the convex portion on the substrate.
An insulating film, and the upper end of the insulating film and the upper surface of the convex portion.
Is a semiconductor characterized by forming a substantially flat surface
It is a device.

Another structure of the present invention is provided on a semiconductor device.
And the semiconductor in the interlayer insulator
Apertures on the source or drain region of the device
A first metal provided in the opening, and a first metal
A second metal in contact with the upper surface of the metal, the first metal
The top surface of the metal of
The semiconductor device is characterized by being configured.

With the above structure, the coating film can be favorably laminated on the substantially flat surface. As a result, the semiconductor device,
In particular, a third-order structure in which semiconductor elements are vertically stacked on a substrate
The original device can be easily manufactured. Below
An example is shown.

[0007]

Example 1 First, a process for manufacturing a semiconductor device will be described.
The plasma vapor phase reaction method will be described. Conventionally, parallel plate
Type plasma vapor phase reaction method (ie plasma vapor phase film formation)
Method or plasma etching method, hereinafter simply plasma
Ma process, or PP method)
Place the formation surface on the cathode (cathode) or anode (anode).
Or in the dark areas of cathodes that occur in the immediate vicinity of these electrodes or
A method using an anode dark part is known. Than before
In the known method, the area to be formed is larger than the size of the electrode area.
The surface area cannot be made large. others
Therefore, semiconductors, insulators, and conductor coatings are formed on large-area substrates.
Electrode surface while having the feature that it can be manufactured
It is not possible to have a formation surface that is 5 to 30 times the product
Yes. That is, it has the drawback that it cannot be mass-produced.
It was

Therefore, it contains amorphous silicon.
When manufacturing a non-single crystal semiconductor by the PCVD method,
The manufacturing price per 1 cm ^{2 of} the substrate is more than 1 yen and it is expensive
Therefore, it can be applied to the production of low-cost products such as solar cells.
It has a major drawback that it cannot do so. In addition, the film
The formation speed is not sufficient at 1-2 Å / sec.
Has high productivity and a film growth rate of 3 to 10Å
A PCVD method as large as 1 / second has been required.

Therefore, in this embodiment, plasma glow discharge is performed.
Use the positive column of electricity. Plasma gas phase reaction shown in this example
According to the method, substrates having a formation surface in the positive column region are parallel to each other.
It is arranged separately. With such a positive column
Regarding the PCVD method, a patent application filed by the present inventor
57-163729, 57-163730 (plasma gas
Phase reactor (filed September 20, 1982)
I have.

The method shown in the present embodiment uses such a positive column.
The reaction is allowed to proceed and mass production is carried out. But the sunlight
Since the pillars generally spread widely in the space,
Plasma density is reduced, and as a result, the dark area is used.
Another deficiency is that only similar film growth rate can be obtained.
Have a point.

In order to eliminate such a defect, a positive column is installed.
Bundles, that is, the spread of discharge plasma
To increase the plasma density in the center.
Increase the active reactive gas, which in turn increases the film growth rate.
It can be increased to 2-3 times.

FIG . 1 shows a parallel plate type electrode in the conventional method.
(2), (3) and their lines of electric force (5)
The equipotential surface (15) is shown orthogonal to the field lines. And
These electrodes are placed in the reaction vessel (4) under reduced pressure.
And the reactivity supplied from (7) from one side of this electrode
Gas (6) is released and on the surface of the other substrate (1) to be formed
Is formed into a film.

In FIG . 2A, electrodes (2) and (3)
13.56MHz from the high frequency power supply (10) is added between
To be Unnecessary reaction products are stored in the exhaust system (8) with a valve (1
1), pressure control valve (12), vacuum pump (13)
Exhausted to the outside.

In such a conventional method, the lines of electric force are
Since (5) is applied perpendicularly to the formation surface, the formation surface is
It has the other drawback of being damaged (damaged).

FIG. 1 (B) shows a needle-like electrode (9) spaced apart from one of the electrodes (2) of FIG. 1 (A). Here, the electrode (2) (50 cm x 50 c
m), the distance between the electrodes (2) and (3) was 4 cm, the needle electrode length was 1 cm, and the distance was 5 cm. Such a needle electrode is shown in FIG.
Even when the device is arranged in the device (A), the lines of electric force are dispersed from the needle-shaped electrode and are supplied in the expanding direction, and are applied vertically to the substrate (1). The equipotential surface (15) is installed perpendicular to the lines of electric force.
It can only be kicked. Therefore, the needle-shaped electrode is shown in FIG.
Even if the device is installed in the
Despite having a certain length, the film quality and film growth speed
It did not improve the degree.

FIG . 2 shows the PP method or PC used in this embodiment.
Electrodes and electrodes in VD method or plasma etching method
And its outline. The rest of this reactor is
According to the patent application of the inventor described above.

In the drawing, this pair of reticulated electrodes
(2), (3) and a substrate (1) having a surface to be formed,
Has (1 ′). Supply of reactive gas is stone from (23)
It reaches the British Food (21), sunlight through the net electrodes (2)
Reach the pillar area (5). The back side of the positive column area is closely
Then, the substrates (1) and (1) are arranged parallel to the lines of electric force (5).
I'm sorry. The shape surrounding the substrate in a quartz basket
It has Exhaust of the reaction products is carried out by the lower hood (2
It is exhausted (24) through 2). Paired electrodes
(2), (3) the frequency error Nerugi supply than the outside
And is discharged into the area (10) where an equal electric field is formed.
It

In this drawing, the electrode area is 25 cmφ (electrode
Spacing 15 cm) or 70 cm x 70 cm (electrode spacing 3
5 cm), and the electrode has a hole or
By forming the open groove (14),
1st glow discharge and high brightness in the opening or groove (14)
And a second glow discharge of the same were simultaneously generated. This drawing
As will be more apparent, the lower electrode (13) is, for example, simply opened.
Hole or open groove (0.5-3 cm, eg about 1 cmφ or
It's just about 1 cm wide). In another example, the upper side
Like the electrode, make this hole or groove in the opposite direction to the positive column.
A curved surface (16) is provided on the surface to make it concave.

As shown in FIG. 1 (B), the needle is not in a convex shape on the discharge surface, that is, in the device shown in the present embodiment, on the contrary, the electrode is made flat or concave to form a line of electric force (5). There region (17), mow Kotogawa to converge, high density electrical flux region is generated in (18). Cover
Generated by the conventionally known uniform electric field.
High density in addition to the first plasma discharge (27), (28)
The second plasma region of high brightness (1
It was possible to simultaneously generate 7) and (18).

As a result, in the past, in the positive column (25),
The spread to the direction was large and the plasma was dispersed,
In the PP device of the present embodiment, the central part (20) of the electrode is collected.
We were able to show a Maru (35) tendency. More
The second discharge of the high-intensity plasma of
Therefore, the film growth rate could be increased 2-3 times. example
For example, using 100% silane, 0.1 torr, 30W,
(13.56 MHz), the electrode surface is 25 cmφ, the electrode
When the distance is 15 cm, the substrate is 10 cm □ and 6 sheets are arranged.
Open hole or groove in (total area 600 cm ² ).
Without (14), the film growth rate is 1-2 Å / sec.
However, this opening or groove (14) was added to each electrode.
Just by setting up a place, it will increase 4 to 6 Å / sec and increase 2 to 3 times.
It has become possible.

This is compared with the conventional method shown in FIG.
It is possible to increase the amount of substrates to be installed by up to 20 times.
Therefore, the film formation rate can be increased by 2 to 3 times, and
It turns out that it is extremely excellent. In addition, Yang
As a result of the convergence of the light column, this positive column becomes the inner wall of the reactor.
Spatter the water and adhering to the inner wall
The pure substance is activated and taken into the film, and the film quality is deteriorated.
That you can reduce the possibility of
Considering it, it turned out to be excellent in Mie
It was

In the above description, only the production of the semiconductor film is described. However, it is effective to use the method shown in this embodiment also for the plasma etching used for the positive column. That is, when an etching gas such as CF ₃ Br or CHF ₃ is introduced into the substrate to be etched and anisotropic etching is performed in a direction parallel to the surface of the substrate to be processed, The method of this embodiment is particularly effective. That is, plasma etching is
Only anisotropic etching deep in the direction perpendicular to the plate is required.
It is However, it was selected to flatten the convex portion of the substrate.
When etching selectively, an electric field (electric flux) is generated on the substrate.
And the high binding energy of C-F bond.
For a bond with Rugi, it decomposes to form a radical
The so-called one-stage
High-intensity plasma discharge in addition to glow discharge
As a result, a large amount of F radicals can be obtained,
Selective etching can be performed only on convex parts, which is especially effective
Could be carried out.

Next, in the PCVD method using FIG.
The case where silicon is formed is shown. The numbers correspond to Figure 2.
It In the drawing, a high-intensity plastic is attached to the lower mesh electrode (3)
Zuma discharge area is provided at three places, and four places are provided on the upper side.
It The substrate (1) is placed in a quartz holder and this jig
It rotates at 3 to 5 times / minute.

Non-single crystal silicon with silane as reactive gas
The element was made. That is, the substrate temperature is 210 ° C., the pressure is 0.1 t
orr, silane 30 cc / min, discharge output 30 W (13.
56MHz) and have a thickness of 5000Å
After 20 minutes, the film growth rate is 4.1 Å / sec.

The outer space of the quartz holder on which the substrate is arranged
No discharge was seen between them, and the stainless wall of the reaction vessel
There is little possibility of spattering water and mixing impurities such as water
I understand that

6 substrates of 10 cm × 10 cm are arranged as substrates.
Installed, yield of reactive gas (components to form film / supplied
8 times in addition to the shape shown in Fig. 1 (A)
It became close. Further, in FIG. 2, a hole or a groove (1
4) can be doubled compared to the case without
It was

[0027] As described above, in this embodiment, as shown in FIG. 2, apertures or open grooves in the PP apparatus, electrodes
Is provided, the lines of electric force are converged in this area, and high-intensity discharge
Was generated. As shown in Fig. 1, such a system is a parallel plate
When the substrate is placed on the very top, a high electric flux is applied to a part of this substrate.
You may make it have a reaction area. However, due to the high intensity discharge
When considering the sputtering effect due to
The quality of the film is to reduce the spatter (damage) by installing it.
It is effective for improving the
Is particularly effective for the PP method in which the substrate is arranged parallel to the lines of electric force.
I knew it was.

The coating produced in this example is a non-single crystal.
Si and Si _x C _1-x . But silane and gel
Si _x Ge _1-x (0 ≦ x <1) silane
And Sn chloride using Si _x Sn _1-x (0 <x ≦
Even 1) is effective. Al with AlCl ₃
In addition, Si ₃ N ₄ is converted into SiO ₂ by using SiH ₄ and NH _3.
An insulating film, such as in the case of forming SiH ₄ and N ₂ O
Produced by PCVD method or plasma etching method
To selectively remove SiO ₂ , Si, Si ₃ N ₄ and
The present embodiment is also applicable to the case of removing dys and other compound semiconductors.
The method indicated by is effective.

Example 2 FIG. 3 shows methane (CH ₄ ).
And silane (SiH ₄ ) at a ratio of 1: 1,
_x C _1-x (0 <x <1)
It In the drawing, high-intensity plasma discharge was observed in the groove.
And compared with the case where there is no such local discharge,
There is a large amount of Si-C bond, which causes chemical etching.
Even here, it was a hard and dense film. Other examples
The same as 1.

[Embodiment 3] In this embodiment, FIG. 2 is used for plasma etching. In FIG.
The case where the silicon nitride film at the apex of the convex portion is removed is shown. FIG.
As shown in (A), the surface of the silicon single crystal substrate (1) has convex portions (3) having a width of 1 to 2 μm and concave portions (1 to 2 μm). The depth was 1.5 μm. Further , silicon nitride (31) is formed on its upper surface to a thickness of 1000 Å, and then
Was coated with a resist (32).

Next, the apparatus shown in FIG.
5% of the plasma (parallel to the surface of the substrate) was added to CF ₃ Br.
Oxygen was added. The frequency of this plasma is 30 KHz
I lowered it. Then, as shown in FIG.
Only the resist (32) of 3) could be removed.
Further, the silicon nitride is removed, and the resist is removed by a known method.
After removal, FIG. 3 (C) was obtained. After this, select this convex
By adding a process such as mixing impurities into
Various semiconductor devices could be made.

Example 4 This example is a silicon single crystal.
Has unevenness, the top surface is flat, and the recess is filled with silicon oxide
That is the case. That is, as shown in FIG.
Silicon nitride (33) and silicon oxide (32) on convex substrate
Was formed by stacking.

After that, parallel to the substrate surface shown in FIG.
With the plasma etching device that applies an electric field,
After removal, as shown in FIG.
Silicon oxide (2) is formed on the upper surfaces of the portion (33) and the recess (34).
These were left flat and their upper surfaces were flattened.

[Embodiment 5] In this embodiment, the concave portion of the electrode portion of the VLSI is removed. That is, the case is shown in which the conductor is used to fill the concave portion of the electrode portion to substantially form the electrode lead pattern. In FIG. 4, a field insulator (36) buried in the semiconductor surface (1), source and drain regions (37), (38), and gate (3).
9), interlayer insulator (41), 1-2 μmφ opening (4
2) (depth ± 0.5 to 2 μm). Even if the lead (43) is not formed in this electrode portion, a fine pattern of 2 μm or less cannot be cut even by using the electron beam exposure technique because of the concave portion in the open groove portion (42). Therefore, in this embodiment, the aluminum (43) having silicon added thereto is formed to a thickness of 0.5 to 2 μm.
I made it.

Then, a recess (4
0). Further, this substrate is changed by the device shown in FIG.
Isotropic plasma etching using CCl ₄ reactive gas
The convex portion (33) was removed. Thus, the concave portion (34) the convex portion
The upper surface of the is substantially flat as shown in FIG. Then
Aluminum selectively remains in the aperture (42), and
The upper surface should be a plane at (33) and (34).
And became possible. For this reason, a second
Add 0.2 to 0.5 aluminum (44) with copper
It was formed to a thickness of μm.

After that, a known vertical anisotropic etch is performed.
1 ~ 2μm by plasma etching equipment
It was possible to obtain a lead having a narrow pattern.

4 and 3 show the semiconductor element in the direction perpendicular to the substrate.
Is very important for the fabrication of three-dimensional devices
It is a thing.

[0038]

[Effect] According to the present invention, the semiconductor device can be vertically mounted on the substrate.
A semiconductor device structure suitable for a three-dimensional device to be overlaid.
The result is obtained.

Claims (2)

[Claims] 1. A substrate having a convex portion made of a semiconductor, and an insulating film covering a region other than the upper surface of the convex portion on the substrate, wherein an upper end of the insulating film and an upper surface of the convex portion are substantially A semiconductor device having a flat surface. 2. An interlayer insulator provided on a semiconductor device, an opening provided on the source or drain region of the semiconductor device in the interlayer insulator, and an opening provided in the opening. 1 metal and a second metal that is in contact with the upper surface of the first metal, and the upper surface of the first metal and the upper surface of the interlayer insulator form a substantially flat surface. Characteristic semiconductor device.