JPH0832072A - Semiconductor device - Google Patents

Abstract

(57) [Summary] [Object] To provide a highly reliable thin film transistor with improved heat dissipation without causing a cost increase. A first feature of the present invention is that a part of a semiconductor thin film 2 formed on a surface of an insulating substrate 1 is used as an operating layer, and a gate insulating film 3, a gate electrode 5, and a source / drain electrode 4 are formed. In the formed thin film transistor, the operating layer is connected to the semiconductor thin film via the element isolation region T. This element isolation region is a groove or
It is composed of an insulating layer formed by implanting impurity ions into the semiconductor thin film.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and more particularly to a large-area type device applied to an image input / output device such as a liquid crystal display and an image scanner in which a peripheral circuit having a plurality of thin film transistors is built on an insulating substrate. The present invention relates to a semiconductor device such as a thin film transistor device.

[0002]

2. Description of the Related Art In recent years, active matrix liquid crystal display devices and contact image sensors in which a polycrystalline silicon thin film transistor (TFT) is formed on an insulating substrate such as a glass substrate have been actively researched. This is faster than the conventional amorphous silicon thin film transistor by two digits or more, and the CMOS circuit can be easily configured. Therefore, the size of the thin film transistor can be reduced, and the differential amplifier circuit and the gate can be formed. This is because it is possible to reduce the cost by integrating an IC, which is conventionally arranged outside the device, such as a driver, into the device. The structure of a polycrystalline silicon thin film transistor, which is the basis for forming a digital circuit such as a shift register or an analog circuit such as a differential amplifier circuit, is shown in FIG.
Shown in (c). 6B is a sectional view taken along the line AA of FIG. 6A, and FIG. 6C is a sectional view taken along the line BB of FIG. 6A. This polycrystalline silicon TFT is formed as follows.

First, low pressure CVD (LP
After depositing an amorphous silicon film by a CVD method, a plasma CVD (p-CVD) method, or the like, it is crystallized by a furnace anneal or a laser anneal method to obtain a polycrystalline silicon film to be an operation layer.

Subsequently, the polycrystalline silicon film is patterned into an island shape to form the operating layer 20, and a gate insulating film 30 such as a silicon oxide film is deposited by the ECR-CVD method. Then, a tantalum thin film is deposited as the gate electrode 50 and patterned, and impurities such as phosphorus (n channel) and boron (p channel) are introduced into the source / drain region 40 by the ion implantation method using the gate electrode 50 as a mask.

Further, an interlayer insulating film 60 such as a silicon oxide film is deposited, an opening 70 for taking out an electrode is opened, an aluminum film is deposited and patterned to form a wiring layer 80 to form a polycrystalline silicon thin film transistor. are doing.

By the way, in the polycrystalline silicon thin film transistor formed in this manner, reference (40th)
Annual Joint Lecture on Applied Physics, Proceedings, p635,
29a-SZT-11, 1993),
There is a problem that the characteristics tend to deteriorate due to self-heating. This is different from a silicon substrate having a thermal conductivity of 150 W · m ⁻¹ · K ⁻¹ , and a thin film transistor is formed on an insulating glass substrate having a thermal conductivity of about 1.4 W · m ⁻¹ · K ^−1. This is because the temperature of the operating layer of the thin film transistor easily rises in response to power consumption, and this rise in temperature deteriorates characteristics such as the threshold voltage.

Further, in a differential amplifier circuit or the like, it is necessary to form the two thin film transistors so that they have extremely equal characteristics. For example, in the case of making as shown in FIG. 6 (a), even if the characteristics of the two thin film transistors are very close to each other immediately after the making, when the heat is accumulated by the element operation and the temperature gradient is generated on the substrate, There is a problem in that the operating layers of one thin film transistor Tr1 and the other thin film transistor Tr2 have different temperatures, the characteristics deviate, and the differential amplifier circuit does not operate correctly. Such characteristic deterioration, characteristic variation or non-uniformity is due to the fact that the thin film transistor is formed on the insulating substrate having poor heat conduction. This phenomenon is particularly remarkable in the case of a polycrystalline silicon thin film transistor capable of passing a large current when formed on the same glass substrate as compared with an a-Si (amorphous silicon) thin film transistor.

Therefore, as a structure for improving heat dissipation, a buffer such as diamond having a high thermal conductivity is conventionally provided between the glass substrate and the polycrystalline silicon operating layer, as shown in the above-mentioned documents. There has been proposed a structure in which layers are arranged and a passivation film (PV film) serving as a protective layer of a polycrystalline silicon thin film transistor having high thermal conductivity is used to dissipate heat generated in the thin film transistor.

However, in order to dispose the buffer layer, it is necessary to add a step of depositing a film having a high thermal conductivity on the substrate, which causes a cost increase, and in fact, it has excellent flatness and impurities. There is a problem in that it is difficult to form a high thermal conductivity passivation film that does not contain a metal. Thus, in the conventional case, it is difficult to improve the heat dissipation of the polycrystalline silicon thin film transistor,
There were problems with reliability and uniformity.

[0010]

As described above, in a thin film transistor having a semiconductor thin film formed on an insulating substrate as an operating layer, heat generated in the operating layer cannot be dissipated well, resulting in deterioration of characteristics. However, there is a problem in that the characteristics vary.

The present invention has been made in view of the above circumstances, and improves heat dissipation without inviting a cost increase.
Aiming to provide a highly reliable thin film transistor

[0012]

The first feature of the present invention is to:
In a thin film transistor in which a gate insulating film, a gate electrode, and a source / drain electrode are formed by using a part of a semiconductor thin film formed on the surface of an insulating substrate as an operation layer, the operation layer has an element isolation region interposed therebetween. And is connected to the semiconductor thin film. The element isolation region is composed of a groove or an insulating layer formed by implanting impurity ions into the semiconductor thin film.

A second feature of the present invention is that in a semiconductor device in which a part of a semiconductor thin film formed on the surface of an insulating substrate is used as an operating layer, the operating layer has an element isolation region interposed therebetween.
It is connected to the semiconductor thin film. The element isolation region is composed of a groove or an insulating layer formed by implanting impurity ions into the semiconductor thin film.

The element isolation region is required to have a width of 0.1 μm or more for the purpose of preventing leakage current, but it is 5 μm or less in terms of excellent thermal contact as narrow as possible. Is desirable.

A third feature of the present invention is a thin film transistor having a gate insulating film, a gate electrode, and source / drain electrodes formed by using a part of a semiconductor thin film formed on the surface of an insulating substrate as an operating layer. In a semiconductor device in which a plurality of the thin film transistors are arranged, a connection region formed of the semiconductor thin film that thermally connects the operation layers of the thin film transistors in an electrically insulated state is provided.

That is, in forming a thin film transistor having a semiconductor thin film as an operating layer on an insulating substrate having at least a surface formed of an insulating layer, the semiconductor thin film as an operating layer is removed only around the operating layer or the operation is performed. Impurity ions are implanted only around the layer to insulate it so that the surrounding semiconductor thin film remains.

Alternatively, in a semiconductor device in which a plurality of thin film transistors are arranged, a connection region composed of the semiconductor thin film is arranged so as to thermally connect the semiconductor thin film to be the operation layer of the adjacent element.

[0018]

According to the first and second aspects of the present invention, since the operating layer is in thermal contact with the surrounding semiconductor thin film formed in the same step, the thin film transistor having high heat dissipation, uniform and high reliability. And a semiconductor device can be obtained.

According to the third aspect of the present invention, since the adjacent thin film transistors are thermally connected by the semiconductor thin film, the temperature of the operating layer becomes uniform, and the variation in characteristics due to the temperature can be suppressed.

Further, since the semiconductor thin film is left around the island-shaped patterned operation layer, there are few steps, the pattern accuracy of the wiring layer formed in the upper layer is improved, and defects such as step breakage occur. Is suppressed, and the reliability of the semiconductor device can be improved.

[0021]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described in detail below with reference to the drawings.

FIG. 1 is a plan view (FIG. 1 (a)) showing the thin film transistor device of the embodiment of the present invention and a sectional view taken along the line AA (FIG. 1 (b)).

This thin film transistor device is composed of a first thin film transistor Tr1 and a second thin film transistor Tr2 each having a polycrystalline silicon thin film 2 formed on the surface of a glass substrate 1 as an operating layer. It is characterized in that a groove T having a width of 3 μm is formed in the periphery and the periphery thereof is covered with the polycrystalline silicon thin film 2b formed in the same step.

That is, each thin film transistor has a gate insulating film 3 on the patterned polycrystalline silicon thin film 2.
So as to make contact with the source / drain region 4 formed by the impurity diffusion using the gate electrode 5 as a mask, and the source / drain region 4 through the opening 7. The aluminum wiring layer 8 thus formed is provided.

Next, the manufacturing process of this thin film transistor device will be described.

First, as shown in FIG. 2A, the glass substrate 1
After depositing an amorphous silicon film with a film thickness of 100 nm on the surface by the LPCVD method at a substrate temperature of 450 ° C.,
A polycrystalline silicon thin film 2 is obtained by crystallizing by laser annealing with an energy intensity of 450 mJ / cm ² using an excimer laser having a wavelength of 248 nm and a pulse width of 25 ns. In this step, laser irradiation instantly raises the temperature to 1000 ° C. or more and melts, but the melting time is extremely short, about 100 ns, so that the glass substrate is not thermally damaged. Subsequently, the polycrystalline silicon film 2 is patterned to form a trench T having a width d = 3 μm around the region to be the operating layer to form an island-shaped operating layer, and the polycrystalline silicon film 2b is directly formed in the surrounding region. Leave. After that, a gate insulating film 3 made of a silicon oxide film having a thickness of 100 nm is deposited at room temperature by the ECR-CVD method (FIG. 2 (b)). Figure 2 (c)
As shown in FIG. 4, a tantalum thin film having a film thickness of 400 nm is formed on the upper layer by the pattering method at a substrate temperature of 150 ° C., and this is patterned by photolithography to form the gate electrode 5. Then, ion implantation was performed using the gate electrode 5 as a mask, and impurities were also implanted into the source / drain region 4 and other regions. When the n ⁺ type region is formed by this ion implantation, the implantation condition is 100 keV and 5% PH ₃ diluted with hydrogen is 1 × 10 ¹⁶ cm ^-2 , and when the p ⁺ type region is formed, it is 5% B ₂ diluted with hydrogen at 40 keV. 1 x H ₆
It was set to 10 ¹⁶ cm ^-2 . After the introduction, annealing for activating the impurities was performed at 400 ° C. for 1 hour in a nitrogen atmosphere.

Further, a silicon oxide film having a film thickness of 1 μm is deposited at 250 ° C. by the plasma CVD method to obtain an interlayer insulating film 6, on which a resist pattern for taking out an electrode is formed by photolithography and using this as a mask, hydrofluoric acid is used. Wet etching is used to form the opening 7.
Then, an aluminum layer having a film thickness of 1 μm was deposited at a substrate temperature of 150 ° C. by a sputtering method and patterned, and then the pattern was formed.
The wiring layer 8 is formed as shown in (d).

The polycrystalline silicon thin film transistor thus formed was measured and evaluated.
A uniform and highly reliable thin film transistor device could be obtained without causing variations in characteristics between adjacent thin film transistor elements even when power consumption increased and without causing characteristic deterioration.

Such a result can be explained as follows in comparison with the structure of the conventional thin film transistor device shown in FIG.

In the conventional structure, the heat generated in the operating layer is apt to be accumulated in the operating layer because it has no choice but to flow into the lower glass substrate having extremely low thermal conductivity, whereas in the structure of the present invention, the heat is generated. Since the polycrystalline silicon thin film having a good thermal conductivity is disposed around the, the heat generated in the operating layer can be dissipated through the polycrystalline silicon thin film in the periphery. Therefore, characteristic deterioration due to self-heating is eliminated, and a temperature gradient in the substrate is less likely to occur, so that the characteristics between thin film transistors can be maintained uniform.

It should be noted that the smaller the width d of the trench T, which is the cut portion of the polycrystalline silicon thin film around the operating layer, is, the better the heat dissipation effect is not isolated. However, it is necessary to keep the leak current between elements small. At least 0.1 μm or more is necessary, and in terms of actual processing accuracy in a large area glass substrate, about 3 μm shown in the embodiment is desirable.

Further, it is difficult to apply the present invention to a switching thin film transistor in a pixel portion of an active matrix liquid crystal display device or a contact type image sensor because it causes disadvantages such as reduction of aperture ratio and reduction of transmitted light amount.
However, with regard to the switching thin film transistors other than the pixel portion, there is no problem because the power consumption is small and the uniformity as that of the differential amplifier circuit is not required, and the effect of the present invention becomes remarkable in the peripheral circuits other than the pixel portion. Will.

Next, a second embodiment of the present invention will be described.

In this example, as shown in FIG. 3, what is different from the thin film transistor device of the first embodiment is the insulating region between the operating layer and the peripheral polycrystalline silicon thin film,
In the first embodiment, the trench T was removed by photolithography to form the trench T. On the other hand, the element isolation region 100 made of the insulating layer is formed by injecting oxygen ions into the region having a width of 3 μm by ion implantation to oxidize. It is the point formed. Other parts are formed in exactly the same manner as in the first embodiment. 3 (a) is a plan view of a thin film transistor device according to an embodiment of the present invention, FIG. 3 (b) is a sectional view taken along line AA of FIG.
(c) is the BB sectional drawing.

That is, similar to the first embodiment, this thin film transistor device is composed of a first thin film transistor Tr1 and a second thin film transistor Tr2 which use a polycrystalline silicon thin film 2 formed on the surface of a glass substrate 1 as an operating layer. An element isolation region 100 having a width of 3 μm is formed around the operating layer of each transistor, and the periphery thereof is covered with the polycrystalline silicon thin film 2 formed in the same step.

That is, each thin film transistor has a gate insulating film 3 on the patterned polycrystalline silicon thin film 2.
And a source / drain region 4 formed by impurity diffusion using the gate electrode 5 as a mask, and an aluminum wiring layer formed so as to contact these source / drain regions 4. And 8 are provided.

Next, the manufacturing process of this thin film transistor device will be described with reference to FIGS. 4 (a) to 4 (d).

First, as shown in FIG. 4 (a), the glass substrate 1
After depositing an amorphous silicon film with a film thickness of 50 nm on the surface by the LPCVD method at a substrate temperature of 450 ° C., an excimer laser with a wavelength of 248 nm and a pulse width of 25 ns is laser-annealed at an energy intensity of 350 mJ / cm ² to crystallize the film. A crystalline silicon thin film 2 is obtained.

Subsequently, a width d = on the polycrystalline silicon film 2 around the region to be the operation layer by photolithography.
A mask having an opening of 3 μm is formed, and oxygen ions are implanted through this mask. Here, the injection condition is 5 keV
The dose was set to 1 × 10 ²⁰ cm ^-3 (Fig. 4 (b)). The rest is the same as in the first embodiment.

When the polycrystalline silicon thin film transistor thus formed was measured and evaluated, the characteristics thereof did not vary between adjacent thin film transistor elements even if the power consumption was increased, and the characteristics were deteriorated. In addition, a uniform and highly reliable thin film transistor device could be obtained.

In insulating the polycrystalline silicon thin film, an important condition is to set the impurity condition according to the thickness of the polycrystalline silicon film. It is needless to say that a sufficient amount of impurities is implanted to form an insulating film, but if the polycrystalline silicon film is relatively thick, it should be ensured that sufficient impurities are implanted in the entire depth direction of the polycrystalline silicon film. It is necessary to set the accelerating voltage in multiple stages.

In the above embodiment, the amorphous silicon is annealed to form polycrystalline silicon, and then impurity ions are implanted to insulate the amorphous silicon. However, after the amorphous silicon thin film is formed, the impurity ions are annealed before the annealing. By implanting, insulating, and then annealing, the crystallinity of the insulating film in the element isolation region is improved, and a good insulating film can be obtained. The impurities used for element isolation are not limited to oxygen, but are not limited to nitrogen or a mixture of oxygen and nitrogen, oxygen or nitrogen, and other conductivity type impurity regions can be used. Is.

According to the thin film transistor device of the present invention, the surface is flat, the aluminum wiring layer is not stepped, and the patterning of the upper layer wiring can be made more precise.

Next, a third embodiment of the present invention will be described.

In this example, as shown in FIG. 5, a differential amplifier is constituted by two thin film transistors Tr1 and Tr2, and the same operation layer is provided between the operation layers of the two thin film transistors. The thermal connection region 2C made of a polycrystalline silicon thin film is formed, and the thermal connection region 2C is used to thermally connect the two thin film transistors so as to make the characteristics uniform.

According to this structure, even when heat is accumulated by the operation of the element and a temperature gradient is generated on the substrate, since the two thin film transistors are thermally connected, the temperatures of the operation layers are equal. Is maintained, the characteristics are shifted,
It does not stop operating correctly as a differential amplifier circuit.

It is to be noted that a large number of such thin film transistors having an SOI structure are arranged and used as switching transistors, and a DRA is provided with a capacitor for each.
It is also effective when used in M or the like.

Further, although the thin film transistor using polycrystalline silicon has been described in the above embodiment, a thin film transistor using a compound semiconductor thin film, such as a thin film transistor using single crystal silicon as an operating layer, or an insulating film formed on the surface of a silicon substrate. In addition to the case where an island region made of a semiconductor film other than silicon such as germanium is formed on the film, and a semiconductor device including a semiconductor laser using a compound semiconductor such as gallium arsenide is further formed on this island region, other semiconductor lasers such as semiconductor lasers are formed. It is also applicable to a semiconductor device having an SOI structure.

Modifications can be made as appropriate without departing from the scope of the present invention.

[0050]

As described above, according to the present invention, it is possible to form a highly reliable semiconductor device which has high heat dissipation and has no step around the operating layer.

[Brief description of drawings]

FIG. 1 is a diagram showing a thin film transistor device according to a first embodiment of the present invention.

FIG. 2 is a manufacturing process diagram of the thin film transistor device.

FIG. 3 is a diagram showing a thin film transistor device according to a second embodiment of the present invention.

FIG. 4 is a manufacturing process diagram of the thin film transistor device.

FIG. 5 is a diagram showing a thin film transistor according to an embodiment of the present invention.

FIG. 6 is a manufacturing process diagram of a diagram showing a conventional thin film transistor device.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Glass substrate 2 Polycrystalline silicon film 3 Gate insulating film 4 Source / drain region 5 Tantalum thin film (gate electrode) 6 Interlayer insulating film 7 Opening 8 Aluminum wiring layer 10 Glass substrate 20 Polycrystalline silicon film 30 Gate insulating film 40 Source / drain Region 50 Tantalum thin film (gate electrode) 60 Interlayer insulating film 70 Opening 80 Aluminum wiring layer

Claims (3)

[Claims] 1. A gate insulating film, a gate electrode, and a part of a semiconductor thin film formed on a surface of an insulating substrate as an operating layer.
A thin film transistor having source / drain electrodes formed thereon, wherein the operating layer is connected to the semiconductor thin film via an element isolation region. 2. A semiconductor device in which a part of a semiconductor thin film formed on a surface of an insulating substrate is used as an operating layer, wherein the semiconductor thin film is connected to the semiconductor thin film through the operating layer and an element isolation region. Semiconductor device. 3. A gate insulating film, a gate electrode, and a part of a semiconductor thin film formed on the surface of an insulating substrate as an operating layer.
A semiconductor device in which a plurality of thin film transistors having source / drain electrodes are arranged is provided with a connection region made of the semiconductor thin film that thermally connects the operating layers of the thin film transistors in an electrically insulated state. A semiconductor device characterized by the above.