JPH09181528A - Signal generator - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide output signals with variety and to easily apply an output level convenient for a load during the stop of signal generation by providing a normal signal generator with a level generation part, a selector and a control means. SOLUTION: A control part 7 outputs a prescribed waveform corresponding to the potential change of a capacitor 4 generated due to the switching of a selector 3 synchronized with a trigger signal Tg and the switching of the selector 3 corresponding to a change in the output signal level of a comparator 5 through a selector 8. When the selector 8 is switched, a rectangular waveform or a triangular waveform is optionally outputted. The control part 7 monitors the output waveforms of the comparators 5, 5' and sends a control signal Cst to a selector 9 during the output of a set waveform and the output of the selector 8 is outputted to a terminal Eo. At the time of detecting the completion of the output, the control part 7 switches the selector 9 to the side of the level generation part 10 and an optional value outputted from the generation part 10 is sent to the terminal Eo.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a signal generator, and more particularly, it starts signal generation in response to an input synchronizing signal,
The present invention relates to a signal generator that stops after outputting a predetermined waveform.

[0002]

2. Description of the Related Art In a signal generator that starts and stops the generation of a predetermined waveform signal in response to an input synchronizing signal such as a trigger signal or a gate signal, the output signal level when the signal generation is stopped is usually It is equal to the output level at the start of generation of the generated signal, and it is not possible to arbitrarily select the level at the time of stopping signal generation and the level at the start of signal generation.

FIG. 8 shows an example of a conventional signal generator of this type, and shows a block diagram of a signal generator which adopts a function generator configuration and generates a square wave or a triangular wave. .

The comparator 5a sets the generation start point (phase) of the output signal, and the start phase of the signal can be set by changing the phase setting voltage Vθ. In the following, for convenience of description, the start phase of the signal is 0 °, that is, Vθ = 0.
The case of setting V will be described.

In FIG. 8, in response to the input of the trigger signal Tg, the control unit (CNT) 7 sends the control signal Cw to the selector 3 such as an electronic switch, and its electronic contact S1 is a positive constant current source 1 Switch to the + side of. Then, the capacitor (C) 4 connected to the + side of the positive constant current source 1 starts charging, and the potential of the capacitor 4 rises in proportion to the elapsed time. Here, the comparator 5 has a hysteresis characteristic. When the input potential exceeds VH, the output potential becomes high level, and when the input potential becomes lower than VL, the output potential becomes low level. The comparator 5 monitors the potential of the capacitor 4 and jumps the output potential from the low level to the high level when it detects that the potential of the capacitor 4 has reached a predetermined constant level (VH). When the control unit 7 detects this level change of the comparator 5, the control unit 7 switches the selector 3 to the negative side of the negative constant current power supply 2. As a result, the capacitor 4 starts discharging and the potential of the capacitor 4 begins to drop. When the comparator 5 detects that the potential of the capacitor 4 has reached VL, the comparator 5 returns its output potential to the low level. When the control unit 7 detects this level change of the comparator 5, the control unit 7 switches the selector 3 to the + side of the positive constant current source 1. As a result, the capacitor 4 starts charging and its potential rises. When this potential reaches 0V, the comparator 5a operates to switch the selector 3 to the midpoint, and thereafter, the potential of the capacitor 4 is made constant and the signal output is stopped. Here, the output of the comparator 5 is output via the selector 8 and a square wave signal is obtained at the output terminal Eo.

The control unit 7 monitors the outputs of the comparators 5 and 5a and controls the generation of output signals. For example, if an output signal of only one wave is required, as described above, the control unit 7 switches the contact of the selector 3 to the midpoint at the time when the comparator 5a operates, and thereafter, the capacitor 4
The potential of is kept constant and the signal output is stopped.

On the other hand, since the potential of the capacitor 4 exhibits a triangular wave-like level change, the potential of the capacitor 4 in the same time section as above is amplified by the buffer amplifier (BF) 6,
If the signal is output through the selector 8, one triangular wave is obtained at the output terminal Eo in synchronization with the trigger signal Tg. By switching the selector 8, either a square wave output signal or a triangular wave output signal can be obtained.

When a waveform other than a triangular wave or a square wave is required (for example, a sine wave), the triangular wave may be used as an input, and a non-linear circuit (not shown) having an arbitrary predetermined functional relationship may be interposed.

FIG. 9 shows examples of waveforms of a sine wave signal and a triangular wave signal obtained by a conventional signal generator, from the start of generation to the start of oscillation and stop of generation. In FIG. 9, (A) is a sine waveform that is stopped after generating one sine wave from phase 0 °. The output levels before the generation and after the generation stop are both equal to the value at the phase 0 ° of the generated waveform, that is, the value at the generation start point of the generated waveform. Therefore,
If the average level of the generated waveform is 0V, the output level when the generation is stopped is also 0V. (B) is an example of a sine waveform in which signal generation is stopped after generating one sine wave from the phase of 45 °. The level during the generation stop is equal to the value at the phase 45 ° of the generation waveform and is 1 / √ of the peak value of the generation waveform.
Equal to 2. In addition, (C) shows a triangular wave from phase 0 ° to 2
It is an example of a triangular waveform that is stopped after a wave is generated. The level at which the generation is stopped is equal to the value at the phase 0 ° of the generated waveform.

[0010]

As described above, when a waveform synchronized with the trigger signal is obtained by using the signal generator having the conventional structure, the output level during the generation stop is the signal at the start of generation. The level cannot be set to any level that is different from each other.

As is apparent from the above, in the conventional signal generator, the signal level at the time of generating the signal waveform and the signal level at the time of the stop are restricted, and the variety of the generated waveform is restricted. To change the level at the time of signal waveform generation and at the time of stop,
For example, it is possible to start the generation from the phase where the sine wave does not take the value 0, but in this case, the output level when the generation is stopped does not become 0 and the DC component is contained, so that the load side The direct current component must be removed.

Furthermore, it is possible to superimpose a bias signal having an arbitrary level on the output signal waveform,
This only shifts the output waveform up and down as a whole and does not solve the above problem.

On the other hand, the above problem can be solved by adopting a configuration different from that of the signal generator as shown in FIG. This configuration uses a so-called arbitrary wave generator, plots a desired waveform on the time axis, and stores the data of each point in memory in advance,
The desired output waveform is obtained by repeatedly reading the data in the memory in the address order along the time axis in synchronization with the trigger signal. In this configuration, the output level during the signal generation stop and the output level at the generation start time do not necessarily have to be the same, so the above-mentioned conventional problems can be solved, but not only the device becomes expensive, but also the device If the output waveform is to be switched during operation, the entire memory of the corresponding waveform block needs to be rewritten, which poses a problem that the operating speed of the device is also restricted.

Further, when obtaining a square waveform, there is also an apparatus capable of outputting the center value of the High level and the Low level of the generated waveform while the signal generation is stopped, but this cannot be set to an arbitrary value.

Therefore, an object of the present invention is to provide a signal generator having a simple structure in which the output level at the time when the signal generation is stopped can be set to an arbitrary value irrelevant to the generated waveform.

[0016]

In order to solve the above-mentioned problems, a signal generator according to the present invention comprises a signal generating means for generating a predetermined waveform signal in synchronization with an input trigger and then stopping the signal generation. , A level generating means for generating a predetermined arbitrary level, a first selector means for selecting and outputting one of the outputs from the signal generating means and the level generating means, and the signal generating means Controlling the first selector means so as to selectively output the output from the signal generating means during the generation of the signal and the output from the level generating means while the signal generating means stops the signal generation. And a control means for controlling the operation.

According to another aspect of the present invention, there is provided a signal generating device, which generates a predetermined waveform signal in synchronization with an input trigger and then stops the signal generation, and the signal generating means outputs a signal. First level generating means to be superposed during generation, and second level generating means to be superposed during signal generation by the signal generating means
Level generating means, level switching means for switching and outputting the first and second level generating means, and adding means for adding or subtracting the level from the level generating means to the signal generated by the signal generating means. And the level generating means is configured to output the first signal while the signal generating means is generating a signal.
Control means for controlling the level switching means so that the output from the level generating means is selectively output from the second level generating means while the signal generating means stops the signal. .

Further, the signal generating means may have means for limiting the changing speed of the output signal when the signal generation is started or stopped. The means for limiting the changing speed of the output signal is configured such that the changing speed is different at the time when the signal generating means starts the signal generation and the time when the signal generation means stops the signal generation.

Further, the output value of the level generating means can be set as a ratio with respect to the magnitude of the generated waveform, or can be set to a magnitude at an arbitrary phase of the generated waveform.

[0020]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 is a block diagram showing an embodiment of a signal generator according to the present invention. In FIG.
The components having the same reference numerals as those in the above indicate components having the same function.

In the present embodiment, in addition to the configuration of FIG. 8, a selector 9 and a level generator (Est) 10 are provided, and the selector 9 outputs the output from the selector 8 in response to a control signal from the controller 7. The signal and the output signal from the level generator 10 are switched and output.

As described above, it corresponds to the potential change of the capacitor 4 caused by the switching of the selector 3 synchronized with the trigger signal Tg by the control unit 7 and the switching of the selector 3 according to the change of the output signal level of the comparator 5. A predetermined waveform (rectangular wave from the comparator 5 and triangular wave from the buffer amplifier 6) is output via the selector 8.
By switching the selector 8, a rectangular waveform or a triangular waveform can be obtained as an output.

The control unit 7 monitors the output waveforms of the comparator 5 and the comparator 5a, and sends the control signal Cst to the selector 9 while the set waveform (one wave or the like) is being output. The output signal of 8 is output to the output terminal Eo. When the control unit 7 detects that the output of the predetermined waveform is completed, the control signal Cst causes
The selector 9 is switched to the level generation unit 10 side, and an arbitrary value output from the level generation unit 10 independent of the output of the predetermined waveform is sent to the output terminal Eo.

In the above-described embodiment, the same operation is possible even when the generated waveform is biased.

FIG. 2 is a block diagram showing the configuration of another embodiment of the present invention. In this embodiment, the present invention is applied to a signal generator using a so-called DDS (Direct Digital Synthesizer).

An accumulator (ACC) 23, which holds the level of a signal as a digital signal, is composed of a flip-flop or the like, takes in and holds an input in synchronization with a clock CK supplied from a control unit 24, and outputs the output. Output to the terminal.
The adder (ADD) 22 outputs zero when the clear signal Cr supplied from the control unit 24 is High, and outputs the sum of the two inputs A and B when the clear signal Cr is Low. , To the accumulator 23. Here, a constant value ΔE as an increment is given to one input A of the adder 22 each time the clock CK is given from the increment generator 21, and the output of the accumulator 23 is given to the other input B. Has been given. Therefore, when the clear signal Cr is set to Low, the value held in the accumulator 23 continues to increase by the increment ΔE each time the clock CK is applied.

When the output of the adder 22 increases and finally the adder 22 overflows, its output is, for example, full scale of 4095, and when the addition result becomes 4100, (4100-4095-1) = 4. As well as
The overflow signal OF is output. The control unit 24
By counting the overflow signal OF, it is possible to determine whether or not the waveform has oscillated a predetermined number of times. For example, when the control unit 24 counts one overflow signal OF, a single sawtooth wave is obtained at the output of the accumulator 23, and when a plurality of overflow signals OF are counted, a plurality of sawtooth waves are obtained. You're getting the waves. In the DSS, the sawtooth wave can be generated by digital calculation as described above.

The sawtooth wave thus obtained is converted into an arbitrary waveform by the waveform conversion circuit (CNV) 25. The waveform conversion circuit 25 is composed of a memory or the like, and in the case of a memory, an arbitrary waveform such as a square wave, a triangular wave, a sine wave, or a quadratic curve as an output depending on the setting mode of the functional relationship between input and output (address / content). Can be generated. A plurality of functions can be stored in the waveform conversion circuit 25, and the contents thereof can be rewritten if necessary. If the waveform is a square wave, a triangular wave, a sawtooth wave, or an inverted sawtooth wave, the waveform can be converted by a simple logic circuit without using a memory.

The level generating section 26 has the same function as the level generating section 10 of FIG. 1, and generates desired level data corresponding to the control signal Cs supplied from the control section 24 as digital data. The selector 27 is the selector 9 of FIG.
The output signal from the waveform conversion circuit 25 and the level generation unit 26 is selectively selected and output by a control signal Co from the control unit 24. The output of the selector 27 is converted into an analog signal by the D / A converter 28, and the output signal is sent to the output terminal Eo.

In FIG. 2, in response to the input of the trigger signal, the control section 24 controls the respective sections so as to generate the desired waveform, as described above, by the control signals Cr, Ck ,.
Outputs Cs, Co, etc. How long the desired waveform is generated can be easily controlled by the control unit 24 as described above.

The desired waveform obtained by the waveform conversion circuit 25 is sent to one input terminal of the selector 27. Further, the other input terminal of the selector 27 is connected to the output of the level generating section 26 for giving the output level when the signal generator of the present invention is in the signal generation stop state. The output level from the level generation unit 26 is the same as the control unit 24.
Is specified by the control signal Cs supplied from

The selector 27 selects one of the outputs from the waveform conversion circuit 25 and the level generator 26 in response to the control signal Co from the controller 24 and sends it to the D / A converter 28 in the subsequent stage.

The operation of this embodiment will be described below with reference to the flow chart shown in FIG. When the clear signal Cr supplied from the control unit 24 is set to High (step S1), the output of the adder 22 becomes 0, so that the output of the accumulator 23 also becomes 0 while the series of clocks CK is given.
Remains. At this time, the output of the level generation unit 26, the level of which is regulated in response to the control signal Cs supplied from the control unit 24, is controlled by the control signal Co.
The output data from the level generating unit 26 is continuously output as a stop level until the trigger signal Tg is applied (step S2). When the control unit 24 detects the trigger signal Tg (step S3), the clear signal Cr is set to Low (step S4). After that, the sum of the two input terminals A and B is output to the output of the adder 22, and the output of the accumulator 23 is increased by the increment ΔE from the increment generating unit 21 every time the clock is applied. To do. Then, the selector 27 selects the output from the waveform conversion circuit 25 by the control signal Co from the control unit 24 (step S5). In this way, the signal generator of the present embodiment starts generating a predetermined waveform.

Thus, the above operation is continued until the control section 24 detects the overflow signal OF output from the adder 22 (step S6). When the control unit 24 detects the overflow signal OF, it checks whether or not the oscillation and generation of the waveform signal of a predetermined wave number is completed (step S7). If not, the process returns to step S6 to continue the generation. To do. On the other hand, when it is determined that the generation is completed (step S7), the process returns to step S1, the clear signal Cr is set to High again to clear the accumulator 23, and the selector 27 outputs the level generator 26 to the output. By selecting (step S2), the next trigger signal T
Return to the state of waiting for the arrival of g.

As described above, according to the signal generator of the present embodiment, the output level at the time of starting the generation of the waveform generated in synchronization with the trigger signal or the gate signal and the output level at the time of the generation stop are independent of each other. Can be set to.

In the embodiment shown in FIG. 2, a D / A converter 28 is used instead of the level generator 26 and the selector 27.
The same effect can be obtained by providing the selector 9 and the level generation unit (power supply) 10 for setting the stop level on the output side of FIG. Alternatively, in the embodiment shown in FIG. 2, the waveform conversion unit 25 can also function as the stop level generation unit 26 by directly introducing the control signal Cs to the waveform conversion unit 25 to switch the address. is there. Further, instead of the selector 27, it is also possible to add the output of the level generating section 26 using an adding means.

As is apparent from the above description, according to the signal generator of the above-described embodiment of the present invention, the output level at the initial phase of the waveform being generated in synchronization with the trigger signal or the gate signal and the output when the generation is stopped. Since both levels can be selected independently of each other, various waveforms can be generated, and higher convenience can be provided.

The following parameters can be specified to specify the output level during the generation stop.
The size of the generated waveform at the specified phase can be specified by specifying any level and the ratio to the size of the generated waveform (for example, the maximum / minimum value, average value, effective value, etc. can be specified as the size). Specified as. Since the control unit 24 has information about the waveform to be oscillated in advance, the stop level can be easily calculated by a simple calculation.

Next, concrete examples of waveforms obtained by the signal generator of the present invention will be shown.

FIG. 4 is a waveform diagram showing an example of generation of one sine wave from phase 0 °. For example, the output signal when the magnitude of the output level from the level generator 10 in FIG. 1 or the level generator 26 in FIG. 2 is set to 0, 1, 0.5 and −1 times the peak value A of the generated signal. Are shown in (A), (B), (C) and (D), and various waveforms can be obtained. In FIG. 4, (A) is a waveform that can be obtained even with a signal generator having a conventional configuration, but (B) to (D) are waveforms obtained according to the present embodiment, which are waveforms being generated (generation level). Both the output level (stop level) at the time of generation stop can be set to an arbitrary value different from the signal level at the time of generation start. Therefore, it is not only easy to set the signal level during the generation stoppage to a value convenient for a device that uses the output of the device of the present invention as a load, and it is possible to easily obtain various output waveforms. Become.

In addition, FIG. 5 shows the phase of 180 ° from the sawtooth wave 1
It is a wave form diagram which shows the generation example of a wave. Similar to the above-described example, various waveforms as shown in (A) to (D) obtained when the level generators 10 and 26 are set in the same manner as in FIG. 4 are obtained.

Further, FIG. 6 is a waveform diagram showing an example of generation of one square wave from the phase 90 °. In this example, the level generator 1
The output level of 0 or 26 is set to 0, -of the peak value A of the generated signal.
Waveforms when set to 0.25, -0.5 and -1 times are shown in (A), (B), (C) and (D). By changing the level during generation and the level during stop in this way, it is possible to obtain a variety of output waveforms.

FIG. 7 is a block diagram showing the configuration of a modification of this embodiment shown in FIG. In the present embodiment example, the output of the buffer 6 or the comparator 5 in FIG. 1 is guided to the adder 11 without being directly introduced into the selector 9. Adder 1
Either the output of the level generator 10 or the ground potential is selectively introduced to the other input of 1 by the selector 12. The same effect as in the example of FIG. 1 can be obtained by connecting the other input of the adder 11 to the ground potential while the signal is being generated and connecting the output of the level generating section 10 when the signal is not being generated.

By the way, when the load of the signal generator of the present invention is limited in the jumping speed of the signal level as in a mechanical vibration tester, or similarly, electrical noise due to a jumping change in the signal is generated. In the case where the above-mentioned radiation is disliked, it may be preferable to limit the jump speed of the signal at the time of switching between the generation and the generation stop. In order to prepare for such a case, in the embodiment of FIG. 7, the filter 13 is inserted between the adder 11 and the output terminal Eo. Filter 13
The time constant of the control signal Cr from the control unit 7 is such that the generated waveform is not affected and the jump occurs over an appropriate time.
It is set to an appropriate value by t. It is also possible to change the time constant of the filter 13 between the time when the signal generator starts signal generation and the time when the signal generation is stopped. This makes it possible to supply a waveform that is more preferable for the load.

[0045]

As described in detail above, according to the present invention,
With a simple configuration in which a level generator, a selector, and some control means are provided in a conventional signal generator, an output when no signal is generated is generated in synchronization with a trigger signal or a gate signal. It can be set independently of the output in the initial phase of the signal, so that not only is the output signal obtained diversified, but it is easy to provide a convenient output level for the load when the signal generation is stopped. A great merit such as is obtained.

[Brief description of the drawings]

FIG. 1 is a configuration block diagram of a signal generator according to an exemplary embodiment of the present invention.

FIG. 2 is a block diagram using a DDS according to another exemplary embodiment of the present invention.

FIG. 3 is a flowchart for explaining the operation of the exemplary embodiment shown in FIG.

FIG. 4 is a waveform diagram of one sine wave having an arbitrary generation stop level and an initial phase of 0 ° in the signal generator according to the present invention.

FIG. 5 is a waveform diagram of one sawtooth wave having an initial phase of 180 ° and an arbitrary generation stop level in the signal generator according to the present invention.

FIG. 6 is a waveform diagram of a square wave having an arbitrary generation stop level and an initial phase of 90 ° in the signal generator according to the present invention.

FIG. 7 is a configuration block diagram of a signal generator according to still another exemplary embodiment of the present invention.

FIG. 8 is a configuration block diagram of a conventional signal generator.

9 is a waveform diagram of a signal having a waveform obtained by the conventional signal generator shown in FIG.

[Explanation of symbols]

 1, 2 Constant current power source 3, 8, 9, 12, 27 Selector 4 Capacitor 5, 5a Comparator 5b Phase setting voltage 6 Buffer amplifier 7, 24 Control section 10, 26 Level generating section 11, 22 Adder 13 Filter 21 Incremental generation Part 23 Accumulator 25 Waveform conversion circuit 28 D / A converter

Claims (6)

[Claims] 1. A signal generating means for generating a predetermined waveform signal in synchronization with an input trigger and then stopping the generation of the signal, a level generating means for generating a predetermined arbitrary level, and the signal generating means. And a first selector means for selecting and outputting one of the outputs from the level generating means, and an output from the signal generating means during the signal generation from the signal generating means. And a control means for controlling the first selector means so as to selectively output the output from the level generating means while the signal generation is stopped. 2. A signal generating means for generating a predetermined waveform signal in synchronism with an input trigger and then stopping the generation of the signal, and a first level generating means to be superposed during signal generation by the signal generating means. A second level generating means to be superimposed by the signal generating means during signal generation; a level switching means for switching and outputting the first and second level generating means; and a signal generated by the signal generating means. And an adding means for adding or subtracting the level from the level generating means, wherein the level generating means outputs the output from the first level generating means while the signal generating means is generating the signal. And a control means for controlling the level switching means so that the output from the second level generating means is selectively output while the signal is stopped. 3. The signal generating apparatus according to claim 1, wherein the signal generating means has a means for limiting a changing speed of the output signal when the signal generation is started or stopped. 4. The means for limiting the changing speed of the output signal is configured so that the changing speed is different at the time when the signal generating means starts and stops generating the signal. The signal generator according to claim 4. 5. The signal generating apparatus according to claim 1, wherein the output value of the level generating means can be set as a ratio with respect to the magnitude of the generated waveform. 6. The signal according to claim 1, wherein the output value of the level generating means can be set to a magnitude in an arbitrary phase of the generated waveform. Generator.