JPH09501552A - ＢｉＣＭＯＳ電流モードドライバ及びレシーバ - Google Patents

ＢｉＣＭＯＳ電流モードドライバ及びレシーバ

Info

Publication number
JPH09501552A
JPH09501552A JP7506394A JP50639495A JPH09501552A JP H09501552 A JPH09501552 A JP H09501552A JP 7506394 A JP7506394 A JP 7506394A JP 50639495 A JP50639495 A JP 50639495A JP H09501552 A JPH09501552 A JP H09501552A
Authority
JP
Japan
Prior art keywords
peak
differential signal
voltage
pair
current
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7506394A
Other languages
English (en)
Japanese (ja)
Inventor
バン， パク ウォン，
Original Assignee
マイクロユニティ システムズ エンジニアリング，インコーポレイテッド
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by マイクロユニティ システムズ エンジニアリング，インコーポレイテッド filed Critical マイクロユニティ システムズ エンジニアリング，インコーポレイテッド
Publication of JPH09501552A publication Critical patent/JPH09501552A/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H03K19/017545—Coupling arrangements; Impedance matching circuits
    • H03K19/017554—Coupling arrangements; Impedance matching circuits using a combination of bipolar and field effect transistors [BIFET]
    • H03K19/017563—Coupling arrangements; Impedance matching circuits using a combination of bipolar and field effect transistors [BIFET] with at least one differential stage
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/01—Modifications for accelerating switching
    • H03K19/013—Modifications for accelerating switching in bipolar transistor circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H03K19/018—Coupling arrangements; Interface arrangements using bipolar transistors only
    • H03K19/01825—Coupling arrangements, impedance matching circuits
    • H03K19/01831—Coupling arrangements, impedance matching circuits with at least one differential stage

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Amplifiers (AREA)
  • Logic Circuits (AREA)
JP7506394A 1993-08-10 1994-04-28 ＢｉＣＭＯＳ電流モードドライバ及びレシーバ Pending JPH09501552A (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US10477593A 1993-08-10 1993-08-10
US08/104,775 1993-08-10
PCT/US1994/004613 WO1995005033A1 (en) 1993-08-10 1994-04-28 BiCMOS CURRENT MODE DRIVER AND RECEIVER

Publications (1)

Publication Number Publication Date
JPH09501552A true JPH09501552A (ja) 1997-02-10

Family

ID=22302306

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7506394A Pending JPH09501552A (ja) 1993-08-10 1994-04-28 ＢｉＣＭＯＳ電流モードドライバ及びレシーバ

Country Status (6)

Country Link
EP (1) EP0739552A1 (de)
JP (1) JPH09501552A (de)
AU (1) AU6669194A (de)
CA (1) CA2164523A1 (de)
IL (1) IL109757A0 (de)
WO (1) WO1995005033A1 (de)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102295708B1 (ko) * 2020-06-05 2021-08-30 한양대학교 산학협력단 전류 모드 로직 회로

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2002073805A1 (en) * 2001-03-14 2002-09-19 Koninklijke Philips Electronics N.V. A current mode device and a communication arrangement comprising current mode devices
US9024603B2 (en) * 2012-02-01 2015-05-05 Conexant Systems, Inc. Low power current comparator for switched mode regulator
US9660848B2 (en) 2014-09-15 2017-05-23 Analog Devices Global Methods and structures to generate on/off keyed carrier signals for signal isolators
US10270630B2 (en) * 2014-09-15 2019-04-23 Analog Devices, Inc. Demodulation of on-off-key modulated signals in signal isolator systems
US10536309B2 (en) * 2014-09-15 2020-01-14 Analog Devices, Inc. Demodulation of on-off-key modulated signals in signal isolator systems
US9998301B2 (en) 2014-11-03 2018-06-12 Analog Devices, Inc. Signal isolator system with protection for common mode transients

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102295708B1 (ko) * 2020-06-05 2021-08-30 한양대학교 산학협력단 전류 모드 로직 회로
WO2021246641A1 (ko) * 2020-06-05 2021-12-09 한양대학교 산학협력단 전류 모드 로직 회로
US12388444B2 (en) 2020-06-05 2025-08-12 Iucf-Hyu (Industry-University Cooperation Foundation Hanyang University) Current mode logic circuit

Also Published As

Publication number Publication date
CA2164523A1 (en) 1995-02-16
WO1995005033A1 (en) 1995-02-16
AU6669194A (en) 1995-02-28
IL109757A0 (en) 1994-08-26
EP0739552A1 (de) 1996-10-30

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