JPH0950974A - Polishing cloth and method for manufacturing semiconductor device - Google Patents

Polishing cloth and method for manufacturing semiconductor device

Info

Publication number
JPH0950974A
JPH0950974A JP20111395A JP20111395A JPH0950974A JP H0950974 A JPH0950974 A JP H0950974A JP 20111395 A JP20111395 A JP 20111395A JP 20111395 A JP20111395 A JP 20111395A JP H0950974 A JPH0950974 A JP H0950974A
Authority
JP
Japan
Prior art keywords
polishing
polishing cloth
cloth
layer
elastic modulus
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP20111395A
Other languages
Japanese (ja)
Inventor
Masakazu Muroyama
雅和 室山
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP20111395A priority Critical patent/JPH0950974A/en
Publication of JPH0950974A publication Critical patent/JPH0950974A/en
Pending legal-status Critical Current

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  • Finish Polishing, Edge Sharpening, And Grinding By Specific Grinding Devices (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)

Abstract

PROBLEM TO BE SOLVED: To reduce the fluctuation of the elastic modulus of a polishing cloth as a whole even when the cloth is worn to a thin thickness by giving a hardness gradient to the cloth in the thickness direction. SOLUTION: A polishing cloth 6 is manufactured by laminating a hard layer composed of polyurethane as an upper layer 6a on a soft layer composed of polyurethane formed as a lower layer 6a. In the initial state, the elastic modulus of the upper layer 6b is lower than that of the lower layer 6a and the cloth 6 is deformed by the pressure applied to a polishing head at the polishing time, because the hard upper layer 6b having a hardness gradient is formed on the soft lower layer 6a. Since the deforming of the cloth 6 is limited to the upper layer 6b, the elastic modulus of the cloth 6 when the cloth 6 is deformed becomes that of the upper layer 6b. When the upper layer 6b is worn, the deforming region reaches the lower layer 6a and the elastic modulus when the cloth 6 is deformed becomes the composite elastic modulus of the upper and lower layers 6b and 6a. Since the elastic modulus of the upper layer 6b when the layer 6b is worn is higher than the initial elastic modulus of the layer 6b, the composite elastic modulus does not change from the initial value.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【発明の属する技術分野】本発明は研磨布及び半導体装
置の製造方法に関し、詳しくは半導体装置の製造分野に
適用される層間絶縁膜の研磨に用いて好適な研磨布及び
この研磨布を用いる半導体製造装置の製造方法に関す
る。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a polishing cloth and a method for manufacturing a semiconductor device, and more particularly to a polishing cloth suitable for polishing an interlayer insulating film applied to the field of manufacturing semiconductor devices and a semiconductor using this polishing cloth. The present invention relates to a method of manufacturing a manufacturing device.

【0002】[0002]

【従来の技術】従来より、半導体装置製造の際に半導体
基板等の基体上に生じた凹凸を平坦化するために、研磨
技術が用いられている(例えば特開昭60−3983
5)。一方、半導体装置の分野では集積回路の大規模化
が進んでいるが、大規模化の為には、集積回路チップの
面積をなるべく小さくする必要があり、そこには、多層
配線技術が必要とされている。この多層配線技術に於い
ては、多層配線の段切れを防止するため下地層の表面を
できるだけ平坦にしておくことが必要である。平坦化技
術として近年、塩基性溶媒中でシリコン酸化物の微粒子
を用いたメカノケミカル研磨技術が開発されている。
2. Description of the Related Art Conventionally, a polishing technique has been used in order to flatten the unevenness formed on a substrate such as a semiconductor substrate during the manufacture of a semiconductor device (for example, Japanese Patent Laid-Open No. 60-3983).
5). On the other hand, in the field of semiconductor devices, the scale of integrated circuits is increasing, but in order to increase the scale, it is necessary to make the area of the integrated circuit chip as small as possible, and there is a need for multilayer wiring technology. Has been done. In this multilayer wiring technique, it is necessary to make the surface of the underlayer as flat as possible in order to prevent disconnection of the multilayer wiring. In recent years, a mechanochemical polishing technique using fine particles of silicon oxide in a basic solvent has been developed as a planarization technique.

【0003】[0003]

【発明が解決しようとする課題】しかし、このメカノケ
ミカル研磨技術においては、研磨時に使用する研磨布
は、一般的にポリウレタン製の樹脂が用いられている
が、この樹脂の硬度により研磨後の形状が大きく影響さ
れることが知られている。例えば、図6(a)に示すよ
うに半導体基体1上にアルミニュームから成る配線層2
及びシリコン酸化膜からなる層間絶縁層3を形成したウ
ェーハ4を研磨した場合について考えてみる。研磨布6
に比較的軟質の材料を用いた場合には、図6(a)に示
すように半導体基体1の局部的な膜厚の凹凸には追従で
きるが、研磨布6は押し付け圧力により変形し、凹凸の
底部まで進入するため、研磨後の平坦性が凹凸形状に依
存する結果となる。
However, in this mechanochemical polishing technique, a polyurethane cloth is generally used as the polishing cloth used for polishing, and the shape after polishing is dependent on the hardness of this resin. Is known to be greatly affected. For example, as shown in FIG. 6A, the wiring layer 2 made of aluminum is formed on the semiconductor substrate 1.
Consider a case where the wafer 4 having the interlayer insulating layer 3 made of silicon oxide film is polished. Polishing cloth 6
When a relatively soft material is used for the substrate, it is possible to follow the local unevenness of the film thickness of the semiconductor substrate 1 as shown in FIG. 6 (a), but the polishing cloth 6 is deformed by the pressing pressure, resulting in unevenness. As a result, the flatness after polishing depends on the uneven shape.

【0004】また、硬質の研磨布を用いた場合には図6
(b)に示すように研磨布6が変形することがないた
め、凹凸の底部が研磨されることはないが、ウエハ4の
局所的な膜厚の変動に追従できないために、研磨後の平
坦性は良好ではない。更に、これらの問題の発生を回避
するために図6(c)に示すように下層6aに軟質のポ
リウレタンを用い、上層6bに硬質のポリウレタンを用
いた研磨布6が提案されている。
Further, when a hard polishing cloth is used, FIG.
As shown in (b), since the polishing pad 6 is not deformed, the bottom portion of the unevenness is not polished, but it cannot follow the local fluctuation of the film thickness of the wafer 4, and therefore the flatness after polishing is not achieved. The sex is not good. Further, in order to avoid the occurrence of these problems, as shown in FIG. 6 (c), there has been proposed a polishing cloth 6 using soft polyurethane for the lower layer 6a and hard polyurethane for the upper layer 6b.

【0005】しかし、この研磨布6を用いて研磨を行な
うと、研磨時の押しつけ圧力による研磨布6の変形は上
層6bの硬質ポリウレタンにとどまらず、下層6aの軟
質ポリウレタンまでにおよんでいる。つまり研磨布の弾
性率は上層6b及び下層6aの複合弾性率により算出さ
れる物性となる。このため、弾性率の高い上層6bが研
磨により減少すると、研磨布の弾性率は下層6aの弾性
率に近くなり研磨後のウエハ4の平坦性が悪くなること
が明らかになった。従って、消耗して厚みが減少して
も、研磨布全体としての弾性率の変動が少ない研磨布び
その製造技術が必要とされている。
However, when the polishing cloth 6 is used for polishing, the deformation of the polishing cloth 6 due to the pressing pressure during polishing extends not only to the hard polyurethane of the upper layer 6b but also to the soft polyurethane of the lower layer 6a. That is, the elastic modulus of the polishing cloth is a physical property calculated by the composite elastic modulus of the upper layer 6b and the lower layer 6a. Therefore, it was revealed that when the upper layer 6b having a high elastic modulus is reduced by polishing, the elastic modulus of the polishing cloth becomes close to that of the lower layer 6a and the flatness of the wafer 4 after polishing deteriorates. Therefore, there is a need for a polishing cloth and a manufacturing technique for the polishing cloth, in which the elastic modulus of the polishing cloth as a whole does not fluctuate even when it is consumed and the thickness thereof is reduced.

【0006】[0006]

【課題を解決するための手段】上述の課題を解決するた
め、請求項1記載の発明は、被研磨材を保持し被研磨材
に研磨布を接触させ研磨剤を供給しながら研磨を行う方
法に用いられる研磨布に於いて、厚さ方向に硬度勾配を
有することを特徴とする研磨布の構成とし、研磨布の複
合弾性率が初期状態と磨耗した状態で変化しないように
した。
In order to solve the above problems, the invention according to claim 1 is a method for carrying out polishing while holding a material to be polished, bringing a polishing cloth into contact with the material to be polished, and supplying an abrasive. In the polishing cloth used in the above, the polishing cloth is characterized by having a hardness gradient in the thickness direction so that the composite elastic modulus of the polishing cloth does not change between the initial state and the worn state.

【0007】請求項2記載の発明は研磨布は硬度の異な
る研磨布を積層して硬度勾配を付与したことを特徴とす
る請求項1記載の研磨布の構成とし、研磨布の複合弾性
率が初期状態と磨耗した状態で変化しないようにした。
According to a second aspect of the present invention, the polishing cloth has a hardness gradient formed by laminating polishing cloths having different hardnesses, and the polishing cloth has a composite elastic modulus. The initial state and the worn state did not change.

【0008】請求項3記載の発明は研磨布は材料の密度
を制御して硬度勾配を付与したことを特徴とする請求項
1記載の研磨布の構成とし、研磨布の複合弾性率が初期
状態と磨耗した状態で変化しないようにした。
According to a third aspect of the present invention, the polishing cloth has a hardness gradient provided by controlling the density of the material, and the polishing cloth has a structure in which the composite elastic modulus of the polishing cloth is in an initial state. I tried not to change it when worn.

【0009】請求項4記載の発明は研磨布は材料の架橋
度を制御して硬度勾配を付与したことを特徴とする請求
項1記載の研磨布の構成とし、研磨布の複合弾性率が初
期状態と磨耗した状態で変化しないようにした。
According to a fourth aspect of the invention, the polishing cloth has a hardness gradient by controlling the degree of cross-linking of the material. I tried not to change between the condition and the worn condition.

【0010】請求項5記載の発明は被研磨材上の絶縁膜
を平坦化する絶縁膜の形成工程に於いて、厚さ方向に硬
度勾配を有する研磨布を用いて研磨することを特徴とす
る半導体装置の製造方法の構成とし、磨耗時にも研磨布
の弾性率の変化を無くし、ウエハ間の平坦性の良い研磨
ができる。
According to a fifth aspect of the present invention, in the step of forming the insulating film for flattening the insulating film on the material to be polished, polishing is performed using a polishing cloth having a hardness gradient in the thickness direction. With the configuration of the method for manufacturing a semiconductor device, the elastic modulus of the polishing cloth does not change even when worn, and polishing with good flatness between wafers can be performed.

【0011】以下に、本発明に係る研磨布とこれを用い
た研磨方法について実施の形態を挙げて説明する。
The polishing cloth according to the present invention and the polishing method using the same will be described below with reference to embodiments.

【0012】[0012]

【発明の実施の形態】 第1の実施の形態 本発明の第1の実施の形態について図1及び図2を参照
して説明する。図1(a)に示す如く、下層6aとし
て、ポリウレタンから成る軟質層上に上層6bとしてポ
リウレタンから成る硬質層を積層した研磨布6を作製し
た。具体的には下層6aのポリウレタン軟質層は、ジオ
ール成分としてエチレングリコール、ジカルボン酸とし
てアジピン酸を用いて形成したポリオールを4、4−メ
チレンジフェニルジイソシアティートと鎖長延長剤とし
て、エチレングリコールを添加し作製したポリウレタン
をグリセリンとヘキサメチレンジイソシアネートを反応
させた3官能以上のトリイソシアネートを添加し架橋反
応を行い作製した。
BEST MODE FOR CARRYING OUT THE INVENTION First Embodiment A first embodiment of the present invention will be described with reference to FIGS. 1 and 2. As shown in FIG. 1A, a polishing cloth 6 was prepared by laminating a soft layer made of polyurethane as a lower layer 6a and a hard layer made of polyurethane as an upper layer 6b. Specifically, in the polyurethane soft layer of the lower layer 6a, a polyol formed by using ethylene glycol as a diol component and adipic acid as a dicarboxylic acid is added with 4,4-methylenediphenyldiisocyanate and ethylene glycol as a chain extender. The polyurethane thus prepared was prepared by adding a tri- or more-functional triisocyanate obtained by reacting glycerin and hexamethylene diisocyanate to carry out a crosslinking reaction.

【0013】上層6bのポリウレタン硬質層はジオール
成分として1、4ブタンジオール、ジカルボン酸として
はテレフタル酸を用いて作成したポリオールにエチレン
グリコールと4、4メチレンジフェニルジイソシアネー
トの添加量を変えて作成したポリウレタン樹脂0.2m
m厚み10枚を用意した。本手法で形成した下層6a及
び上層6bの研磨布を圧着して貼り合わせ研磨布6を作
成した。
The polyurethane hard layer of the upper layer 6b is a polyurethane prepared by using 1,4 butanediol as a diol component and terephthalic acid as a dicarboxylic acid in a polyol prepared by changing the addition amounts of ethylene glycol and 4,4 methylenediphenyl diisocyanate. Resin 0.2m
10 sheets having a thickness of m were prepared. The lower layer 6a and the upper layer 6b formed by this method were pressure-bonded to each other to form a bonded polishing cloth 6.

【0014】本第1の実施の形態の硬度勾配を有する構
造の研磨布は、初期状態では図1(a)に示すように軟
質層の下層6a上に硬度勾配を有する硬質層の上層6b
が形成されている。硬質層の上層6bでは弾性率は低
く、下層6aでは弾性率が高い構造になっており、研磨
時の研磨ヘッドにかかる圧力により変形する。この研磨
布変形領域は上層6bに限定されるために変形時の弾性
率は硬質層の上層6bの弾性率となる(図1(b)参
照)。図2(a)に示すように上層6bが摩耗した状態
では、変形領域は下層研磨布まで及び変形時の弾性率は
硬質層の上層6aと軟質層の下層6aの複合弾性率とな
る(図2(b)参照)。この時の硬質層の上層6bは初
期の弾性率に比べ高い弾性率を有する為に複合弾性率は
初期と変化がなく、この研磨布を用いて被研磨材の研磨
を行なえば、平坦性の劣化が発生しない。
The polishing cloth having a hardness gradient structure according to the first embodiment has an initial state, as shown in FIG. 1A, in which the upper layer 6b of the hard layer having the hardness gradient is formed on the lower layer 6a of the soft layer.
Are formed. The upper layer 6b of the hard layer has a low elastic modulus and the lower layer 6a has a high elastic modulus, and is deformed by the pressure applied to the polishing head during polishing. Since the polishing cloth deformation region is limited to the upper layer 6b, the elastic modulus at the time of deformation is the elastic modulus of the upper layer 6b of the hard layer (see FIG. 1B). In the state where the upper layer 6b is worn as shown in FIG. 2A, the deformation region is up to the lower layer polishing cloth, and the elastic modulus at the time of deformation is the composite elastic modulus of the hard layer upper layer 6a and the soft layer lower layer 6a (see FIG. 2 (b)). Since the upper layer 6b of the hard layer at this time has a higher elastic modulus than the initial elastic modulus, the composite elastic modulus does not change from the initial value, and if the material to be polished is polished using this polishing cloth, the flatness No deterioration occurs.

【0015】第2の実施の形態 本第2の実施の形態は上層6bの架橋度を制御して硬度
勾配を付与した研磨布の構造を具現化した。具体的には
下層6aのポリウレタンは、ジオール成分としてエチレ
ングリコール、ジカルボン酸としてアジピン酸を用いて
作製したポリオールを4、4−メチレンジフェニルジイ
ソシアネートと鎖長延長剤としてエチレングリコールを
添加し作製したポリウレタンをグリセリンとヘキサメチ
レンジイソシアネートを反応させた3官能以上のトリイ
ソシアネートを添加し架橋反応を行い作製した。上層6
bのポリウレタン硬質層はジオール成分としてエチレン
グリコール、ジカルボン酸としてはテレフタル酸を用い
て作製したポリオールにエチレングリコールと未端のイ
ソシアネート基をアクリル酸で変性した4、4−メチレ
ンジフェニルジイソシアネートを加えて作製した。
Second Embodiment The second embodiment embodies a structure of a polishing cloth in which the degree of crosslinking of the upper layer 6b is controlled to give a hardness gradient. Specifically, the polyurethane of the lower layer 6a is a polyurethane prepared by adding 4,4-methylenediphenyl diisocyanate and a glycol prepared by using ethylene glycol as a diol component and adipic acid as a dicarboxylic acid and ethylene glycol as a chain extender. Trifunctional or more triisocyanate obtained by reacting glycerin and hexamethylene diisocyanate was added and a cross-linking reaction was carried out to prepare. Upper layer 6
The polyurethane hard layer of b is produced by adding ethylene glycol as a diol component and terephthalic acid as a dicarboxylic acid to a polyol produced by adding ethylene glycol and 4,4-methylenediphenyldiisocyanate obtained by modifying an unterminated isocyanate group with acrylic acid. did.

【0016】そして、アクリル変性することで紫外線及
び電子線で架橋できる様にした。その後、上層6b表面
に紫外線を照射し架橋を行った。紫外線により上層部で
は架橋反応は発生するが、下層では次第に紫外線が届か
なくなり架橋反応が発生しないために深さ方向で架橋度
が異なり、樹脂硬度が深さ方向に硬度分布が発生する。
その後上層及び下層樹脂を圧着して研磨布を作製した。
[0016] Then, it is made to be able to be crosslinked by ultraviolet rays and electron beams by modifying with acrylic. Then, the surface of the upper layer 6b was irradiated with ultraviolet rays to be crosslinked. The ultraviolet rays cause a crosslinking reaction in the upper layer portion, but the ultraviolet rays do not reach the lower layer gradually and the crosslinking reaction does not occur. Therefore, the degree of crosslinking differs in the depth direction, and the resin hardness has a hardness distribution in the depth direction.
After that, the upper layer resin and the lower layer resin were pressure bonded to produce a polishing cloth.

【0017】研磨布の総合した弾性率が初期状態と数回
の研磨後で変化しないと云う効果は第1の実施の形態と
同様であり、更に量産に向いた研磨布が提供できた。
The effect that the total elastic modulus of the polishing cloth does not change from the initial state after several polishing operations is similar to that of the first embodiment, and a polishing cloth suitable for mass production can be provided.

【0018】第3の実施の形態 本第3の実施の形態では、上述した第1、第2の実施の
形態で示した研磨布を用いた半導体装置の製造方法を具
現化した。ここで研磨工程の説明に先立ち、先ず本発明
を実施するために使用する研磨装置の構成を図2を参照
して説明する。ウェーハ(被研磨材)4は真空チャック
式のウェーハ保持台7ににより固定される。
Third Embodiment In the third embodiment, a method of manufacturing a semiconductor device using the polishing cloth shown in the above-described first and second embodiments is embodied. Prior to the description of the polishing process, the configuration of the polishing apparatus used to carry out the present invention will be described with reference to FIG. The wafer (material to be polished) 4 is fixed by a vacuum chuck type wafer holding table 7.

【0019】一方、研磨台5には研磨布6が固定されて
おり、研磨布6の上には研磨剤8が研磨剤供給管9から
供給される。そして、ウエハ保持台7はこれと連結した
保持台回転軸7aにより回転駆動がなされ、研磨台5は
これと連結した、研磨台回転軸5aにより回転駆動さ
れ、研磨が遂行される。尚、研磨時においては、ウェー
ハ保持台7を研磨台5に押しつける圧力を制御すること
によって、適正な研磨作業が実行される。
On the other hand, a polishing cloth 6 is fixed to the polishing table 5, and an abrasive 8 is supplied onto the polishing cloth 6 from an abrasive supply pipe 9. Then, the wafer holder 7 is rotationally driven by a holder rotating shaft 7a connected thereto, and the polishing table 5 is rotationally driven by a polishing table rotating shaft 5a connected thereto to perform polishing. During polishing, an appropriate polishing operation is performed by controlling the pressure with which the wafer holding table 7 is pressed against the polishing table 5.

【0020】好適な研磨の条件としては、例えば下記の
ようなものがある。 研磨条件 ウェーハ保持台回転軸の回転数 37 〔rpm〕 ウェーハ保持台の回転数 17 〔rpm〕 研磨圧力 5.5×103 〔Pa〕 研磨剤流量 200 〔ml/min〕
Suitable polishing conditions include, for example, the following. Polishing conditions Number of rotations of wafer holder rotation axis 37 [rpm] Number of rotations of wafer holder 17 [rpm] Polishing pressure 5.5 × 10 3 [Pa] Polishing agent flow rate 200 [ml / min]

【0021】ここでは、上述の研磨装置を用いた、半導
体装置の製造方法において層間膜の形成工程に於ける凸
部絶縁膜の除去に適用した工程について図4を参照して
説明する。先ず、図4(a)に示すように、シリコンか
ら成る半導体基体1に第1のシリコン酸化膜1aを形成
した後、フォトリソグラフィ及び反応性イオンエッチン
グによりアルミ配線層2を形成した。
Here, a process applied to the removal of the convex insulating film in the process of forming the interlayer film in the method of manufacturing a semiconductor device using the above-described polishing apparatus will be described with reference to FIG. First, as shown in FIG. 4A, after forming a first silicon oxide film 1a on a semiconductor substrate 1 made of silicon, an aluminum wiring layer 2 was formed by photolithography and reactive ion etching.

【0022】次いで、図4(b)に示すように下記の条
件にて第2のシリコン酸化膜(層間絶縁層)3を形成し
た。 酸化シリコン膜の成膜条件 原料ガス TEOS=800〔sccm〕 酸素O2 =600〔sccm〕 圧力 1330〔Pa〕 温度 400〔℃〕 RF出力 700〔W〕 但しTEOSはTetra Ethyl Ortho
Silicateの略である。
Next, as shown in FIG. 4B, a second silicon oxide film (interlayer insulating layer) 3 was formed under the following conditions. Deposition conditions of silicon oxide film Source gas TEOS = 800 [sccm] Oxygen O 2 = 600 [sccm] Pressure 1330 [Pa] Temperature 400 [° C.] RF output 700 [W] However, TEOS is Tetra Ethyl Ortho
Abbreviation for Silicate.

【0023】その後、上述のようにして形成された第2
のシリコン酸化膜3の凸部を研磨除去するためにウェー
ハ4を研磨装置のウェハ保持台7に保持し、そして上述
の研磨装置を用いてウェーハ4の被研磨面の研磨を行っ
た。これにより図4(c)に示すように第2のシリコン
酸化膜3の凸部が除去された。その後フッ化水素酸水溶
液を用いて研磨剤の除去を行っても層間絶縁膜3の表面
が粗面化されることはなかった。
Thereafter, the second film formed as described above
In order to polish and remove the convex portions of the silicon oxide film 3, the wafer 4 was held on the wafer holding table 7 of the polishing apparatus, and the surface to be polished of the wafer 4 was polished using the above-mentioned polishing apparatus. As a result, the convex portion of the second silicon oxide film 3 was removed as shown in FIG. After that, even if the polishing agent was removed using a hydrofluoric acid aqueous solution, the surface of the interlayer insulating film 3 was not roughened.

【0024】以上のようにしてウェーハ4の研磨がなさ
れることにより、第2のシリコン酸化膜(層間絶縁膜)
3が平坦化される。本条件を用いて連続700分の研磨
を行った結果、図5に示すように、従来の研磨布を使用
した場合には初期の研磨布に比べ上層研磨布膜厚が1/
3になると平坦性は大きく劣化するが第1の実施の形態
での研磨布では弾性率の変化がなく、研磨工程で初期状
態より、平坦性を損なわない結果が得られた。
By polishing the wafer 4 as described above, the second silicon oxide film (interlayer insulating film) is obtained.
3 is flattened. As a result of continuously polishing for 700 minutes using these conditions, as shown in FIG. 5, when the conventional polishing cloth is used, the upper polishing cloth film thickness is 1 / th that of the initial polishing cloth.
When the value becomes 3, the flatness is greatly deteriorated, but the polishing cloth of the first embodiment does not change the elastic modulus, and the result that the flatness is not impaired in the polishing step is obtained compared to the initial state.

【0025】[0025]

【発明の効果】本発明の研磨布によれば、初期の弾性率
と磨耗後の弾性率が変化せず、この研磨布を用いて被研
磨材を研磨すれば、平坦性の良い研磨が行なえる。
According to the polishing cloth of the present invention, the initial elastic modulus and the elastic modulus after abrasion do not change, and if a material to be polished is polished using this polishing cloth, polishing with good flatness can be achieved. It

【図面の簡単な説明】[Brief description of drawings]

【図1】 (a)は本発明の初期状態の研磨布の断面図
であり、(b)はその厚みに対する弾性率の勾配を示す
グラフである。
FIG. 1A is a cross-sectional view of a polishing cloth in an initial state of the present invention, and FIG. 1B is a graph showing a gradient of elastic modulus with respect to its thickness.

【図2】 (a)は本発明の磨耗後の研磨布の断面図で
あり、(b)はその厚みに対する弾性率の勾配を示すグ
ラフである。
FIG. 2 (a) is a cross-sectional view of the abrasive cloth of the present invention after abrasion, and FIG. 2 (b) is a graph showing a gradient of elastic modulus with respect to its thickness.

【図3】 本発明に用いる研磨装置の側面図である。FIG. 3 is a side view of a polishing apparatus used in the present invention.

【図4】 半導体装置の製造工程を示すウエハの側断面
図である。
FIG. 4 is a side sectional view of a wafer showing a manufacturing process of a semiconductor device.

【図5】 被研磨材の研磨面の平坦性と研磨時間依存性
を示すグラフである。
FIG. 5 is a graph showing the flatness of the polished surface of the material to be polished and the polishing time dependency.

【図6】 従来の研磨布と研磨中の被研磨材の側断面図
であり、(a)は軟質の研磨布を用いた例、(b)は硬
質の研磨布を用いた例、(c)は多層の研磨布を用いた
例をしめす。
6A and 6B are side sectional views of a conventional polishing cloth and a material to be polished, wherein FIG. 6A is an example using a soft polishing cloth, FIG. 6B is an example using a hard polishing cloth, and FIG. ) Indicates an example using a multilayer polishing cloth.

【符号の説明】[Explanation of symbols]

1 半導体基体 1a 第1のシリコン酸化膜 2 アルミ配線層 3 第2のシリコン酸化膜(層間絶縁層) 4 ウエハ(被研磨材) 5 研磨台 5a 研磨台回転台 6 研磨布 6a 下層 6b 上層 7 ウエハ保持台 7a 保持台回転台 8 研磨剤 9 研磨剤供給管 1 Semiconductor Substrate 1a First Silicon Oxide Film 2 Aluminum Wiring Layer 3 Second Silicon Oxide Film (Interlayer Insulation Layer) 4 Wafer (Material to be Polished) 5 Polishing Table 5a Polishing Table Rotating Table 6 Polishing Cloth 6a Lower Layer 6b Upper Layer 7 Wafer Holding table 7a Holding table rotating table 8 Abrasive 9 Abrasive supply pipe

Claims (5)

【特許請求の範囲】[Claims] 【請求項1】 被研磨材を保持し該被研磨材に研磨布を
接触させ研磨剤を供給しながら研磨を行う方法に用いら
れる研磨布に於いて、 厚さ方向に硬度勾配を有することを特徴とする研磨布。
1. A polishing cloth used for a method of holding a material to be polished, bringing a polishing cloth into contact with the material to be polished, and performing polishing while supplying an abrasive, wherein the polishing cloth has a hardness gradient in a thickness direction. Characteristic polishing cloth.
【請求項2】 前記研磨布は、硬度の異なる研磨布を積
層して硬度勾配を付与したことを特徴とする請求項1記
載の研磨布。
2. The polishing cloth according to claim 1, wherein the polishing cloth has a hardness gradient obtained by laminating polishing cloths having different hardnesses.
【請求項3】前記研磨布は、材料の密度を制御して硬度
勾配を付与したことを特徴とする請求項1記載の研磨
布。
3. The polishing cloth according to claim 1, wherein the polishing cloth is provided with a hardness gradient by controlling the density of the material.
【請求項4】 前記研磨布は、材料の架橋度を制御して
硬度勾配を付与したことを特徴とする請求項1記載の研
磨布。
4. The polishing cloth according to claim 1, wherein the polishing cloth is provided with a hardness gradient by controlling the degree of crosslinking of the material.
【請求項5】 被研磨材上の絶縁膜を平坦化する絶縁膜
の形成工程に於いて、厚さ方向に硬度勾配を有する研磨
布を用いて研磨することを特徴とする半導体装置の製造
方法。
5. A method of manufacturing a semiconductor device, characterized in that, in the step of forming an insulating film for flattening an insulating film on a material to be polished, polishing is performed using a polishing cloth having a hardness gradient in the thickness direction. .
JP20111395A 1995-08-07 1995-08-07 Polishing cloth and method for manufacturing semiconductor device Pending JPH0950974A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP20111395A JPH0950974A (en) 1995-08-07 1995-08-07 Polishing cloth and method for manufacturing semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP20111395A JPH0950974A (en) 1995-08-07 1995-08-07 Polishing cloth and method for manufacturing semiconductor device

Publications (1)

Publication Number Publication Date
JPH0950974A true JPH0950974A (en) 1997-02-18

Family

ID=16435624

Family Applications (1)

Application Number Title Priority Date Filing Date
JP20111395A Pending JPH0950974A (en) 1995-08-07 1995-08-07 Polishing cloth and method for manufacturing semiconductor device

Country Status (1)

Country Link
JP (1) JPH0950974A (en)

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2000027589A1 (en) * 1998-11-09 2000-05-18 Toray Industries, Inc. Polishing pad and polishing device
WO2003009362A1 (en) * 2001-07-19 2003-01-30 Nikon Corporation Polishing element, cmp polishing device and productionj method for semiconductor device
KR100465649B1 (en) * 2002-09-17 2005-01-13 한국포리올 주식회사 Integral polishing pad and manufacturing method thereof
JP2011200951A (en) * 2010-03-25 2011-10-13 Fujibo Holdings Inc Polishing pad
JP2017205869A (en) * 2012-04-25 2017-11-24 アプライド マテリアルズ インコーポレイテッドApplied Materials,Incorporated Printed chemical mechanical polishing pad with backing layer and polishing layer
US10518028B2 (en) 2011-02-09 2019-12-31 Becton, Dickinson And Company Nighttime basal dosing device
US10537973B2 (en) 2016-03-09 2020-01-21 Applied Materials, Inc. Correction of fabricated shapes in additive manufacturing
US10596763B2 (en) 2017-04-21 2020-03-24 Applied Materials, Inc. Additive manufacturing with array of energy sources
US10882160B2 (en) 2017-05-25 2021-01-05 Applied Materials, Inc. Correction of fabricated shapes in additive manufacturing using sacrificial material
US10967482B2 (en) 2017-05-25 2021-04-06 Applied Materials, Inc. Fabrication of polishing pad by additive manufacturing onto mold

Cited By (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2000027589A1 (en) * 1998-11-09 2000-05-18 Toray Industries, Inc. Polishing pad and polishing device
US6362107B1 (en) 1998-11-09 2002-03-26 Toray Industries, Inc. Polishing pad and polishing device
WO2003009362A1 (en) * 2001-07-19 2003-01-30 Nikon Corporation Polishing element, cmp polishing device and productionj method for semiconductor device
KR100465649B1 (en) * 2002-09-17 2005-01-13 한국포리올 주식회사 Integral polishing pad and manufacturing method thereof
JP2011200951A (en) * 2010-03-25 2011-10-13 Fujibo Holdings Inc Polishing pad
US10518028B2 (en) 2011-02-09 2019-12-31 Becton, Dickinson And Company Nighttime basal dosing device
US10029405B2 (en) 2012-04-25 2018-07-24 Applied Materials, Inc. Printing a chemical mechanical polishing pad
KR20190045422A (en) * 2012-04-25 2019-05-02 어플라이드 머티어리얼스, 인코포레이티드 Printed chemical mechanical polishing pad
JP2017205869A (en) * 2012-04-25 2017-11-24 アプライド マテリアルズ インコーポレイテッドApplied Materials,Incorporated Printed chemical mechanical polishing pad with backing layer and polishing layer
US10843306B2 (en) 2012-04-25 2020-11-24 Applied Materials, Inc. Printing a chemical mechanical polishing pad
US12011801B2 (en) 2012-04-25 2024-06-18 Applied Materials, Inc. Printing a chemical mechanical polishing pad
US11673225B2 (en) 2012-04-25 2023-06-13 Applied Materials, Inc. Printing a chemical mechanical polishing pad
US11207758B2 (en) 2012-04-25 2021-12-28 Applied Materials, Inc. Printing a chemical mechanical polishing pad
US11154961B2 (en) 2016-03-09 2021-10-26 Applied Materials, Inc. Correction of fabricated shapes in additive manufacturing
US10537973B2 (en) 2016-03-09 2020-01-21 Applied Materials, Inc. Correction of fabricated shapes in additive manufacturing
US11597054B2 (en) 2016-03-09 2023-03-07 Applied Materials, Inc. Correction of fabricated shapes in additive manufacturing
US10596763B2 (en) 2017-04-21 2020-03-24 Applied Materials, Inc. Additive manufacturing with array of energy sources
US11084143B2 (en) 2017-05-25 2021-08-10 Applied Materials, Inc. Correction of fabricated shapes in additive manufacturing using modified edge
US11059149B2 (en) 2017-05-25 2021-07-13 Applied Materials, Inc. Correction of fabricated shapes in additive manufacturing using initial layer
US11642757B2 (en) 2017-05-25 2023-05-09 Applied Materials, Inc. Using sacrificial material in additive manufacturing of polishing pads
US10967482B2 (en) 2017-05-25 2021-04-06 Applied Materials, Inc. Fabrication of polishing pad by additive manufacturing onto mold
US10882160B2 (en) 2017-05-25 2021-01-05 Applied Materials, Inc. Correction of fabricated shapes in additive manufacturing using sacrificial material

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