JPH10291900A - Method for producing semi-insulating InP single crystal and semi-insulating InP single crystal substrate - Google Patents

Abstract

(57) Abstract: A semi-insulating InP single crystal having uniformity of mobility and resistivity within a wafer surface of 10% or less and 20% or less, respectively, and a method of manufacturing the same. SOLUTION: A plurality of InP wafers 1 are arranged in an ampule 2 at intervals. An amount of red phosphorus 3 is placed in the ampoule 2 so that the inside of the ampoule 2 has a phosphorus vapor pressure atmosphere of not less than the dissociation pressure of InP equilibrated at the heat treatment temperature and not more than 15 atm, and is vacuum-sealed. It was installed in the horizontal heating furnace 6 and 93
Heating and holding at a heat treatment temperature of 0 ° C. or more and less than 1000 ° C. for a predetermined time (first heat treatment step). Subsequently, after cooling to room temperature and taking out each wafer 1 from the ampule 2, each wafer 1 is placed in another ampule 2 again, and
Vacuum sealing is performed together with an appropriate amount of red phosphorus 3 so that a phosphorus vapor pressure atmosphere of atm to 50 atm is obtained. It is placed in a horizontal heating furnace 6 and heated and maintained at a heat treatment temperature of more than 640 ° C. and less than 900 ° C. for a predetermined time (second heat treatment step).

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

TECHNICAL FIELD The present invention relates to OEIC, HEM
The present invention relates to a method for manufacturing a semi-insulating compound semiconductor used for an electronic device such as a T-ion implanted FET, and more particularly to a technique for achieving semi-insulating properties by heat treatment.

[0002]

2. Description of the Related Art A group III-V compound semiconductor has a resistivity of 10%.
^{In order} to increase the resistance to ⁶ Ω · cm or more (that is, to make the semiconductor semi-insulating), it is industrially necessary to add Fe, Co, Cr or the like as a deep acceptor to a crystal containing Si or S as a shallow donor. Used. This semi-insulating property is due to a mechanism of compensating a shallow donor with a deep acceptor. Therefore, the semi-insulating property cannot be obtained unless an element serving as a deep acceptor is added so as to be higher than the concentration of a shallow donor contained in the crystal.

However, when semi-insulating properties are obtained by doping Fe, Co, Cr or the like, it is desirable that the content of these elements be as low as possible. Because Fe, Co,
Since Cr or the like acts as a deep acceptor, in an ion-implanted electronic device (such as an FET), the activation rate of ion-implanted shallow donor-type impurities is reduced, or a device operating at a high frequency (OEIC or HE) is used.
This is because these elements diffuse into the epitaxially grown film and act as traps, which hinders high frequency and high speed. Furthermore, these F
Elements such as e are easily segregated, and the concentration of Fe or the like is different between the upper and lower portions of the crystal, so that the activation rate becomes non-uniform and the yield is reduced.

Conventionally, for example, as semi-insulating InP, F
e-doped InP is mainly used. But F
When the concentration of e or the like is less than 0.2 ppmw, the resistivity becomes 1
0 ⁶ Ω · cm becomes lower than, the semi-insulating property is lowered. In order to make this a semi-insulating crystal, the concentration of Fe or the like had to be higher than a certain concentration (0.2 ppmw). In general, Fe,
It is considered that the resistivity decreases when the concentration of Cr or the like decreases, because the impurity element serving as a shallow donor exists in the crystal as a residual impurity up to that level.
However, the present inventor believes that the mechanism of semi-insulating InP single crystal involves not only compensation by a shallow donor and a deep acceptor, but also an electrically active point defect. It has been found that a semi-insulating group III-V compound semiconductor can be obtained by heat-treating the crystal to control the concentration of point defects, even if the impurity element concentration of the deep acceptor is much lower than the conventional one. Was.

[0005] The applicant hereby prescribes that Fe, Co
Or the sum of the concentrations of any one or more of Cr is 0.2
The present invention has proposed a compound semiconductor manufacturing technology having a ppmw or less and a resistivity of 10 ⁷ Ω · cm or more (Japanese Patent Publication No. 5-2963).
No. 9). In order to process a plurality of wafers at the same time, each wafer is aligned at substantially equal intervals using a jig, and is applied to a quartz ampoule.
An InP wafer (compound semiconductor) cut out from a single crystal prepared by, for example, a melt growth method containing 0.2 ppmw or less of Co or Cr is vacuum-sealed in a quartz ampule, and red phosphorus is arranged in the quartz ampule. The partial pressure of phosphorus in the ampoule is set to a pressure not lower than the dissociation pressure of InP, and the quartz ampoule is heated at 400 to 640 ° C. In the prior invention, after our research, even if the undoped or InP single crystal in which the concentration of one or more of the impurity elements of Fe, Co or Cr is 0.05 ppmw or less is heat-treated, half of the It turned out that it did not become insulating.

Therefore, the present applicant has further studied, and as an improvement plan, first of all, Fe, Co or Cr existing as a residual impurity without intentionally adding impurities together with red phosphorus in a quartz ampoule. A method of heat-treating an InP wafer having a total concentration of any one or more of 0.05 ppmw or less in an atmosphere having a phosphorus partial pressure exceeding 6 kg / cm ^{2, such} that the total concentration of the impurity elements is 0. 05 ppmw or less, the resistivity at 300K is 10 ⁶ Ω · cm or more, and the mobility is 3000 cm ² / V · s.
III-V group compound semiconductors (InP) that exceed the semi-insulating properties
(Japanese Patent Application Laid-Open No. 3-279299).
No., "Semi-insulating InP single crystal and its manufacturing method"). The semi-insulating III-V compound semiconductor (I
nP) is 0.05% of the total concentration of impurities contained in the crystal, in particular, at least one of Fe, Co and Cr.
By setting the content to ppmw or less, a decrease in mobility due to contained impurities is suppressed, and the mobility is set to a desired value or more. However, following our research, Japanese Patent Application Laid-Open No. 3-279299
In the invention proposed in (1), a high resistivity and high mobility InP single crystal can be obtained, but when a plurality of wafers are heat-treated at the same time, a wafer having high resistance and high mobility does not occur. It has been found that a high resistivity and high mobility InP single crystal cannot always be obtained stably.

[0007]

Therefore, the present applicant has conducted further studies, and has conducted a study without intentionally adding impurities and the concentration of at least one of Fe, Co and Cr present as residual impurities. After a first heat treatment step of heat-treating the InP single crystal having a total of 0.05 ppmw or less in a phosphorus vapor pressure atmosphere exceeding 6 kg / cm ² , the first heat treatment step is performed in a phosphorus vapor pressure atmosphere at a dissociation pressure of the InP single crystal or higher. 640 ° C
A technique for producing a semi-insulating InP single crystal by performing a second heat treatment step of performing a heat treatment at a temperature in the range of
Method for producing nP single crystal ”).

However, according to the subsequent study by the inventors of the present invention, in the invention of Japanese Patent Application No. 6-244166, an InP single crystal having a high resistivity and a high mobility can be stably obtained. It cannot be said that these levels are sufficiently satisfactory in terms of the uniformity of resistivity and mobility, and there is room for improvement in order to improve the uniformity in the wafer surface.

Further, the present applicant has previously reported the results of research on heat treatment in an atmosphere having a low phosphorus vapor pressure (phosphorus pressure = 1 atm) (Pro. Of 7th Conf. On InPa).
nd Related Materials, Sapporo, P37-40 (1995)). Among them, the uniformity of the resistivity in the wafer surface is reported to be 24%. However, if the heat treatment is performed on an industrial scale, the uniformity of the resistivity and the mobility in the surface is further deteriorated. , Not enough.

The present invention has been made in view of such circumstances, and an object of the present invention is to provide a semi-insulating InP single crystal having good uniformity of resistivity and mobility in a wafer surface. An object of the present invention is to provide a method for producing an insulating InP single crystal.

Another object of the present invention is to provide a semi-insulating In which the mobility uniformity within the wafer surface is 10% or less.
Mobility uniformity within P single crystal substrate or wafer surface is 1
An object of the present invention is to provide a semi-insulating InP single crystal substrate having a resistivity of 0% or less and a uniformity of resistivity in a wafer surface of 20% or less.

[0012]

Means for Solving the Problems In order to achieve the above object, the present inventors have made intensive studies and as a result, after heat-treating undoped InP single crystal in a high-temperature and low-phosphorus vapor pressure atmosphere, a low-temperature and high-pressure When heat treated in a phosphorus vapor pressure atmosphere,
It has been found that a semi-insulating InP single crystal having both good in-plane resistivity and uniform mobility can be obtained.

The present invention has been made on the basis of the above-described findings, and the total concentration of at least one of Fe, Co and Cr present as residual impurities without intentionally adding impurities is 0.1%. After the first heat treatment step of subjecting the InP single crystal of not more than 05 ppmw to a phosphorus vapor pressure atmosphere at a temperature of 930 ° C. or more and less than 1000 ° C. and a dissociation pressure of InP and 15 atm or less equilibrated at that temperature,
The method is characterized in that a second heat treatment step of performing heat treatment at a temperature of more than 40 ° C. and less than 900 ° C. and a phosphorus vapor pressure atmosphere of 5 atm or more and 50 atm or less is performed. In the present invention, the phosphorus vapor pressure in the first heat treatment step is preferably more than 0.5 atm and less than 10 atm, more preferably more than 1.0 atm and less than 5 atm. Also,
The phosphorus vapor pressure in the second heat treatment step is preferably 15
It is good to be more than atm and 50 atm or less.

As for the dissociation pressure of InP, one example is Philips Research Report (Philips Res.
p.) Volume 12 (1957) 127-140 "THE PTx PHASE DI
AGRAMS OF THE SYSTEMS In-As, Ga-As AND In-P "
Page 38, FIG. 8. Is shown in The FIG. 8.
By extrapolating the line on the left and its line at
The dissociation pressure of P is determined.

Here, in the first heat treatment step, the reason why the heat treatment temperature is 930 ° C. or more and less than 1000 ° C. is as follows.
This is because if the temperature is lower than 0 ° C., InP does not become semi-insulating, whereas if it is higher than 1000 ° C., InP decomposes. In the first heat treatment step, the phosphorus vapor pressure is equal to or higher than the dissociation pressure of InP at which the heat treatment temperature is balanced by 15 atm.
The reason for this is that InP decomposes below the dissociation pressure, whereas when it exceeds 15 atm, the heat treatment temperature is high, so that contamination of Fe, Co, Cr, Ni, etc. becomes remarkable.

In the second heat treatment step, the reason why the heat treatment temperature is higher than 640 ° C. and lower than 900 ° C. is that even if the temperature is lower than 640 ° C., no inconvenience in characteristics occurs, but 620 ° C.
If it is less than 10 seconds, the annealing time is too long to be practical, and the heat treatment temperature range (400 to 640) in the second heat treatment step of Japanese Patent Application No. 6-244166 filed by the present applicant.
C.), while at 900 ° C. or higher, the equilibrium defect concentration becomes high, so that the effect of homogenization is not exhibited. Also, in the second heat treatment step, the phosphorus vapor pressure is not less than 5 atm and not more than 50 atm because the mobility uniformity exceeds 10% when the phosphorus vapor pressure is less than 5 atm, while the industrial productivity is increased when it exceeds 50 atm. Because it lacks. Further, the phosphorus vapor pressure in the second heat treatment step is preferably 15 atm or more and 50 atm or less,
If it is less than 1, the uniformity of the resistivity exceeds 20%.

According to the above-mentioned means, the first heat treatment step suppresses the incorporation of impurities such as Ni and Co while keeping the InP
A small amount of Fe in the single crystal is activated, and the concentration of a shallow donor (shallow donor) related to phosphorus vacancies is reduced, so that the InP single crystal becomes semi-insulating. And
By the second heat treatment step, the shallow donor remaining in the InP single crystal is further reduced, so that the in-plane resistivity of the InP single crystal is made uniform.

Further, the semi-insulating InP single crystal substrate of the present invention has a total content of at least one of Fe, Co and Cr present as residual impurities without intentionally adding impurities. After the first heat treatment step of subjecting the InP single crystal of 0.05 ppmw or less to a phosphorus vapor pressure atmosphere at a temperature of 930 ° C or more and less than 1000 ° C and a dissociation pressure of InP and 15 atm or less equilibrated at that temperature, 6%
It is obtained by performing a second heat treatment step of performing a heat treatment in a phosphorus vapor pressure atmosphere at a temperature of more than 40 ° C. and less than 900 ° C. and 5 atm or more and 50 atm or less, and uniformity of mobility in a wafer surface is 10% or less. It is characterized by being.

Further, the semi-insulating InP single crystal substrate of the present invention has a total content of at least one of Fe, Co and Cr present as residual impurities without intentionally adding impurities. InP of 0.05 ppmw or less
After a first heat treatment step of heat treating the single crystal at a temperature of 930 ° C. or more and less than 1000 ° C. and in a phosphorus vapor pressure atmosphere of equilibrium at a dissociation pressure of InP or more and 15 atm or less,
At a temperature exceeding 640 ° C. and less than 900 ° C. and 15 atm
Second heat treatment in a phosphorus vapor pressure atmosphere of 50 atm or less
Wherein the uniformity of the mobility in the wafer surface is 10% or less and the uniformity of the resistivity in the wafer surface is 20% or less. .

The above-mentioned "uniformity of resistivity in the wafer surface" or "uniformity of mobility in the wafer surface" means that a portion excluding the outer peripheral portion 5 mm of the wafer is taken in a specific direction (wafer (The center part of the measured value) is measured at regular intervals (standard deviation of the obtained value / average value) × 100 (%). That is, when the data y1, y2, y3,..., Yn are obtained, the uniformity is determined by converting yav to the data y1, y2, y3,.
..., the average of yn

[0021]

(Equation 1) It is represented by

[0022]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Fe, Co or C present as a residual impurity without intentionally adding impurities
The total concentration of any one or more of r is 0.05 ppmw
Wafer (thin plate) cut from the following InP single crystal
As shown in FIG. 1, a plurality of 1, 1,... Are arranged in a quartz ampule 2 at intervals using a quartz jig 4 serving as a spacer. Subsequently, a suitable amount of high-purity red phosphorus 3 was placed in the quartz ampule 2 so that the inside of the quartz ampule 2 became a phosphorus vapor pressure atmosphere having a dissociation pressure of InP equal to or higher than the heat treatment temperature and 15 atm or less and evacuated. Thereafter, the opening of the quartz ampule 2 is sealed with an oxyhydrogen burner. Subsequently, the quartz ampoule 2 is set in a horizontal heating furnace 6 and is heated and held by the heater 5 at a heat treatment temperature of 930 ° C. or more and less than 1000 ° C. for a predetermined time (first heat treatment step).

In the first heat treatment step, if the heat treatment temperature is lower than 930 ° C., InP does not become semi-insulating,
Above 0 ° C., InP decomposes. If the phosphorus vapor pressure atmosphere is lower than the dissociation pressure of InP, InP decomposes.
nP does not become semi-insulating. Further, when the phosphorus vapor pressure atmosphere is preferably more than 0.5 atm and less than 10 atm, more preferably more than 1.0 atm and less than 5 atm, the variation in characteristics among wafers in the same lot becomes smaller.

Subsequently, the wafer 1 is cooled to room temperature,
Are removed from the quartz ampoule 2 and the wafers 1, 1,... Are placed in another quartz ampule 2 again in an appropriate amount such that the inside of the ampule 2 becomes a phosphorus vapor pressure atmosphere of 5 atm or more and 50 atm or less. Vacuum sealed with red phosphorus 3 of purity. The quartz ampoule 2 is set in a horizontal heating furnace 6 and is heated and held by the heater 5 at a heat treatment temperature of more than 640 ° C. and less than 900 ° C. for a predetermined time (second heat treatment step).

In the second heat treatment step, if the heat treatment temperature is lower than 640 ° C., especially lower than 620 ° C., a long time is required for annealing, and if it is higher than 900 ° C., the effect of uniformizing the resistivity in the wafer surface appears. Absent. On the other hand, if the phosphorus vapor pressure is less than 5 atm, the uniformity of mobility exceeds 10%, and
If it exceeds, it is not suitable for industrial production. Further, the phosphorus vapor pressure is preferably 15 atm or more and 50 atm or less.
The reason is that the resistivity uniformity is less than 20% at less than 15atm.
It is because it exceeds.

After that, the wafer is cooled to room temperature, and the InP wafers 1, 1,.

According to the above embodiment, the first heat treatment step makes the InP single crystal semi-insulating, and the second heat treatment step reduces defects remaining in the InP single crystal. The in-plane resistivity is made uniform. Therefore, a semi-insulating InP single crystal having good uniformity of resistivity and mobility in the wafer surface can be obtained.

The horizontal heating furnace 6 is of a closed type and is
Using a material that can be pressurized to a pressure of kg / cm ² , an argon gas having a pressure corresponding to the phosphorus partial pressure corresponding to the temperature is introduced into the heating furnace at the time of raising and lowering the temperature. The balance is maintained and the quartz ampule 2 is prevented from being destroyed.

Further, in the above embodiment, when the process is shifted from the first heat treatment step to the second heat treatment step, the wafers 1, 1,... Are once taken out of the quartz ampule 2, and are placed in another quartz ampule 2. It was evacuated again, but a horizontal heating furnace having two temperature zones was used, and the temperature of one end of the ampoule was adjusted so that the phosphorus vapor pressure in the ampoule could be controlled to a predetermined pressure. While the wafers 1, 1,.
May be directly transferred to the heat treatment step.

[0030]

EXAMPLES The features of the present invention will be clarified below with reference to specific examples, but the present invention is not limited by the following examples.

(Example 1) The content of Fe was 0.03 ppmw and the content of Co and Cr were lower than the analytical detection lower limit (0 .0.5 ppmw) or less, 0.5 mm thick InP wafers 1, 1,... Were cut out. Then, as shown in FIG. 1, 30 InP wafers 1, 1,... Were arranged in a plurality of quartz ampules 2 at intervals using a quartz jig 4. Subsequently, the purity was 7
N red phosphorus 3 is placed in each quartz ampoule 2 and 1 × 10
After evacuation to ^-6 Torr, the opening of each quartz ampule 2 was sealed with an oxyhydrogen burner. At this time, the amount of red phosphorus 3 in each quartz ampule 2 was 910 ° C., 925 ° C., 940 ° C.
C, 950 C, 960 C, 970 C, 980 C and 99 C
At each heat treatment temperature of 0 ° C., the partial pressure of phosphorus (P ₄ ) was adjusted to 1 atm. Subsequently, the quartz ampules 2 were placed one by one in a horizontal heating furnace 6 and heated and maintained by the heater 5 at each heat treatment temperature for 40 hours (corresponding to a first heat treatment step). Then, cool down to room temperature at a rate of 2 ° C per minute,
The InP wafers 1, 1,... Were taken out of each quartz ampule 2.

After the heat treatment, the in-plane resistivity and mobility of the (001) InP wafers 1, 1,... In the <110> orientation were examined by a three-terminal guard ring method (hole measurement). The measurement interval is 100 μm, and the number of measurement points is 401.

The results are shown in FIGS. 2 and 4 show the in-plane resistivity and mobility of one wafer, respectively (error bars represent variations in one wafer surface), and FIGS. 3 and 5 show, respectively. 4 shows the uniformity of the resistivity and the uniformity of the mobility in the plane of one wafer. From those graphs, the heat treatment temperature was 940-
In the range of 990 ° C., InP becomes semi-insulating (resistivity =
10 ⁶ Ω · cm to 2 × 10 ⁸ Ω · cm). Further, from the graph, even when the heat treatment temperature is 930 ° C., In
It is assumed that the resistivity of P becomes 10 ⁶ Ω · cm or more, and InP becomes semi-insulating. Further, in the first heat treatment step, by setting the heat treatment temperature to be higher than or equal to 940 ° C. and lower than or equal to 970 ° C., uniformity of in-plane resistivity and mobility after the first heat treatment step can be understood.

(Embodiment 2) InP wafers 1, 1,... Cut out from the InP ingot obtained in the same manner as in Embodiment 1 are placed in a plurality of quartz ampules 2 and made of quartz jigs 4.
And 30 sheets were arranged. Subsequently, red phosphorus 3 having a purity of 7N was placed in each quartz ampule 2 and evacuated to 1 × 10 ⁻⁶ Torr, and then the opening of each quartz ampule 2 was sealed with an oxyhydrogen burner. At this time, the amount of red phosphorus 3 in each quartz ampoule 2 was set at a heat treatment temperature of 950 ° C. and a phosphorus partial pressure of 1
Adjusted to be atm. Subsequently, the quartz ampules 2 were placed one by one in a horizontal heating furnace 6 and heated and held at 950 ° C. for 40 hours by a heater 5 (first heat treatment step). Then, cool down to room temperature at a rate of 2 ° C per minute,
The InP wafers 1, 1,... Were taken out of each quartz ampule 2.

The resistivity and the mobility of several wafers 1 obtained were examined by Hall measurement. As a result, the in-plane resistivity of one wafer was 8.2 × 10 ^{6 to} 3.5 × 10 ^{6. 7}
In Ω · cm, the uniformity was 22.5 to 53.7%. The in-plane mobility of one wafer is 3750-4.
At 600 cm ² / V · s, its uniformity was 3.0-35%.

Then, each of the wafers 1, 1,... Taken out is again placed in another plurality of quartz ampules 2, and the inside of each ampule 2 is heated at a heat treatment temperature of 807 ° C. at 0.5 atm, 1 atm, 5 atm, respectively.
atm, 10atm, 15atm, 30atm, 40atm and 5
It was vacuum-sealed together with an appropriate amount of high-purity red phosphorus 3 so as to provide a phosphorus vapor pressure atmosphere of 0 atm. The quartz ampules 2 were placed in a horizontal heating furnace 6 and heated and maintained at 807 ° C. for a predetermined time (second heat treatment step). Thereafter, the mixture was cooled to room temperature at a rate of 2 ° C./min.
The wafers 1, 1,... Were taken out.

The obtained wafers 1, 1,... Were examined for resistivity and mobility by Hall measurement. The result is shown in FIG.
To FIG. 6 and 8 show the relationship between the phosphorus vapor pressure during the second heat treatment step and the in-plane resistivity and mobility of one wafer, respectively (error bars indicate the in-plane of one wafer). In FIGS. 7 and 9).
These figures show the uniformity of the resistivity and the uniformity of the mobility in the plane of one wafer.

From these graphs, it was found that when the phosphorus vapor pressure in the second heat treatment step was 5 atm or more, an InP single crystal having in-plane mobility uniformity of 10% or less was obtained.
In addition, it was found that when the phosphorus vapor pressure in the second heat treatment step was 15 atm or more, an InP single crystal having in-plane resistivity uniformity of 20% or less was obtained. Even if the phosphorus vapor pressure in the second heat treatment step was higher than 50 atm, no significant improvement was observed in the variation of the in-plane resistivity. Therefore, considering the industrial productivity, it is appropriate that the pressure be 50 atm or less. is there.

[0039]

According to the method for producing a semi-insulating InP single crystal according to the present invention, one or more of Fe, Co and Cr present as residual impurities without intentionally adding impurities is contained. An InP single crystal having a total concentration of 0.05 ppmw or less is heated at a temperature of 930 ° C. or more and less than 1000 ° C. and at a dissociation pressure of InP at equilibrium at that temperature of 15 ° C. or more.
After the first heat treatment step of heat treatment in a phosphorus vapor pressure atmosphere of atm or less, preferably more than 0.5 atm and less than 10 atm, more preferably more than 1.0 atm and less than 5 atm,
Since the second heat treatment step of performing the heat treatment at a temperature of more than 640 ° C. and less than 900 ° C. and a phosphorus vapor pressure atmosphere of 5 atm or more and 50 atm or less, preferably 15 atm or more and 50 atm or less, the mobility in the wafer surface and Semi-insulating InP single crystal having good uniformity of resistivity, particularly semi-insulating InP having uniformity of mobility in a wafer surface of 10% or less and uniformity of resistivity in a wafer surface of 20% or less. A single crystal is obtained.

The present inventors have previously described the effects obtained by the present invention as described in Pro. Of 8th Conf. On InP.
and Related Materials, Germany (1996) 43-46
`` Reproducibility in the Fabrication '' on the page
of Undoped Semi-Insulating InP ".

As a prior art for homogenizing in-plane electrical characteristics by subjecting a compound semiconductor single crystal to a two-stage heat treatment, there is one disclosed in Japanese Patent Application Laid-Open No. 62-226900. . In this technique, the first and second heat treatment temperatures are each set to a temperature 0.85 to 0.9 times the melting point of the grown crystal (861 in the case of InP).
９928 ° C.) and 0.7 to 0.75 times the temperature (equivalent to 661 to 728 ° C. in the case of InP). However, this prior art is different from the invention of the present application in the heat treatment temperature of the first stage, and therefore it is naturally assumed that the effect is also different from the present invention. In other words, the technique disclosed in Japanese Patent Application Laid-Open No. 62-226900 merely has an effect that the crystal is homogeneous because the photoluminescence intensity is stable, and the uniformity of various physical properties of a wafer made from this crystal is improved. And the in-plane uniformity of mobility and resistivity as in the present invention is 10% each.
It is not known whether or not InP single crystals of up to 20% can be obtained.

Further, as a conventional technique for heat-treating a compound semiconductor single crystal to make the electrical characteristics in the plane uniform, there is one disclosed in Japanese Patent Application Laid-Open No. 2-120300. This technique allows growing crystals from 800 to 12
After the heat treatment at 00 ° C., the cooling rate to room temperature is changed in two steps, which is essentially different from the present invention in which the two-step heat treatment is performed. Therefore, the effect obtained is also different from that of the present invention, and the technique of Japanese Patent Application Laid-Open No. 2-120300 can only make the threshold value of the FET fabricated on the substrate extremely uniform, and the mobility and the resistance as in the present invention can be improved. The in-plane uniformity of the ratio is 10% or less and 2 respectively.
It is unknown whether 0% or less of InP single crystal can be obtained.

As a conventional technique for performing a two-stage heat treatment on a compound semiconductor single crystal, Japanese Patent Application Laid-Open No.
There is one disclosed in Japanese Patent Publication No. 192500. In this technique, the first stage heat treatment temperature is set to a temperature higher than 1100 ° C. and lower than the melting point of the grown crystal, and the second stage heat treatment temperature is set to 750 to 1100 ° C., so that micro defects (AB) appearing by AB etching can be obtained. (AB pits) can be obtained. But,
This prior art is clearly different from the invention of the present application in the first heat treatment temperature, and is essentially different from the present invention.

As a heat treatment technique for a compound semiconductor single crystal, a certain upper limit temperature Th (Th is a temperature not lower than 800 ° C. and lower than the melting point of the grown crystal) and a lower limit temperature Tl (Tl is 80
Japanese Patent Laid-Open Publication No. 8-119800 discloses a technique of repeatedly heating and cooling at least twice between a temperature of 0 ° C. or higher and a temperature of Th or lower. However, this technology is essentially different from the present invention in that heating and cooling between an upper limit temperature Th corresponding to the first heat treatment temperature and a lower limit temperature Tl corresponding to the second heat treatment temperature are repeated two or more times. Differently. That is,
In the present invention, the first and second heat treatments are not repeated. Moreover, the effect obtained by Japanese Patent Application Laid-Open No. 8-119800 is that a linear defect (slip-like defect) does not occur when epitaxial growth is performed using a wafer cut from a single crystal ingot after heat treatment. This is clearly different from the effects of the present invention.

Further, R. Fornari et al., Materials Scienc
e and Engineering B28 (1994), pp. 95-100, `` Preparation and characterization of semi-i
In nsulating undoped indium phosphide, two heat treatments at 910 ° C. under vacuum atmosphere resulted in a resistivity of 4.4 × 10 ⁷ Ω · cm and a mobility of 3940 cm ² / V · s.
Was obtained (Sample AS)
8), which is clearly different from the present invention in which a two-step heat treatment is performed by applying a phosphorus pressure because the heat treatment atmosphere is vacuum.

G. Hirt et al., Pro. Of 7th Conf.on I
37-4 of nP and Related Materials, Sapporo (1995)
“Preparation of Homogeneous InPS” described on page 0
ubstrates by VGF-Growth and Wafer Annealing, heat treatment at 900 ° C resulted in resistivity of 1.4 ×
A semi-insulating InP single crystal of 10 ⁷ Ω · cm was obtained (anneal
aled VGF sample), which is essentially different from the present invention in which a two-step heat treatment is performed.

[Brief description of the drawings]

FIG. 1 is a schematic view showing a state in which a wafer is installed in a heating furnace used for manufacturing a semi-insulating InP single crystal.

FIG. 2 is a characteristic diagram showing a relationship between a heat treatment temperature and an in-plane resistivity of an InP wafer obtained in Example 1.

FIG. 3 is a characteristic diagram showing a relationship between a heat treatment temperature of an InP wafer obtained in Example 1 and uniformity of in-plane resistivity.

FIG. 4 is a characteristic diagram showing a relationship between a heat treatment temperature and an in-plane mobility of an InP wafer obtained in Example 1.

FIG. 5 is a characteristic diagram showing a relationship between a heat treatment temperature of an InP wafer obtained in Example 1 and uniformity of in-plane mobility.

FIG. 6 is a characteristic diagram showing a relationship between a phosphorus vapor pressure and an in-plane resistivity of an InP wafer obtained by Example 2.

FIG. 7 is a characteristic diagram showing a relationship between a phosphorus vapor pressure of an InP wafer obtained in Example 2 and uniformity of in-plane resistivity.

FIG. 8 is a characteristic diagram showing a relationship between a phosphorus vapor pressure and an in-plane mobility of an InP wafer obtained by Example 2.

FIG. 9 is a characteristic diagram showing the relationship between the phosphorus vapor pressure of an InP wafer obtained in Example 2 and the uniformity of in-plane mobility.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Wafer (InP single crystal) 2 Quartz ampoule 3 Red phosphorus 4 Quartz jig 5 Heater 6 Horizontal heating furnace

Claims (4)

[Claims] 1. An InP single crystal in which a total concentration of at least one of Fe, Co, and Cr present as residual impurities is 0.05 ppmw or less without intentionally adding impurities, at 930 ° C. At a temperature lower than 1000 ° C. and higher than the dissociation pressure of InP equilibrated at that temperature and higher than 15 at.
After the first heat treatment step in which the heat treatment is performed in a phosphorus vapor pressure atmosphere of not more than 640 m, a second heat treatment step is performed in which the heat treatment is performed in a phosphorus vapor pressure atmosphere of more than 640 ° C. and less than 900 ° C. and not less than 5 atm and not more than 50 atm. A method for producing a semi-insulating InP single crystal, comprising: 2. The phosphorus vapor pressure in the second heat treatment step is as follows:
2. The method for producing a semi-insulating InP single crystal according to claim 1, wherein the thickness is 15 atm or more and 50 atm or less. 3. A semi-insulating InP single crystal substrate, wherein the uniformity of mobility within a wafer surface is 10% or less. 4. The semi-insulating In according to claim 3, wherein the uniformity of the resistivity in the wafer surface is 20% or less.
P single crystal substrate.