JPH11135697A - Semiconductor device and manufacturing method thereof - Google Patents

Abstract

[PROBLEMS] To improve the reliability of a semiconductor device by solving the problem of package cracks in the die pad, which is the main cause of the package cracks, while maintaining the quality of the lead portion of the lead frame as before. Provide equipment. A lead frame having a lead portion and a die pad portion, a semiconductor chip mounted on the die pad portion, and a mold formed so as to cover the lead frame and the semiconductor chip with a tip of the lead portion exposed. In a semiconductor device including an exterior resin made of a material, the lead portion has a thermal conductivity at 20 ° C. of 0.2.
formed of a metal material having a cal / cm / s / ° C or higher;
A semiconductor device in which the die pad portion is formed of a metal material having a smaller coefficient of thermal expansion than a mold material, and a method of manufacturing the same.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device using a mold package, and more particularly to a semiconductor device having a large chip size and a lead frame structure free from package cracks in a thin package, and a method of manufacturing the same.

[0002]

2. Description of the Related Art Conventionally, a semiconductor device of this type uses a lead frame in which a lead portion and a die pad portion made of the same metal material are formed, and a semiconductor chip is mounted on a die pad.
After mounting, the lead frame and the semiconductor chip are exposed and the lead frame and the semiconductor chip are covered and molded using an exterior resin. As a material for forming the lead frame, an alloy mainly composed of nickel ca 42% and iron ca 58% (hereinafter, referred to as an alloy)
Abbreviated as "42 alloy". ) And copper-based materials such as copper materials and copper-based alloys.

[0003]

However, since the conventional semiconductor device described above usually uses the same metal material, it uses a 42 alloy material having a smaller linear expansion coefficient than the molding material of the exterior resin. However, the boundary between the molding material and the lead portion is firmly joined due to the difference in the coefficient of linear expansion, and the moisture resistance is excellent, but the heat diffusion property is poor, and a high output semiconductor integrated circuit element cannot be mounted.

On the other hand, when a copper-based material having excellent thermal conductivity is used to improve the thermal diffusivity, it is possible to mount a high-power element, but the linear expansion coefficient becomes the same as that of the molding material. There is a drawback that a space is generated at the boundary between the part and the molding material, and the humidity resistance reliability is poor.

In particular, recent IC chip sizes are large,
In a thin package, as a result of heating by solder reflow, there is a problem of a package crack generated due to vaporization and expansion of water taken in the package due to moisture absorption, and a problem of reliability of a semiconductor device is occurring.

[0006] Also, as a technique for eliminating external soldering due to recent global environmental problems, a so-called Pd-PPF in which a copper-based material is preliminarily plated with palladium has attracted attention. However, when Pd plating is formed on a reliable 42 alloy material as a lead frame material, a salt-sp
A rust problem occurred in the ray test, making it unusable. Therefore, when Pd-PPF is used, the material of the lead frame is limited to the copper-based material.

As a technique related to the present invention, Japanese Patent Application Laid-Open
JP-A-64245 discloses an insulating adhesive for joining a lead portion using a metal material having a smaller linear expansion coefficient than a molding material and an island portion (die pad portion) using a metal material having a higher thermal conductivity than the lead portion. And a semiconductor chip mounted on the island portion, and an exterior resin using the molding material formed so as to cover the lead frame and the semiconductor chip with the tip of the lead portion exposed. A semiconductor device characterized by including is described. A 42 alloy having a smaller linear expansion coefficient than the molding material is used for the lead portion, and a copper-based material having excellent thermal conductivity is used for the die pad portion.

However, according to the method of the above-mentioned document, the boundary between the lead portion and the molding material has no space and is excellent in moisture resistance reliability, and the die pad portion is excellent in heat dissipation of the package, but the die pad which is a main cause of package cracks The problem of cracks in the department has not been solved. This is because the adhesiveness between the copper material and the resin is inferior to that of the 42 alloy material, so that moisture is easily taken in at the boundary of the mold material.

Therefore, the present invention solves the problem of cracks in the die pad portion, which is the main cause of the package crack, while maintaining the quality of the lead portion of the lead frame as in the prior art, and provides a more reliable semiconductor device. The purpose is to provide.

[0010]

Means for Solving the Problems In order to solve the above problems,
The semiconductor device of the present invention is formed by covering a lead frame having a lead portion and a die pad portion, a semiconductor chip mounted on the die pad portion, and covering the lead frame and the semiconductor chip with a tip of the lead portion exposed. The lead portion is formed of a metal material having a thermal conductivity of not less than 0.2 cal / cm / s / ° C. at 20 ° C., and the die pad portion is provided with a die pad portion. Are formed of a metal material having a smaller coefficient of thermal expansion than the mold material.

The semiconductor device of the present invention preferably has a thermal conductivity at 20 ° C. of 0.2 cal / cm / s / ° C.
The above metal material is a copper material or a copper alloy material, and the metal material having a smaller coefficient of thermal expansion than the mold material is 25%.
The coefficient of thermal expansion in the temperature range of
It is a metal material of not more than × 10 ⁻⁶ / ° C.

In the lead frame, a lead portion made of a metal material having a thermal conductivity of 0.2 cal / cm / s / ° C. or more at 20 ° C. and a die pad portion made of a metal material having a smaller thermal expansion coefficient than the molding material are provided. ,Epoxy resin,
It has a structure bonded with a heat-resistant adhesive such as a polyimide resin.

The semiconductor device of the present invention is more preferably
The lead portion is formed of a copper material or a copper alloy material,
In the present invention, wherein the die pad portion is formed of a 42 alloy material, the lead portion may be formed of a palladium-plated copper material or a copper alloy material,
The lead portion is preferably, after palladium plating, may be formed of a copper material or a copper alloy material that is flash-plated with gold, and more preferably,
The lead portion may be formed of a copper material or a copper alloy material plated with nickel, plated with palladium, and further flash-plated with gold. The 42 alloy material used for the die pad portion is not particularly subjected to palladium plating or gold flash plating, and by using the 42 alloy material itself that has been used in the past, the adhesiveness to the resin is reduced to copper material or palladium-based copper material. It is much better than the gold flash plated one, does not take in moisture and can contribute to package cracking improvement.

Table 1 shows epoxy resins A and B as molding materials, copper material (palladium-plated copper, gold flash plating), S-PPF
The following shows data comparing the adhesive strength between a material (copper plated with nickel and palladium and further subjected to flash plating with gold) and a 42 alloy material. (Experiment) After bonding a resin and a predetermined material with a polyimide resin as an adhesive in a bonding area of 60 mm ² , a die bonding heat simulation was performed at 160 ° C. for 1 hour, and then a wire bonding heat simulation was performed for 29 hours.
It was left at 0 ° C. for 25 seconds, and further placed under ordinary epoxy resin molding conditions.
It was left at 75 ° C. for 4 hours. The experiment was performed on eight samples each. Thereafter, the adhesive strength (tensile strength) of each sample was measured. The measured values were shown as a maximum value, a minimum value and an average value.

As is apparent from Table 1, the adhesiveness between the resins A and B and the 42 alloy material is superior to other copper-based materials.

[0016]

[Table 1]

In the present invention, furthermore, a die bond, a wire bond,
In order to reduce stress generated in a heat process such as solder reflow, the die pad portion preferably has a structure having a groove or a hole such as a cross slit.

In the present invention, the lead frame is joined to the outer frame by a suspension via a caulked joint. The caulked joint and the suspension have a structure having grooves such as a cross slit for reducing stress generated in a heat process such as die bonding, wire bonding, and solder reflow due to a difference in thermal expansion coefficient between materials. Is preferred. Further, it is also preferable that the hanging portion and the outer frame are detoured and joined to have a structure that gives flexibility to thermal expansion in a heating step such as solder reflow.

The semiconductor package according to the present invention includes:
Depending on the mounting form, the SOP (Smal
lOutline Package), package 4
QFP (Quad Flat J-lead) with leads coming out from the direction and having a gull-fin shape, and QFJ (Quad Flat J-lead) having leads coming from four directions of the package having a J-lead shape.
ed Package).

Further, the present invention provides a lead frame having a lead portion and a die pad portion, a semiconductor chip mounted on the die pad portion, and the lead frame and the semiconductor chip in a state in which a tip of the lead portion is exposed. In a method of manufacturing a semiconductor device including a covering resin formed using a molding material formed by covering, a step of grinding a back surface of a semiconductor wafer to a thickness necessary for assembly, and forming the semiconductor wafer into individual semiconductor chips. Separating, bonding and fixing the semiconductor chip on a die pad portion formed of a metal material having a smaller coefficient of thermal expansion than a molding material of a lead frame, and connecting the electrode portion of the semiconductor chip to an external device. Interconnecting a designated lead with a thin metal wire, and molding the semiconductor chip and the thin metal wire with a molding material It is a manufacturing method and a step of further sealing.

(1) FIG. 1 shows a process diagram of the first step of grinding the back surface of a semiconductor wafer to a thickness necessary for assembly. As shown in FIG. 1, this is a step of grinding the back surface of the semiconductor wafer 1 to a thickness necessary for assembly. That is, the semiconductor wafer 1 is formed by the diamond wheel 3.
The surface of the semiconductor wafer 1 is in contact with the grinding table, so that it is preferable to protect the surface by applying the tape 2 so as not to be damaged or damaged.

(2) The second step of separating a semiconductor wafer into individual semiconductor chips is called a dicing step. That is, as shown in FIG. 2, this is a step of cutting the semiconductor wafer into a desired size using the dicing blade 4, and the separated chips are not scattered on the back surface of the semiconductor wafer 1. Alternatively, it is preferable to apply an adhesive tape 6 so that handling after dicing becomes easy.

(3) In the third step, the semiconductor chip is
This is a step of bonding and fixing on a die pad portion formed of a metal material having a smaller coefficient of thermal expansion than the mold material.

A lead frame is generally produced by a press method (punching) using a mold and a press, but it can also be produced by etching.

In the case of manufacturing by the above-mentioned press method, a resist material (mask) is not required, and mass production is excellent by a stamping method using a mold.

Here, a case of manufacturing by etching will be described as an example.

First, as shown in FIG. 3, a die pad 22 made of a metal material having a thermal expansion coefficient of 10 × 10 ⁻⁶ / ° C. or less in a temperature range of 25 ° C. to 300 ° C., such as a 42 alloy material; The thermal conductivity of copper material at 20 ° C. is 0.
An outer frame made of a metal material of 2 cal / cm / s / ° C or higher;
The inner lead and the outer lead 24 are aligned using a jig facility with an insulating and heat-resistant adhesive, and are heated and pressed by a hot press. As insulation heat-resistant adhesive,
A polyimide resin (thermoplastic resin) can be preferably used. The joining of the polyimide resin is performed at a joining temperature, for example, 250 to 300 ° C. The polyimide resin may be bonded only to a necessary portion. Alternatively, a polyimide resin may be bonded in advance around the 42 alloy (plate shape), and then positioned and bonded to a copper-based frame.

Next, as shown in FIG.
After the deposition of No. 5, as shown in FIG. 5, a copper-based material is processed by photoetching.

Next, as shown in FIG. 6, a resist film 26 is deposited on the die pad portion, and as shown in FIG. 7, the die pad portion is processed by photoetching.
Create a lead frame.

Next, as shown in FIG. 8, a paste 9 is applied on the die pad portion 8 of the lead frame by the dispenser 7, and the semiconductor chips 11 separated in the second step are brought into close contact with the collet 10. It is transferred to a die pad portion and bonded by applying pressure (referred to as a die bonding process). As the adhesive to be used, a thermosetting resin is preferably used, and the bonding is performed by high-temperature curing after die bonding. Since the die pad portion is formed of a metal material having a smaller coefficient of thermal expansion than a mold material such as 42 alloy, distortion due to heat in a process in which heat is applied is small. It is also preferable that the die pad portion has a large number of holes, cross-shaped slits, and the like, in order to reduce stress in a step where heat is applied.

(4) The fourth step is a step of connecting the electrode portion of the semiconductor chip to a lead designated for external connection with a thin metal wire. In this step, the electrode section 12 of the semiconductor chip fixed to the die pad section 8 of the lead frame in the third step is connected to the lead designated for external connection by a fine wire such as gold. For example, as shown in FIG. 9, a gold wire 1 is
A ball is formed at the tip of 3, and the electrode portion of the semiconductor chip is
An inner lead 15 made of a metal material having a thermal conductivity of 0.2 cal / cm / s / ° C. or more at 0 ° C. is connected with a gold wire 13.

(5) The fifth step is a step of sealing the semiconductor chip and the thin metal wires with a molding material. That is, as shown in FIG. 6, the tablet-shaped molding resin 21 is pre-heated (a), charged into the dies 18 and 19 (b), and pressed by the plunger 20 to transfer the resin. After curing in a mold until it is cured (c), it is taken out (d).

As the molding material, an insulating heat-resistant resin such as an epoxy resin or a polyimide resin can be used.

(6) After sealing with the molding material as described above, burrs generated on the surface of the external lead are removed, and a metal coating of solder or tin is applied to the external lead.
The semiconductor device of the present invention can be manufactured by, for example, bending the external lead into a shape that is easy to mount.

[0035]

Embodiments of the present invention will be described below in detail with reference to the drawings.

First Embodiment FIG. 7 is a sectional view of a first embodiment of a semiconductor device according to the present invention. In the semiconductor device shown in FIG. 11, the semiconductor chip 11 is bonded on the die pad 8 of the lead frame, and the die pad portion 8 is joined to the outer frame.

The lead frame has a die pad 8 at the center.
And a lead portion including a plurality of inner leads 15 and outer leads 27 on the outer periphery.

In this embodiment, the lead portion is
For example, TCZ, KLF-125, MF224, EFT
Thermal conductivity at 20 ° C. of a copper-based metal material such as BC75X, CDA7025, and TAMAC15 is 0.2 cal /.
It is formed of a metal material of cm / s / ° C. or higher. Further, the die pad portion is formed of a metal material having a smaller thermal expansion coefficient than a mold material such as 42 alloy and 50 alloy.

The die pad 8 of this single lead frame
The semiconductor chip 11 is bonded to the semiconductor chip 11, and a resin layer for fixing a joint between the electrode 12 of the semiconductor chip and an interposer (depress) (not shown) is formed on the semiconductor chip 11. The interposer is connected to the inner lead 15 of the lead frame by a bonding wire W.

As described above, the connected semiconductor chip and lead frame are sealed by the package P.

The semiconductor device thus configured operates by being electrically connected to the outer lead 27 substrate of the lead frame.

According to the present embodiment, the outer frame, the outer leads and the inner leads are formed of a metal material such as a copper material having a thermal conductivity of not less than 0.2 cal / cm / s / ° C. at 20 ° C. The die pad, which is the main source of cracks, is made of a metal material with a smaller coefficient of thermal expansion than a mold material such as 42 alloy, which has a long history of reliability. Then, since the adhesiveness with the molding material is good, the incorporation of moisture is reduced. Accordingly, a highly reliable and high quality semiconductor device can be obtained. In particular, since the die pad portion does not need to be subjected to Pd-PPF and gold flash plating, it is possible to obtain a high quality and low cost as compared with the related art. A semiconductor device can be obtained.

Second Embodiment In a semiconductor device according to a second embodiment of the present invention, as shown in FIG. 12, a semiconductor chip (not shown) is adhered onto a die pad portion of a lead frame, and a die pad portion 8 is externally mounted. The frame 31 is joined to the caulked joint 29 and the suspension 30. The lead frame has a die pad 8 in the center.
And a lead portion including a plurality of inner leads 15 and outer leads 27 on the outer periphery. The die pad portion, the lead portion and the outer frame are fixed and connected to each other using a caulking bonding material.

Further, the lead portion is made of, for example, TCZ,
KLF-125, MF224, EFTBC75X, CD
20 such as copper-based metal materials such as A7025 and TAMAC15
It is formed of a metal material having a thermal conductivity of 0.2 cal / cm / s / ° C. or more at ° C. The die pad portion is formed of a metal material having a smaller coefficient of thermal expansion than a mold material such as 42 alloy and 50 alloy.

Further, in the second embodiment of the present invention, a large number of holes 28 are provided in the die pad portion 8.

According to the present embodiment, similarly to the first embodiment, the outer frame, the outer leads and the inner leads have a heat conductivity of 0.2 cal /
The die pad portion, which is formed of a metal material having a temperature of not less than cm / s / ° C. and is a main source of package cracks, is formed of a metal material having a smaller coefficient of thermal expansion than a mold material such as 42 alloy, which has a long history of reliability. By doing so, the structure has better adhesion with the mold material and is less likely to cause package cracking, as compared with the case where the package is formed only of a copper-based material. Therefore, a high-quality semiconductor device with high reliability can be obtained. In particular, the die pad portion is made of Pd-PP
Since it is not necessary to perform F and gold flash plating, a high-quality and low-cost semiconductor device can be obtained as compared with the related art.

Further, by providing a large number of holes in the die pad portion, die bonding, wire bonding, molding,
Since stress can be reduced in a process in which heat such as solder reflow is applied, a highly reliable and high-quality semiconductor device without a package crack or the like can be obtained.

Third Embodiment In a semiconductor device according to a third embodiment of the present invention, as shown in FIG. 13, similarly to the first embodiment, a semiconductor chip (not shown) is provided on the die pad 8 of the lead frame. The die pad portion 8 is bonded to the outer frame by a caulking bonding portion 29 and a hanging portion 30. The lead frame has a die pad portion 8 at the center and a lead portion including a plurality of inner leads and outer leads on the outer periphery. The die pad portion, the lead portion, and the outer frame are fixed and connected using a caulking bonding material.

The lead portion may be formed of, for example, TCZ,
KLF-125, MF224, EFTBC75X, CD
20 such as copper-based metal materials such as A7025 and TAMAC15
It is formed of a metal material having a thermal conductivity of 0.2 cal / cm / s / ° C. or more at ° C. The die pad portion is formed of a metal material having a smaller coefficient of thermal expansion than a mold material such as 42 alloy and 50 alloy.

Further, the third embodiment of the present invention is characterized in that the hanging portion 30 is provided with a slit 32.

According to the present embodiment, similarly to the first embodiment, the outer frame, the outer lead and the inner lead have a thermal conductivity of 0.2 cal /
The die pad portion, which is formed of a metal material of not less than cm / s / ° C. and is a main element of the package crack, is formed of a metal material having a smaller coefficient of thermal expansion than a mold material such as 42 alloy, which has a proven track record in the past. Thereby, the adhesion to the mold material is improved as compared with a case where the semiconductor device is formed only of a copper-based material, and a highly reliable high-quality semiconductor device can be obtained. In particular, since it is not necessary to apply Pd-PPF and gold flash plating to the die pad portion, a high-quality and low-cost semiconductor device can be obtained as compared with the related art.

Further, by providing a slit in the hanging portion, stress can be reduced in a process in which heat is applied, such as die bonding, wire bonding, molding, and solder reflow, so that high reliability without a package crack or the like can be achieved. A high-quality semiconductor device can be obtained.

Fourth Embodiment In a semiconductor device according to a fourth embodiment of the present invention, similarly to the first embodiment, a semiconductor chip is bonded onto a die pad portion of a lead frame, and the die pad portion is crimped to an outer frame. Joined by the joint and the hanging part, the lead frame is
A die pad portion is provided at the center, and a lead portion including a plurality of inner leads and outer leads is provided on the outer periphery thereof. The die pad portion, the lead portion and the outer frame are fixed and connected to each other using a caulking bonding material.

Further, the lead portion is formed of, for example, TCZ,
KLF-125, MF224, EFTBC75X, CD
20 such as copper-based metal materials such as A7025 and TAMAC15
It is formed of a metal material having a thermal conductivity of 0.2 cal / cm / s / ° C. or more at ° C. The die pad portion is formed of a metal material having a smaller coefficient of thermal expansion than a mold material such as 42 alloy and 50 alloy.

Further, in the fourth embodiment of the present invention, as shown in FIG. 14, a structure in which the hanging portion 30 is detoured is provided, so that a die bonding step, a wire bonding step,
Measures have been taken to give flexibility to thermal expansion in thermal processes such as molding and solder reflow.

According to the present embodiment, similarly to the first embodiment, the outer frame, the outer lead and the inner lead have a heat conductivity of 0.2 cal /
The die pad portion, which is formed of a metal material having a temperature of at least cm / s / ° C. and is a main source of package cracks, is made of a metal material having a smaller coefficient of thermal expansion than a mold material such as 42 alloy, which has a long history of reliability. By forming the semiconductor device, the adhesiveness with the mold material is improved as compared with the case where the semiconductor device is formed only of a copper-based material, and a highly reliable high-quality semiconductor device can be obtained. In particular, the die pad portion is made of Pd-PP
Since it is not necessary to perform F and gold flash plating, a high-quality and low-cost semiconductor device can be obtained as compared with the related art.

Further, the joint between the hanging portion and the outer frame is detoured and joined so as to have flexibility, thereby reducing stress in a process such as die bonding, wire bonding, molding, and solder reflow where heat is applied. Therefore, a highly reliable and high-quality semiconductor device free from package cracks and the like can be obtained.

In the present invention, the stress can be more effectively reduced by arbitrarily combining the first to fourth embodiments.

[0059]

As described above, according to the present invention,
The outer frame, the outer lead and the inner lead have a thermal conductivity of 0.2 cal / cm / s / 20 ° C. of a copper material or the like.
The die pad part, which is made of a metal material with a temperature of ℃ or higher, and is the main source of package cracks, is made of a metal material with a smaller coefficient of thermal expansion than a mold material such as 42 alloy, which has a long history of reliability. In addition, the adhesiveness (adhesiveness) with the mold resin is improved as compared with the case where only the copper-based material is used. Therefore, the invasion of moisture can be effectively prevented, and the structure is such that a package crack (popcorn phenomenon) due to the ingress of moisture is hardly generated, so that a highly reliable and high quality semiconductor device can be obtained. . In particular, since it is not necessary to apply Pd-PPF and gold flash plating to the die pad portion, a high-quality and low-cost semiconductor device can be obtained as compared with the related art.

Also, grooves or holes such as cross-shaped slits are provided in the die pad portion, the hanging portion, and the caulking joint portion so that the hanging portion and the outer frame are joined so as to have flexibility, for example. Since stress can be reduced in a process in which heat is applied, such as die bonding, wire bonding, molding, and solder reflow, a highly reliable and high-quality semiconductor device free from package cracks and the like can be obtained.

[Brief description of the drawings]

FIG. 1 is a diagram illustrating a process of manufacturing a semiconductor of the present invention,
It is a figure which shows a back surface grinding process.

FIG. 2 is a view in the middle of a semiconductor manufacturing process of the present invention,
It is a figure which shows what is called a dicing process.

FIG. 3 is a diagram in which a die pad material and an outer frame, an inner lead and an outer lead material are bonded together with a heat-resistant adhesive.

FIG. 4 is a diagram in which a resist film is deposited and patterned from the state diagram shown in FIG. 3;

5 is a diagram in which the material of the outer frame is processed by photoetching from the state diagram shown in FIG. 4;

6 is a diagram in which a resist film is deposited and patterned on the 42 alloy side from the state diagram shown in FIG.

7 is a diagram obtained by processing a 42 alloy material and an adhesive layer from the state diagram shown in FIG. 6;

FIG. 8 is a view in the middle of a semiconductor manufacturing process of the present invention,
It is a figure showing what is called a die bonding process.

FIG. 9 is a diagram illustrating a process of manufacturing a semiconductor according to the present invention;
It is a figure which shows what is called a wire bonding process.

FIG. 10 is a diagram illustrating a so-called mold sealing process, which is a process in the course of the semiconductor manufacturing process of the present invention.

FIG. 11 is a cross-sectional view showing one embodiment of the semiconductor device of the present invention.

FIG. 12 is a cross-sectional view showing one embodiment of the semiconductor device (without mounting a semiconductor chip) of the present invention.

FIG. 13 is a cross-sectional view showing one embodiment of the semiconductor device (without mounting a semiconductor chip) of the present invention.

FIG. 14 is a view in which a detour is provided in the hanging portion and joined to an outer frame.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Semiconductor wafer, 2 ... Protective tape, 3 ... Diamond wheel, 4 ... Dicing blade, 5 ... Flat ring, 6 ... Adhesive sheet, 7 ... Dispenser, 8 ... Die pad, 9 ... Paste, 10 ... Collet, 11 ... Semiconductor chip, 12 ... Electrode, 13, W ... Gold wire, 14 ...
Ball bonding, 15 ... Inner lead, 16 ...
Capillary, 17: Lead frame, 18: Die (upper), 19: Die (lower), 20: Plunger, 21 ...
Resin tablet, 22: die pad material, 23: heat resistant adhesive, 24: outer frame, material of inner and outer leads, 25, 26: resist film, P: package

Claims (14)

[Claims] A lead frame having a lead part and a die pad part, a semiconductor chip mounted on the die pad part, and a lead frame formed by covering the lead frame and the semiconductor chip with a tip of the lead part exposed. A semiconductor device including an exterior resin using a molding material, wherein the lead portion has a thermal conductivity of 0.2 ca at 20 ° C.
A semiconductor device, which is formed of a metal material of l / cm / s / ° C or higher, and wherein the die pad portion is formed of a metal material having a smaller coefficient of thermal expansion than a mold material. 2. The semiconductor device according to claim 1, wherein said die pad portion is formed of a metal material having a coefficient of thermal expansion of 10 × 10 ⁻⁶ / ° C. or less within a temperature range of 25 ° C. to 300 ° C. . 3. The semiconductor device according to claim 1, wherein said lead portion is formed of a copper material or a copper alloy material. 4. The semiconductor device according to claim 1, wherein said die pad portion is formed of a 42 alloy material. 5. A lead frame having a lead portion and a die pad portion, a semiconductor chip mounted on the die pad portion, and formed so as to cover the lead frame and the semiconductor chip with a tip of the lead portion exposed. In a semiconductor device including an exterior resin using a molding material, the lead portion is formed of a copper material or a copper alloy material, and the die pad portion is formed of a 42 alloy material. 6. The semiconductor device according to claim 5, wherein said lead portion is formed of a copper material or a copper alloy material plated with palladium. 7. The semiconductor device according to claim 5, wherein said lead portion is formed of a copper material or a copper alloy material plated with palladium and then flash-plated with gold. 8. The lead portion is plated with nickel. The semiconductor device according to claim 5, wherein the semiconductor device is formed of a copper material or a copper alloy material subjected to palladium plating and further flash-plated with gold. 9. The semiconductor device according to claim 1, wherein said die pad portion has a groove or a hole. 10. A lead frame having a lead portion, a die pad portion, and an insulating adhesive for joining the lead portion and the die pad portion, a semiconductor chip mounted on the die pad portion, and exposing a tip of the lead portion. In a semiconductor device including an exterior resin using a molding material formed so as to cover the lead frame and a semiconductor chip in a state in which the lead portion has a thermal conductivity of 0.2 ca at 20 ° C.
The die pad portion is formed of a metal material having a smaller coefficient of thermal expansion than a mold material, and the lead frame and the outer frame are suspended via a caulked joint. A semiconductor device joined by parts. 11. The semiconductor device according to claim 10, wherein said caulked joint has a structure having a groove. 12. The semiconductor device according to claim 10, wherein said hanging portion has a structure having a groove. 13. The semiconductor device according to claim 10, wherein said hanging portion has a structure in which said hanging portion is detoured and joined to an outer frame. 14. A lead frame having a lead portion and a die pad portion, a semiconductor chip mounted on the die pad portion, and formed so as to cover the lead frame and the semiconductor chip with a tip of the lead portion exposed. A method of manufacturing a semiconductor device including an exterior resin using a mold material, wherein: a step of grinding the back surface of the semiconductor wafer to a thickness necessary for assembly; and a step of separating the semiconductor wafer into individual semiconductor chips. The semiconductor chip has a thermal conductivity of 0.2 at 20 ° C.
bonding and fixing to a lead frame including a lead portion formed of a metal material of cal / cm / s / ° C. or higher, and a die pad portion formed of a metal material having a smaller coefficient of thermal expansion than the mold material; A method of manufacturing a semiconductor device, comprising: a step of wiring-connecting an electrode portion of the semiconductor chip to a lead designated for external connection with a thin metal wire; and a step of sealing the semiconductor chip and the thin metal wire with a molding material.