JPH11282012A5 - - Google Patents

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Publication number
JPH11282012A5
JPH11282012A5 JP1998084660A JP8466098A JPH11282012A5 JP H11282012 A5 JPH11282012 A5 JP H11282012A5 JP 1998084660 A JP1998084660 A JP 1998084660A JP 8466098 A JP8466098 A JP 8466098A JP H11282012 A5 JPH11282012 A5 JP H11282012A5
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Japan
Prior art keywords
insulating film
interlayer insulating
under
pad wiring
film
Prior art date
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Pending
Application number
JP1998084660A
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Japanese (ja)
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JPH11282012A (en
Filing date
Publication date
Application filed filed Critical
Priority to JP8466098A priority Critical patent/JPH11282012A/en
Priority claimed from JP8466098A external-priority patent/JPH11282012A/en
Publication of JPH11282012A publication Critical patent/JPH11282012A/en
Publication of JPH11282012A5 publication Critical patent/JPH11282012A5/ja
Pending legal-status Critical Current

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Description

【発明の名称】アクティブマトリクス基板および表示装置[Title of Invention] Active matrix substrate and display device

【0001】
【発明の属する技術分野】
本発明は、駆動回路内蔵型のアクティブマトリクス基板、およびそれを用いた表示装置に関するものである。さらに詳しくは、アクティブマトリクス基板の端子構造に関するものである。
[0001]
[Technical Field to which the Invention Belongs]
The present invention relates to an active matrix substrate with a built-in driving circuit and a display device using the same, and more particularly to a terminal structure of the active matrix substrate.

【0006】
【課題を解決するための手段】
上記課題を解決するために、本発明では、走査線およびデータ線に接続する画素スイッチング用の薄膜トランジスタと、該薄膜トランジスタに接続してなる画素電極と、前記走査線および前記データ線に信号出力する走査線駆動回路およびデータ線駆動回路と、該駆動回路に信号供給する複数の信号配線とを有し、前記薄膜トランジスタは、ゲート電極と、第1の層間絶縁膜の第1のコンタクトホールを介して前記データ線に電気的に接続するソース領域と、前記第1の層間絶縁膜の第2のコンタクトホールを介してドレイン電極に電気的に接続するドレイン領域とを備え、前記ドレイン電極には、前記第1の層間絶縁膜の上層側に形成された第2の層間絶縁膜の第3のコンタクトホールを介して前記画素電極が電気的に接続するアクティブマトリクス基板の製造方法において、
前記走査線、前記データ線の少なくともいずれかの配線同士を電気的に接続する短絡用配線を形成する工程と、前記第1の層間絶縁膜に前記短絡用配線の切断予定部分を露出させる第1の切断用孔を形成する工程と、ペルヒドロポリシラザンまたはこれを含む組成物の塗布膜を焼成した絶縁膜を用いて前記第2の層間絶縁膜を形成する工程と、前記第2の層間絶縁膜に前記第1の切断用孔と重なる位置に第2の切断用孔を形成して前記短絡用配線の切断予定部分を露出させる工程と、前記第1の切断用孔および前記第2の切断用孔を介して前記短絡用配線を前記切断予定部分で切断する工程とを有することを特徴とする。
[0006]
[Means for solving the problem]
In order to achieve the above object, the present invention provides a method for manufacturing an active matrix substrate, the active matrix substrate comprising: thin film transistors for pixel switching connected to scanning lines and data lines; pixel electrodes connected to the thin film transistors; a scanning line drive circuit and a data line drive circuit for outputting signals to the scanning lines and the data lines; and a plurality of signal wirings for supplying signals to the drive circuits, the thin film transistors comprising: a gate electrode; a source region electrically connected to the data line via a first contact hole in a first interlayer insulating film; and a drain region electrically connected to a drain electrode via a second contact hole in the first interlayer insulating film, the drain electrode being electrically connected to the pixel electrode via a third contact hole in a second interlayer insulating film formed on an upper side of the first interlayer insulating film, the method comprising:
The method includes the steps of: forming a short-circuit wiring that electrically connects at least one of the scanning lines and the data lines; forming a first cutting hole in the first interlayer insulating film to expose a portion of the short-circuit wiring that is to be cut; forming the second interlayer insulating film using an insulating film obtained by baking a coating film of perhydropolysilazane or a composition containing perhydropolysilazane; forming a second cutting hole in the second interlayer insulating film at a position overlapping the first cutting hole to expose the portion of the short-circuit wiring that is to be cut; and cutting the short-circuit wiring at the portion that is to be cut via the first cutting hole and the second cutting hole.

【0067】
なお、本発明は上記実施例に限定されることなく、本発明の要旨の範囲内で種々変形した形態で実施が可能である。たとえば、本発明は上述の各種の液晶表示装置に限らず、エレクトロルミネッセンス(EL)表示装置、プラズマ表示装置にも適用できるものである。
[0067]
The present invention is not limited to the above-described embodiments, and various modifications can be made within the scope of the present invention. For example, the present invention is not limited to the various liquid crystal display devices described above, but can also be applied to electroluminescence (EL) display devices and plasma display devices.

Claims (8)

走査線およびデータ線に接続する画素スイッチング用の薄膜トランジスタと、該薄膜トランジスタに接続してなる画素電極と、前記走査線または前記データ線に信号出力する駆動回路と、該駆動回路に信号供給する複数の信号配線と、該信号配線に電気的に接続する端子とを有し、前記薄膜トランジスタは、ゲート電極にゲート絶縁膜を介して対峙するチャネル領域と、第1の層間絶縁膜のコンタクトホールを介して前記データ線に電気的に接続するソース領域と、前記第1の層間絶縁膜および該第1の層間絶縁膜の表面に形成された第2の層間絶縁膜のコンタクトホールを介して前記画素電極が電気的に接続するドレイン領域とを備えるアクティブマトリクス基板において、
前記第2の層間絶縁膜は、ペルヒドロポリシラザンまたはこれを含む組成物の塗布膜を焼成した絶縁膜を備え、
前記端子は、前記ゲート絶縁膜と前記第1の層間絶縁膜との層間に金属膜からなる第1のパッド下配線と、前記第1の層間絶縁膜のコンタクトホールを介して前記第1のパッド下配線に接続する金属膜からなる第2のパッド下配線と、前記第2の層間絶縁膜のコンタクトホールを介して前記第2のパッド下配線に電気的に接続するパッドとを備えていることを特徴とするアクティブマトリクス基板。
an active matrix substrate comprising: pixel-switching thin film transistors connected to scanning lines and data lines; pixel electrodes connected to the thin film transistors; a drive circuit for outputting signals to the scanning lines or the data lines; a plurality of signal wirings for supplying signals to the drive circuit; and terminals electrically connected to the signal wirings, the thin film transistors comprising a channel region facing a gate electrode via a gate insulating film; a source region electrically connected to the data line via a contact hole in a first interlayer insulating film; and a drain region electrically connected to the pixel electrode via a contact hole in the first interlayer insulating film and a second interlayer insulating film formed on the surface of the first interlayer insulating film;
the second interlayer insulating film comprises an insulating film obtained by baking a coating film of perhydropolysilazane or a composition containing perhydropolysilazane;
the terminal comprises a first under-pad wiring made of a metal film between the gate insulating film and the first interlayer insulating film, a second under-pad wiring made of a metal film connected to the first under-pad wiring through a contact hole in the first interlayer insulating film, and a pad electrically connected to the second under-pad wiring through a contact hole in the second interlayer insulating film.
請求項1において、前記データ線および前記第2のパッド下配線は、アルミニウムを主成分とするアルミニウム膜から構成され、前記走査線、前記ゲート電極および前記第1のパッド下配線は、タンタル膜から構成されていることを特徴とするアクティブマトリクス基板。2. The active matrix substrate according to claim 1, wherein the data lines and the second under-pad wiring are made of an aluminum film containing aluminum as a main component, and the scanning lines, the gate electrodes and the first under-pad wiring are made of a tantalum film. 請求項1または2において、前記第2の層間絶縁膜は、ペルヒドロポリシラザンまたはこれを含む組成物の塗布膜を焼成した絶縁膜と、該絶縁膜の表面にCVD法により形成された絶縁膜とを備えていることを特徴とするアクティブマトリクス基板。3. The active matrix substrate according to claim 1, wherein the second interlayer insulating film comprises an insulating film obtained by baking a coating film of perhydropolysilazane or a composition containing perhydropolysilazane, and an insulating film formed on a surface of the insulating film by a CVD method. 前記第1の層間絶縁膜と前記第2の層間絶縁膜との層間に前記データ線と同時形成され、前記第1の層間絶縁膜のコンタクトホールを介して前記第1のパッド下配線に接続する金属膜からなる第2のパッド下配線が形成されてなることを特徴とする請求項1記載のアクティブマトリックス基板。2. The active matrix substrate according to claim 1, further comprising: a second under-pad wiring made of a metal film formed between the first interlayer insulating film and the second interlayer insulating film at the same time as the data line, the second under-pad wiring being connected to the first under-pad wiring via a contact hole in the first interlayer insulating film. 前記第2の層間絶縁膜の表面に前記画素電極と同時形成され、前記第2の層間絶縁膜のコンタクトホールを介して前記第2のパッド下配線に電気的に接続するパッドとを備えていることを特徴とする請求項1記載のアクティブマトリックス基板。2. The active matrix substrate according to claim 1, further comprising: a pad formed on the surface of the second interlayer insulating film simultaneously with the pixel electrode, the pad being electrically connected to the second under-pad wiring through a contact hole in the second interlayer insulating film. 請求項1乃至5のいずれかに規定するアクティブマトリクス基板を用いたことを特徴とする表示装置。A display device using an active matrix substrate defined in any one of claims 1 to 5. 請求項1において、前記走査線、前記ゲート電極および前記第1のパッド下配線は、アルミニウムを主成分とするアルミニウム膜から構成されていることを特徴とするアクティブマトリクス基板。2. The active matrix substrate according to claim 1, wherein the scanning lines, the gate electrodes and the first under-pad wiring are made of an aluminum film containing aluminum as a main component. 走査線およびデータ線に接続する画素スイッチング用の薄膜トランジスタと、該薄膜トランジスタに接続してなる画素電極と、前記走査線または前記データ線に信号出力する駆動回路と、該駆動回路に信号供給する複数の信号配線と、該信号配線に電気的に接続する端子とを有し、前記薄膜トランジスタは、ゲート電極にゲート絶縁膜を介して対峙するチャネル領域と、第1の層間絶縁膜のコンタクトホールを介して前記データ線に電気的に接続するソース領域と、前記第1の層間絶縁膜および該第1の層間絶縁膜の表面に形成された第2の層間絶縁膜のコンタクトホールを介して前記画素電極が電気的に接続するドレイン領域とを備えるアクティブマトリクス基板において、
前記第2の層間絶縁膜は、無機ポリマーまたはこれを含む組成物の塗布膜を焼成した絶縁膜を備え、
前記端子は、前記ゲート絶縁膜と前記第1の層間絶縁膜との層間に金属膜からなる第1のパッド下配線と、前記第1の層間絶縁膜のコンタクトホールを介して前記第1のパッド下配線に接続する金属膜からなる第2のパッド下配線と、前記第2の層間絶縁膜のコンタクトホールを介して前記第2のパッド下配線に電気的に接続するパッドとを備えていることを特徴とするアクティブマトリクス基板。
an active matrix substrate comprising: pixel-switching thin film transistors connected to scanning lines and data lines; pixel electrodes connected to the thin film transistors; a drive circuit for outputting signals to the scanning lines or the data lines; a plurality of signal wirings for supplying signals to the drive circuit; and terminals electrically connected to the signal wirings, the thin film transistors comprising a channel region facing a gate electrode via a gate insulating film; a source region electrically connected to the data line via a contact hole in a first interlayer insulating film; and a drain region electrically connected to the pixel electrode via a contact hole in the first interlayer insulating film and a second interlayer insulating film formed on the surface of the first interlayer insulating film;
the second interlayer insulating film comprises an insulating film obtained by baking a coating film of an inorganic polymer or a composition containing the same;
the terminal comprises a first under-pad wiring made of a metal film between the gate insulating film and the first interlayer insulating film, a second under-pad wiring made of a metal film connected to the first under-pad wiring through a contact hole in the first interlayer insulating film, and a pad electrically connected to the second under-pad wiring through a contact hole in the second interlayer insulating film.
JP8466098A 1998-03-30 1998-03-30 Active matrix substrate and liquid crystal display Pending JPH11282012A (en)

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Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6587086B1 (en) 1999-10-26 2003-07-01 Semiconductor Energy Laboratory Co., Ltd. Electro-optical device
US7023021B2 (en) * 2000-02-22 2006-04-04 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method of manufacturing the same
US6789910B2 (en) 2000-04-12 2004-09-14 Semiconductor Energy Laboratory, Co., Ltd. Illumination apparatus
JP3856619B2 (en) * 2000-04-13 2006-12-13 三菱電機株式会社 Semiconductor device, liquid crystal display device, manufacturing method of semiconductor device, and manufacturing method of liquid crystal display device
JP4006012B2 (en) * 2001-09-28 2007-11-14 株式会社日立製作所 Display device and liquid crystal display device
JP3909572B2 (en) * 2001-09-28 2007-04-25 株式会社日立製作所 Display device
KR20030046102A (en) * 2001-12-05 2003-06-12 삼성전자주식회사 a thin film transistor substrate and a method for manufacturing the same
KR100443831B1 (en) * 2001-12-20 2004-08-09 엘지.필립스 엘시디 주식회사 Method Of Fabricating Liquid Crystal Display Device
US7220611B2 (en) * 2003-10-14 2007-05-22 Lg.Philips Lcd Co., Ltd. Liquid crystal display panel and fabricating method thereof
KR100625996B1 (en) 2004-04-02 2006-09-20 삼성에스디아이 주식회사 Electroluminescent display device
KR100603336B1 (en) 2004-04-07 2006-07-20 삼성에스디아이 주식회사 Electroluminescent display device and manufacturing method thereof
JP4207858B2 (en) 2004-07-05 2009-01-14 セイコーエプソン株式会社 Semiconductor device, display device and electronic apparatus
WO2009022517A1 (en) * 2007-08-10 2009-02-19 Sharp Kabushiki Kaisha Wiring board and liquid crystal display device
WO2009022522A1 (en) * 2007-08-10 2009-02-19 Sharp Kabushiki Kaisha Wiring board and liquid crystal display device
JP5226070B2 (en) 2008-06-25 2013-07-03 シャープ株式会社 Wiring substrate and liquid crystal display device
KR20130105392A (en) * 2012-03-14 2013-09-25 가부시키가이샤 한도오따이 에네루기 켄큐쇼 Semiconductor device
CN107422551A (en) * 2017-07-25 2017-12-01 武汉天马微电子有限公司 a display device
US11404525B2 (en) * 2018-03-01 2022-08-02 Sharp Kabushiki Kaisha Display device and method for manufacturing display device
KR102732672B1 (en) * 2019-07-09 2024-11-21 삼성디스플레이 주식회사 Touch unit and display device including the same

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