JPH11354537A - エピタキシャルベ―スをもつたて形バイポ―ラトランジスタの真性コレクタの選択ド―ピングを行う方法 - Google Patents

エピタキシャルベ―スをもつたて形バイポ―ラトランジスタの真性コレクタの選択ド―ピングを行う方法

Info

Publication number
JPH11354537A
JPH11354537A JP11156065A JP15606599A JPH11354537A JP H11354537 A JPH11354537 A JP H11354537A JP 11156065 A JP11156065 A JP 11156065A JP 15606599 A JP15606599 A JP 15606599A JP H11354537 A JPH11354537 A JP H11354537A
Authority
JP
Japan
Prior art keywords
window
collector
base
implantation
intrinsic collector
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11156065A
Other languages
English (en)
Japanese (ja)
Inventor
Michel Marty
ミシェル・マルティ
Alain Chantre
アラン・シャントル
Schwarzmann Schary
シエリ・シュヴァルツマン
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SA
Commissariat a lEnergie Atomique et aux Energies Alternatives CEA
Original Assignee
Commissariat a lEnergie Atomique CEA
STMicroelectronics SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Commissariat a lEnergie Atomique CEA, STMicroelectronics SA filed Critical Commissariat a lEnergie Atomique CEA
Publication of JPH11354537A publication Critical patent/JPH11354537A/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D10/00Bipolar junction transistors [BJT]
    • H10D10/01Manufacture or treatment
    • H10D10/021Manufacture or treatment of heterojunction BJTs [HBT]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D10/00Bipolar junction transistors [BJT]
    • H10D10/80Heterojunction BJTs
    • H10D10/821Vertical heterojunction BJTs
    • H10D10/891Vertical heterojunction BJTs comprising lattice-mismatched active layers, e.g. SiGe strained-layer transistors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/13Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
    • H10D62/137Collector regions of BJTs
    • H10D62/138Pedestal collectors

Landscapes

  • Bipolar Transistors (AREA)
JP11156065A 1998-06-05 1999-06-03 エピタキシャルベ―スをもつたて形バイポ―ラトランジスタの真性コレクタの選択ド―ピングを行う方法 Pending JPH11354537A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR9807060 1998-06-05
FR9807060A FR2779571B1 (fr) 1998-06-05 1998-06-05 Procede de dopage selectif du collecteur intrinseque d'un transistor bipolaire vertical a base epitaxiee

Publications (1)

Publication Number Publication Date
JPH11354537A true JPH11354537A (ja) 1999-12-24

Family

ID=9527038

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11156065A Pending JPH11354537A (ja) 1998-06-05 1999-06-03 エピタキシャルベ―スをもつたて形バイポ―ラトランジスタの真性コレクタの選択ド―ピングを行う方法

Country Status (5)

Country Link
US (1) US6265275B1 (de)
EP (1) EP0962967B1 (de)
JP (1) JPH11354537A (de)
DE (1) DE69935472D1 (de)
FR (1) FR2779571B1 (de)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001267330A (ja) * 2000-01-11 2001-09-28 Mitsubishi Electric Corp バイポーラトランジスタおよびその製造方法
JP2004502300A (ja) * 2000-06-26 2004-01-22 テレフオンアクチーボラゲツト エル エム エリクソン アンチモニ注入による高周波トランジスタ装置及び製造方法
JP2006511084A (ja) * 2002-12-20 2006-03-30 コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ 半導体装置の製造方法
JP2008153684A (ja) * 2001-01-30 2008-07-03 Internatl Business Mach Corp <Ibm> シリコン・ゲルマニウム・バイポーラ・トランジスタの製造方法
US7642569B2 (en) 2004-02-27 2010-01-05 International Business Machines Corporation Transistor structure with minimized parasitics and method of fabricating the same

Families Citing this family (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2779572B1 (fr) * 1998-06-05 2003-10-17 St Microelectronics Sa Transistor bipolaire vertical a faible bruit et procede de fabrication correspondant
DE19957113A1 (de) 1999-11-26 2001-06-07 Infineon Technologies Ag Verfahren zur Herstellung eines aktiven Transistorgebietes
FR2805924A1 (fr) * 2000-03-06 2001-09-07 France Telecom Procede de gravure d'une couche de silicium polycristallin et son application a la realisation d'un emetteur auto- aligne avec la base extrinseque d'un transistor bipolaire simple ou double polysilicium
JP3546169B2 (ja) * 2000-05-26 2004-07-21 三菱重工業株式会社 半導体装置及びその製造方法
US6459104B1 (en) * 2001-05-10 2002-10-01 Newport Fab Method for fabricating lateral PNP heterojunction bipolar transistor and related structure
US20020177253A1 (en) * 2001-05-25 2002-11-28 International Business Machines Corporation Process for making a high voltage NPN Bipolar device with improved AC performance
US20020197807A1 (en) * 2001-06-20 2002-12-26 International Business Machines Corporation Non-self-aligned SiGe heterojunction bipolar transistor
FR2829288A1 (fr) * 2001-09-06 2003-03-07 St Microelectronics Sa Structure de contact sur une region profonde formee dans un substrat semiconducteur
US6936519B2 (en) * 2002-08-19 2005-08-30 Chartered Semiconductor Manufacturing, Ltd. Double polysilicon bipolar transistor and method of manufacture therefor
US6830982B1 (en) * 2002-11-07 2004-12-14 Newport Fab, Llc Method for reducing extrinsic base resistance and improving manufacturability in an NPN transistor
KR100486304B1 (ko) * 2003-02-07 2005-04-29 삼성전자주식회사 자기정렬을 이용한 바이씨모스 제조방법
US7038298B2 (en) * 2003-06-24 2006-05-02 International Business Machines Corporation High fT and fmax bipolar transistor and method of making same
US7144787B2 (en) * 2005-05-09 2006-12-05 International Business Machines Corporation Methods to improve the SiGe heterojunction bipolar device performance
JP2010283329A (ja) * 2009-05-08 2010-12-16 Panasonic Corp バイポーラトランジスタ及びその製造方法
US9209264B2 (en) * 2013-03-12 2015-12-08 Newport Fab, Llc Heterojunction bipolar transistor having a germanium raised extrinsic base
CN104425244B (zh) * 2013-08-20 2017-02-15 上海华虹宏力半导体制造有限公司 锗硅异质结双极型晶体管制造方法
US10429509B2 (en) 2014-12-24 2019-10-01 Stmicroelectronics Pte Ltd. Molded proximity sensor
US10593771B2 (en) 2017-12-11 2020-03-17 International Business Machines Corporation Vertical fin-type bipolar junction transistor with self-aligned base contact
US10797132B2 (en) * 2018-06-29 2020-10-06 Newport Fab, Llc Heterojunction bipolar transistor fabrication using resist mask edge effects
US11404540B2 (en) 2019-10-01 2022-08-02 Analog Devices International Unlimited Company Bipolar junction transistor, and a method of forming a collector for a bipolar junction transistor
US11355585B2 (en) 2019-10-01 2022-06-07 Analog Devices International Unlimited Company Bipolar junction transistor, and a method of forming a charge control structure for a bipolar junction transistor
US11563084B2 (en) 2019-10-01 2023-01-24 Analog Devices International Unlimited Company Bipolar junction transistor, and a method of forming an emitter for a bipolar junction transistor

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5321301A (en) * 1992-04-08 1994-06-14 Nec Corporation Semiconductor device
JP2582519B2 (ja) * 1992-07-13 1997-02-19 インターナショナル・ビジネス・マシーンズ・コーポレイション バイポーラ・トランジスタおよびその製造方法
JPH07169771A (ja) * 1993-12-15 1995-07-04 Nec Corp 半導体装置及びその製造方法
JP2748898B2 (ja) * 1995-08-31 1998-05-13 日本電気株式会社 半導体装置およびその製造方法
KR100205017B1 (ko) * 1995-12-20 1999-07-01 이계철 이종접합 바이폴러 트랜지스터의 제조방법
DE19609933A1 (de) * 1996-03-14 1997-09-18 Daimler Benz Ag Verfahren zur Herstellung eines Heterobipolartransistors

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001267330A (ja) * 2000-01-11 2001-09-28 Mitsubishi Electric Corp バイポーラトランジスタおよびその製造方法
JP2004502300A (ja) * 2000-06-26 2004-01-22 テレフオンアクチーボラゲツト エル エム エリクソン アンチモニ注入による高周波トランジスタ装置及び製造方法
JP2008153684A (ja) * 2001-01-30 2008-07-03 Internatl Business Mach Corp <Ibm> シリコン・ゲルマニウム・バイポーラ・トランジスタの製造方法
JP2006511084A (ja) * 2002-12-20 2006-03-30 コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ 半導体装置の製造方法
US7642569B2 (en) 2004-02-27 2010-01-05 International Business Machines Corporation Transistor structure with minimized parasitics and method of fabricating the same

Also Published As

Publication number Publication date
EP0962967A1 (de) 1999-12-08
FR2779571B1 (fr) 2003-01-24
DE69935472D1 (de) 2007-04-26
FR2779571A1 (fr) 1999-12-10
EP0962967B1 (de) 2007-03-14
US6265275B1 (en) 2001-07-24

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