JPH114166A - Successive approximation A / D converter - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve the resolution and expand the dynamic range of a successive approximation A / D converter without increasing the conversion time and without substantially increasing the circuit scale and power consumption. The purpose is to: SOLUTION: A sample and hold circuit of an input section is replaced with an integrating circuit including a plurality of switches 3 to 10, capacitors 11 to 13 and an operational amplifier 14, and negative feedback is performed using an output of a reference voltage D / A converter 17. By applying feedback to the integration circuit so as to form a loop, quantization noise in the low frequency region is suppressed by the noise shaping effect, and the dynamic range is improved.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a successive approximation A / D converter for sampling and quantizing an input analog signal and outputting a digital value.

[0002]

2. Description of the Related Art A successive approximation type A / D converter is a kind of A / D converter for quantizing an analog signal.
The input analog signal is compared with a reference voltage, the value of the reference voltage is changed until it becomes substantially equal to the input analog signal, and the value at that time is output as a digital value.

First, about 1 / full scale value of the input signal
A comparison with a reference voltage corresponding to 2 is made. as a result,
If the input signal is larger than the reference voltage, the first bit (MSB) of the digital output is set to 1 and the value of the reference voltage is held. If the input signal is smaller than the reference voltage, the first bit (MSB) of the digital output is set to 0, and the value of the reference voltage is returned to zero.

Next, about 1 / full scale value of the input signal
The voltage corresponding to 4 is added to the reference voltage, and the comparison is performed. As a result, if the input signal is larger than the reference voltage, the second bit of the digital output is set to 1 and the value of the reference voltage is held. If the input signal is smaller than the reference voltage,
The second bit of the digital output is set to 0, and the value of the reference voltage is restored.

The above operation is repeated a total of n times in the n-bit A / D converter until the value of the n-th bit is determined, whereby the quantized value of the input analog signal is obtained as an n-bit digital output.

Usually, a D / A converter is used as a reference voltage generation source. At this time, the above operation can be realized by operating each bit of the digital input of the D / A converter,
After the n repetition operations are completed, the value of the digital input of the D / A converter at that time becomes a quantized output as a successive approximation A / D converter.

FIG. 6 shows a configuration of a conventional successive approximation A / D converter. In FIG. 6, reference numeral 23 denotes an input terminal of an analog signal, 24 denotes an output terminal of a quantized digital signal,
5 is a sample and hold (S / H) circuit for the input analog signal, and 26 is a comparator. Reference numeral 27 denotes a control circuit which controls the D / A converter 2 so that the input signal sampled and held by the sample and hold circuit 25 and the reference voltage become substantially equal.
8 is controlled by n bits. 28 is a D for generating a reference voltage.
/ A converter. The sample hold circuit 25 is realized by a circuit including an input terminal 29, an output terminal 30, a switch 31 turned on / off by a clock signal, a capacitor 32, and an operational amplifier 33, for example, as shown in FIG.

The operation of the conventional successive approximation type A / D converter is as follows.
The case where n = 3 will be described in detail as an example. First, the analog signal input from the input terminal 23 is held by the sample-and-hold circuit 25 while the following three steps are executed. FIG. 8 is a timing chart for explaining the operation.

In a first step, the control circuit 27
Outputs 3-bit data "100" to the D / A converter 28 in order to generate a reference voltage corresponding to about 1/2 of the full scale value of the input signal. At this time, the full scale amplitude of the D / A converter 28 is set equal to the full scale value of the input signal of the successive approximation type A / D converter.
Next, the comparator 26 compares the magnitude of the output of the sample / hold circuit 25, which is the sampled and held analog input signal, with the output of the D / A converter, which is the reference voltage. Subsequently, the control circuit 2
7 monitors the output of the comparator 26 and outputs "100" as it is when the analog input signal is higher than the reference voltage, and outputs "000" when the analog input signal is lower than the reference voltage. The output of the control circuit 27 at this point is set to “a00”.

In the second step, the control circuit 27 outputs "a10" to the D / A converter 28 in order to add a reference voltage corresponding to about 1/4 of the full scale value of the input signal. Next, as in the first step, the output of the sample-and-hold circuit 25 is
The comparator 26 compares the magnitude of the output with the output of the D / A converter, which is the reference voltage. Subsequently, the control circuit 27 monitors the output of the comparator 26, and outputs “a10” as it is if the analog input signal is larger than the reference voltage,
If smaller, "a00" is output. The output of the control circuit 27 at this point is set to “ab0”.

In the third step, the control circuit 27 outputs "ab1" to the D / A converter 28 in order to add a reference voltage corresponding to about 1/8 of the full scale value of the input signal. Next, in the same manner as in the first and second steps, the comparator 26 compares the magnitude of the output of the sample-and-hold circuit 25 with the output of the D / A converter that is the reference voltage. Subsequently, the control circuit 27
Monitors the output of the comparator 26 and outputs "ab1" as it is if the analog input signal is higher than the reference voltage, and outputs "ab0" if the analog input signal is lower than the reference voltage. The output of the control circuit 27 at this point is "abc".

By the above operation, the output voltage of the D / A converter 28 approaches the output voltage of the sample-and-hold circuit 25.
The input “abc” of the / A converter 28 is a quantized value (digital output) of the analog signal input to the input terminal 23. At this time, the output signal obtained from the output terminal 24 contains quantization noise and has, for example, a frequency spectrum as shown in FIG.

[0013]

However, in the conventional successive approximation type A / D converter, when the resolution is increased to increase the dynamic range, the number of steps for comparing the input signal with the reference voltage increases. As a result, there is a problem that the conversion time becomes longer and the sampling frequency is lowered.

The present invention solves the above-mentioned conventional problems and provides a reference voltage D / D converter built in a successive approximation type A / D converter.
The output of the A / A converter is negatively fed back to the input of the successive approximation type A / D converter, so that the circuit size, power consumption and conversion time are hardly increased, and the resolution is substantially higher due to the noise shaping effect. It is an object of the present invention to provide a successive approximation type A / D converter that can obtain the following.

[0015]

In order to solve the above-mentioned problems, the present invention adds a capacitor and a switch so that the sample-and-hold circuit operates as an integrating circuit, and connects the output of the D / A converter to the integrating circuit. By forming a negative feedback loop, it is possible to realize a successive approximation type A / D converter with an increased resolution and an increased dynamic range without increasing the circuit scale, current consumption and conversion time. Become.

[0016]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention according to claim 1 of the present invention provides a D / A converter for generating a reference voltage, a sample and hold circuit for sampling and holding an input analog signal,
A comparator for comparing the output of the sample and hold circuit with a reference voltage from the D / A converter, and monitoring the output of the comparator to compare the magnitude relationship between an analog input signal and a reference voltage, A successive approximation type A / D converter having a control circuit for controlling the D / A converter so that a value becomes substantially equal to an input analog signal, wherein the sample and hold circuit is an integrating circuit comprising a plurality of switches and a capacitor. A successive approximation type A / D converter, wherein feedback is applied to the integration circuit so that a negative feedback loop is formed by using a reference voltage output from the D / A converter. A signal is input to an analog signal input terminal, control data of the D / A converter is extracted as a quantized output, and the difference between the input signal and the quantized output one sample before is taken and integrated. By A / D conversion from,
The quantization noise is rejected to the high frequency region by the noise shaping effect, and a successive approximation A / D converter with an improved dynamic range in the low frequency region is obtained.

According to a second aspect of the present invention, there is provided a D / A converter for generating a reference voltage, an input terminal for an analog signal, and a first terminal having one end connected to the analog signal input terminal.
A first input capacitor having one end connected to the first switch; a second switch having one end connected to the other end of the first input capacitor and the other end grounded; Are commonly connected to the first switch and the first input capacitor, the third switch is grounded at the other end, and the third switch is commonly connected at one end to the first input capacitor and the second switch. A fourth switch, a fifth switch having one end connected to the D / A converter output terminal,
A second input capacitor having one end connected to the fifth switch; a sixth switch having one end connected to the other end of the second input capacitor and the other end grounded; , A seventh switch commonly connected to the second input capacitor, an eighth switch having one end commonly connected to the second input capacitor and the sixth switch, and an inverting input terminal connected to the second input capacitor. An operational amplifier commonly connected to the fourth and eighth switches, a non-inverting input terminal grounded, and one end connected to an inverting input terminal of the operational amplifier;
A comparator having the other end connected to the output terminal of the operational amplifier, a signal input terminal connected to the output terminal of the operational amplifier, and a reference input terminal connected to the D / A converter; A control circuit for controlling the D / A converter while monitoring the output and comparing the magnitude relationship between an analog input signal and a reference voltage, wherein the charge of the first input capacitor and the second A successive approximation type A / D converter characterized in that the first to eighth switches are turned on / off so that a charge corresponding to a difference between charges of the second input capacitor is transferred to the integration capacitor. , A signal is input to an analog signal input terminal, control data of the D / A converter is extracted as a quantized output, and a difference between the input signal and the quantized output one sample before is taken and integrated. By A / D conversion from,
The quantization noise is rejected to the high frequency region by the noise shaping effect, and a successive approximation A / D converter with an improved dynamic range in the low frequency region is obtained.

FIG. 1 shows an embodiment of the present invention.
This will be described with reference to FIG. (Embodiment) FIG. 1 shows an embodiment of the present invention.
, 1 is an input terminal for an analog signal, and 2 is an output terminal for a quantized digital signal. Reference numerals 3 to 10 denote switches which are turned on / off by a clock signal.
It is composed of MOS analog switches. 11 to 13 are capacitors, and 14 is an operational amplifier. Numeral 15 denotes a comparator which compares the magnitudes of the signals at the two input terminals and outputs the result as a logical signal having a binary amplitude. Reference numeral 16 denotes a control circuit, and 17 denotes a D / A converter that generates a reference voltage.

The details will be described below. Reference numeral 1 denotes an input terminal of a successive approximation A / D converter to which an analog signal is input, and reference numeral 2 denotes an output terminal of the successive approximation A / D converter to which a quantized digital signal is output. 3 is a first switch having one end connected to the analog signal input terminal 1, 11
Is a first input capacitor whose one end is connected to the first switch 3, 4 is a second switch whose one end is connected to the other end of the first input capacitor 11, and the other end is grounded. A third switch commonly connected to the first switch 3 and the first input capacitor 11 and the other end grounded, and a third switch 6 having one end commonly connected to the first input capacitor 11 and the second switch 4. A switch 4 has a D / A converter 1 at one end.
7, a fifth switch connected to the output terminal of 7, a second input capacitor connected at one end to the fifth switch 7, an end connected to the other end of the second input capacitor 12, A sixth switch 9 is connected at one end to the ground, 9 is a seventh switch having one end commonly connected to the fifth switch 7 and the second input capacitor 12, and 10 is one end connected to the second input capacitor 12 and the sixth input capacitor 12. An eighth switch commonly connected to the switch 8, an operational amplifier 14 having an inverting input terminal commonly connected to the fourth and eighth switches 6, 10 and a non-inverting input terminal grounded, and 13 having an operational amplifier at one end. An integrating capacitor connected to the inverting input terminal of the operational amplifier 14 and the other end connected to the output terminal of the operational amplifier 14 has a signal input terminal connected to the output terminal of the operational amplifier 14 and a reference input terminal connected to the D / A converter 17 Connected comparator 16 monitors the output of the comparator 15 the analog input signal by comparing the magnitude relation between the reference voltage D / A converter 1
7 is a control circuit for controlling the D / A 17 which is connected between the output terminal of the control circuit, the reference input terminal of the comparator 15 and the fifth switch 7 to generate a reference voltage.
It is a converter.

Successive approximation type A / D constructed as described above
The operation of the converter will be described with reference to FIGS.
The clocks φ1 and φ2 in FIG.
This is a clock signal for turning on and off 0. The switch is turned on when the signal amplitude is High level, and turned off when the signal amplitude is Low level. Dout is n-bit control data output from the control circuit 16 to the D / A converter 17.

When the switches 3 and 4 are turned on at time t1, the input capacitor 11 applies the voltage Vi (t
It is charged by 1). At this time, the charge Q1 (t1) stored in the input capacitor 11 can be expressed by the following equation. Q1 (t1) = C1 · Vi (t1) (1) Subsequently, when the switches 5 and 6 are turned on at time t1 ′, the input capacitor 11 is connected between the virtual ground point of the operational amplifier 14 and the ground. It is connected and discharges the stored charge. Since the impedance of the inverting input terminal of the operational amplifier 14 is very high, all the electric charge discharged from the capacitor 11 is transferred to the integrating capacitor 13.

On the other hand, when the switches 8 and 9 are turned on at time t1, both ends of the input capacitor 12 are grounded and the stored charge is discharged. Subsequently, when the switches 7 and 10 are turned on at time t1 ', the input capacitor 1
2 is charged by the output voltage Vd (t1) of the D / A converter 17. Since the input capacitor 12 is connected between the virtual ground point of the operational amplifier 14 and the output of the D / A converter 17, the charge Q2 (t1 ') stored in the input capacitor 12 at this time can be expressed by the following equation. Q2 (t1 ′) = − C2 · Vd (t1) (2)

At the same time, a charge having a value equal to the charge stored in the capacitor 12 is transferred to the integration capacitor 13. At this time, the integration capacitor 1 at time t1 '
The charge Q3 (t1 ′) of No. 2 can be expressed by the following equation, where Q3 (t1) is the charge of the integration capacitor 13 at time t1. Q3 (t1 ′) = Q1 (t1) −Q2 (t1 ′) + Q3 (t1) (3) The electric charge Q3 (t1 ′) stored in the integrating capacitor 12 at the time t1 ′ is the output of the operational amplifier 14. If the voltage of the terminal is Vo (t1 '), it can be expressed by the following equation. Q3 (t1 ′) = C3 · Vo (t1 ′) (4)

Therefore, the output voltage of the operational amplifier 14 at the time t1 'can be expressed by the following equation. Vo (t1 ′) = (C1 / C3) · Vi (t1) − (C2 / C3) · Vd (t1) + Vo (t0) (5) This means that the voltage Vi (t1) of the input terminal 1 is (C1 / C
3) The output voltage Vd (t1) of the D / A converter 17 is multiplied
Indicates that the calculation is multiplied by-(C2 / C3), and integration is performed after these are added.

The output of the operational amplifier 14 is input to a comparator 15 and is quantized by the same operation as the conventional successive approximation A / D converter described with reference to FIG.
Therefore, the device shown in FIG. 1 operates as an A / D converter that takes the difference between the analog input signal and the quantized output one sample before, integrates the difference, and then quantizes.

FIG. 3 shows a model of the A / D converter shown in FIG. In FIG. 3, reference numeral 18 denotes an input terminal of an analog signal, 19 denotes an output terminal of a quantized digital signal, 20 denotes an integration circuit represented by a transfer function, 21
Is a quantizer represented as a model to which the quantization noise N is added, and 22 is a delay circuit of one sample period represented by a transfer function. The operation is represented by the following equation. Y = X + (1−z ⁻¹ ) N (6) In the output signal Y, the input signal X appears as it is, but the quantization noise N generated by the quantizer is (1). −
z ^-1 ). (1
−z ⁻¹ ) is a transfer function corresponding to the calculation of the difference between the input signal and the input signal one sample cycle earlier, and has a high-pass type frequency characteristic as shown in FIG. For this reason, the quantization noise generated by the quantizer exhibits noise shaping characteristics in which components in the low frequency region are suppressed.

By the above operation, an output signal having a frequency spectrum as shown in FIG. 5 is obtained at the output terminal 2 of the quantized digital signal, and the quantization noise is driven to the high frequency region by the noise shaping effect. hand,
It operates as a successive approximation A / D converter with an improved dynamic range in the low frequency range.

As described above, according to the above-described embodiment, in the successive approximation type A / D converter, the integration circuit is provided at the input portion, and the negative feedback loop is utilized by using the output of the reference voltage D / A converter. By applying feedback to the integration circuit so as to form an analog-to-digital converter, a successive approximation A / D converter having a wide dynamic range in a low frequency region having noise shaping characteristics can be realized.

[0029]

As described above, according to the present invention, a capacitor and a switch are added so that the sample and hold circuit operates as an integrating circuit, and the output of the D / A converter is connected to the integrating circuit to form a negative feedback loop. By forming, the circuit scale and
It is possible to realize a successive approximation type A / D converter in which the resolution is increased and the dynamic range is widened without substantially increasing the current consumption and the conversion time.

[Brief description of the drawings]

FIG. 1 shows a successive approximation type A / D according to an embodiment of the present invention.
Converter block diagram

FIG. 2 shows a successive approximation type A / D according to an embodiment of the present invention.
Converter Control Clock Timing Diagram

FIG. 3 shows a successive approximation type A / D according to an embodiment of the present invention.
Block diagram modeling and representing the converter

FIG. 4 is a successive approximation type A / D according to the embodiment of the present invention.
Transformer quantization noise frequency characteristic diagram

FIG. 5 is a successive approximation type A / D according to the embodiment of the present invention.
Frequency spectrum characteristic diagram of converter output signal

FIG. 6 is a block diagram of a conventional successive approximation type A / D converter.

FIG. 7 is a circuit diagram of a sample-and-hold circuit used in a conventional successive approximation A / D converter.

FIG. 8 is a timing chart of a control clock of a conventional successive approximation type A / D converter.

FIG. 9 is a frequency spectrum characteristic diagram of an output signal of a conventional successive approximation A / D converter.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Analog signal input terminal 2 Digital signal output terminal 3 1st switch 4 2nd switch 5 3rd switch 6 4th switch 7 5th switch 8 6th switch 9 7th switch 10 8th Switch 11 first capacitor 12 second capacitor 13 integration capacitor 14 operational amplifier 15 comparator 16 control circuit 17 D / A converter

Claims (2)

[Claims] A D / A converter for generating a reference voltage; a sample and hold circuit for sampling and holding an input analog signal; an output of the sample and hold circuit;
A comparator for comparing with a reference voltage from the A converter;
A control circuit for monitoring the output of the comparator, comparing the magnitude relationship between an analog input signal and a reference voltage, and controlling the D / A converter so that the value of the reference voltage is substantially equal to the input analog signal. In the successive approximation type A / D converter provided, the sample-and-hold circuit is an integration circuit including a plurality of switches and a capacitor, and a negative feedback loop is formed using a reference voltage output from the D / A converter. A successive approximation type A / D converter, wherein feedback is applied to the integration circuit as described above. 2. A D / A converter for generating a reference voltage, an input terminal for an analog signal, a first switch having one end connected to the analog signal input terminal, and one end connected to the first switch. The first input capacitor, one end connected to the other end of the first input capacitor, the other end grounded, the other end connected to the first switch and the first input capacitor A third switch commonly connected to the other end, a fourth switch commonly connected to the first input capacitor and the second switch at one end, and a D / A converter at one end. A fifth switch connected to the output terminal, a second input capacitor having one end connected to the fifth switch, and one end connected to the other end of the second input capacitor, and the other end grounded. The sixth switch and one end A seventh switch commonly connected to the fifth switch and the second input capacitor, an eighth switch one end of which is commonly connected to the second input capacitor and the sixth switch, and an inverting input terminal Are commonly connected to the fourth and eighth switches, and an operational amplifier having a non-inverting input terminal grounded, one end connected to the inverting input terminal of the operational amplifier, and the other end connected to the output terminal of the operational amplifier. And a comparator having a signal input terminal connected to the output terminal of the operational amplifier, a reference input terminal connected to the D / A converter, and monitoring the output of the comparator to obtain an analog input signal and a reference voltage. And a control circuit for controlling the D / A converter while comparing the magnitude relationship between the first input capacitor and the second input key. Successive approximation A / D converter, characterized in that charges corresponding to the difference of the charges Pashita causes the eighth switches on and off from the first to be transferred to the integrating capacitor.