JPH11512231A - 閉鎖された環境において、単一機器を用いて集積回路のプロービング、検証、バーンイン、修理、プログラミングを行う為の方法および装置 - Google Patents
閉鎖された環境において、単一機器を用いて集積回路のプロービング、検証、バーンイン、修理、プログラミングを行う為の方法および装置Info
- Publication number
- JPH11512231A JPH11512231A JP9501330A JP50133097A JPH11512231A JP H11512231 A JPH11512231 A JP H11512231A JP 9501330 A JP9501330 A JP 9501330A JP 50133097 A JP50133097 A JP 50133097A JP H11512231 A JPH11512231 A JP H11512231A
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- probing
- base
- substrate
- chamber
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
Links
Classifications
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
- G01R31/2855—Environmental, reliability or burn-in testing
- G01R31/286—External aspects, e.g. related to chambers, contacting devices or handlers
- G01R31/2865—Holding devices, e.g. chucks; Handlers or transport devices
- G01R31/2867—Handlers or transport devices, e.g. loaders, carriers, trays
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
- G01R1/02—General constructional details
- G01R1/06—Measuring leads; Measuring probes
- G01R1/067—Measuring probes
- G01R1/073—Multiple probes
- G01R1/07307—Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
- G01R31/2855—Environmental, reliability or burn-in testing
- G01R31/286—External aspects, e.g. related to chambers, contacting devices or handlers
- G01R31/2868—Complete testing stations; systems; procedures; software aspects
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
- G01R31/2855—Environmental, reliability or burn-in testing
- G01R31/2872—Environmental, reliability or burn-in testing related to electrical or environmental aspects, e.g. temperature, humidity, vibration, nuclear radiation
- G01R31/2874—Environmental, reliability or burn-in testing related to electrical or environmental aspects, e.g. temperature, humidity, vibration, nuclear radiation related to temperature
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
- G01R31/2886—Features relating to contacting the IC under test, e.g. probe heads; chucks
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
- G01R31/318505—Test of Modular systems, e.g. Wafers, MCM's
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- G—PHYSICS
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- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
- G01R31/318505—Test of Modular systems, e.g. Wafers, MCM's
- G01R31/318511—Wafer Test
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- G—PHYSICS
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- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/319—Tester hardware, i.e. output processing circuits
- G01R31/31903—Tester hardware, i.e. output processing circuits tester configuration
- G01R31/31905—Interface with the device under test [DUT], e.g. arrangements between the test head and the DUT, mechanical aspects, fixture
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- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/319—Tester hardware, i.e. output processing circuits
- G01R31/31903—Tester hardware, i.e. output processing circuits tester configuration
- G01R31/31912—Tester/user interface
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- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/70—Microphotolithographic exposure; Apparatus therefor
- G03F7/70425—Imaging strategies, e.g. for increasing throughput or resolution, printing product fields larger than the image field or compensating lithography- or non-lithography errors, e.g. proximity correction, mix-and-match, stitching or double patterning
- G03F7/70466—Multiple exposures, e.g. combination of fine and coarse exposures, double patterning or multiple exposures for printing a single feature
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- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/70—Microphotolithographic exposure; Apparatus therefor
- G03F7/70483—Information management; Active and passive control; Testing; Wafer monitoring, e.g. pattern monitoring
- G03F7/70605—Workpiece metrology
- G03F7/70653—Metrology techniques
- G03F7/70658—Electrical testing
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/006—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation at wafer scale level, i.e. wafer scale integration [WSI]
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
- H10P72/04—Apparatus for manufacture or treatment
- H10P72/0444—Apparatus for wiring semiconductor or solid-state device
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
- H10P72/30—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for conveying, e.g. between different workstations
- H10P72/32—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for conveying, e.g. between different workstations between different workstations
- H10P72/3202—Mechanical details, e.g. rollers or belts
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
- H10P72/30—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for conveying, e.g. between different workstations
- H10P72/32—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for conveying, e.g. between different workstations between different workstations
- H10P72/3212—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for conveying, e.g. between different workstations between different workstations the substrates to be conveyed not being semiconductor wafers or large planar substrates, e.g. chips or lead frames
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P74/00—Testing or measuring during manufacture or treatment of wafers, substrates or devices
- H10P74/23—Testing or measuring during manufacture or treatment of wafers, substrates or devices characterised by multiple measurements, corrections, marking or sorting processes
- H10P74/232—Testing or measuring during manufacture or treatment of wafers, substrates or devices characterised by multiple measurements, corrections, marking or sorting processes comprising connection or disconnection of parts of a device in response to a measurement
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
- H10P90/19—Preparing inhomogeneous wafers
- H10P90/1904—Preparing vertically inhomogeneous wafers
- H10P90/1906—Preparing SOI wafers
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
- H10W10/01—Manufacture or treatment
- H10W10/011—Manufacture or treatment of isolation regions comprising dielectric materials
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
- H10W10/01—Manufacture or treatment
- H10W10/021—Manufacture or treatment of air gaps
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
- H10W10/01—Manufacture or treatment
- H10W10/061—Manufacture or treatment using SOI processes together with lateral isolation, e.g. combinations of SOI and shallow trench isolations
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
- H10W10/10—Isolation regions comprising dielectric materials
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
- H10W10/10—Isolation regions comprising dielectric materials
- H10W10/181—Semiconductor-on-insulator [SOI] isolation regions, e.g. buried oxide regions of SOI wafers
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
- H10W10/20—Air gaps
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
- H10W70/611—Insulating or insulated package substrates; Interposers; Redistribution layers for connecting multiple chips together
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
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- H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
- H10W70/65—Shapes or dispositions of interconnections
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
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- H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
- H10W70/68—Shapes or dispositions thereof
- H10W70/685—Shapes or dispositions thereof comprising multiple insulating layers
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
- H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
- H10W70/688—Flexible insulating substrates
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
- G01R1/02—General constructional details
- G01R1/06—Measuring leads; Measuring probes
- G01R1/067—Measuring probes
- G01R1/073—Multiple probes
- G01R1/07307—Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card
- G01R1/07314—Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card the body of the probe being perpendicular to test object, e.g. bed of nails or probe with bump contacts on a rigid support
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2801—Testing of printed circuits, backplanes, motherboards, hybrid circuits or carriers for multichip packages [MCP]
- G01R31/2806—Apparatus therefor, e.g. test stations, drivers, analysers, conveyors
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/282—Testing of electronic circuits specially adapted for particular applications not provided for elsewhere
- G01R31/2831—Testing of materials or semi-finished products, e.g. semiconductor wafers or substrates
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1345—Conductors connecting electrodes to cell terminals
- G02F1/13452—Conductors connecting driver circuitry and terminals of panels
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
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- H10W70/63—Vias, e.g. via plugs
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/0711—Apparatus therefor
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
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- H10W72/07173—Means for moving chips, wafers or other parts, e.g. conveyor belts
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/072—Connecting or disconnecting of bump connectors
- H10W72/07231—Techniques
- H10W72/07236—Soldering or alloying
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- Environmental & Geological Engineering (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Human Computer Interaction (AREA)
- Health & Medical Sciences (AREA)
- Toxicology (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
- Testing Of Individual Semiconductor Devices (AREA)
- Semiconductor Integrated Circuits (AREA)
- Wire Bonding (AREA)
Abstract
Description
Claims (1)
- 【特許請求の範囲】 1. 少なくとも1つの回路(64)をプロービングするシステムであって、 前記システム内に少なくとも第1のガスを供給するガスソース(51)と、 少なくとも導電性接続部分(66)と酸化物を有する前記回路の或る範囲の温 度を調整するための第1の温度制御装置(48)と、 ここで、前記酸化物は前記導電性接続部分(66)上に生成されるも のであり、 前記第1のガスが前記システム内に存在し、前記範囲が加熱されたと き、前記酸化物の厚みが削減されるようになる、 前記回路(64)の前記導電性接続部分(66)をプロービングする第1のプ ロービング装置とを備えることを特徴とするシステム。 2. 前記回路(64)は第1の基盤(15、40)上にある集積回路(64 a,b,c,d,e,f,g,h,I,j,k,l)であることを特徴とする請求の範囲第1項に記載の システム。 3. 前記第1のプロービング装置(42)は、前記回路(64)の導電性接 続部分(66)のすべてに接続する全基盤のプロービング装置(42)であるこ とを特徴とする請求の範囲第1項または第2項に記載のシステム。 4. 前記第1のプロービング装置は、 (a)複数の回路(64)へのアクセスの制御が可能な回路(50)と、 (b)前記回路(64)の前記導電性接続部分(66)にプロービングするため のプローブポイント(44)を含む ことを特徴とする前記請求項のいずれか1つに記載のシステム。 5. 複数の内部モジュール(14a,b,c,d,e)を含む、 ここで、少なくとも1つの第1のモジュール(14a)は、前記第 1のプロービング装置(42)と、前記第1の温度制御装置(42)を含む第1 の固定器(16a)を含み、 前記第1の固定器(16a)は、前記第1の基盤(40)を保持し、 当該基盤(40)を前記プロビーング装置(42)に対して位置合わせするもの である ことを特徴とする前記請求項のいずれか1つの記載のシステム。 6、 更に、コンピュータ(30)を含み、前記コンピュータ(30)と前記 回路(50)は、複数の回路(64)へのアクセスの制御が可能であり、(a) 前記回路(64)の導電性接続部(66)に検証用信号を供給するため、及び、 (b)前記回路(64)からの全ての出力信号の正当性を判断するために接続さ れることを特徴とする請求の範囲第4項又は第5項に記載のシステム。 7, 更に、第1のプロビーング装置(42)の前記回路(50)とのインタ フェースとなる第1の電子回路ボード(18a)を備えることを特徴とする請求 の範囲第4項又は第5項に記載のシステム。 8. 前記コンピュータ(30)は、前記第1の電子回路(18a)、そして 任意に前記第1の固定器(16a)、及び/または前記第1の温度制御装置(4 8)と信号を送受信をする請求の範囲第7項に記載のシステム。 9. 前記第1のプロービング装置(42)の前記プローブポイント(44) は、機能回路の検証又は電気的バーンインのため、前記回路(64)の前記導電 性接続部分(66)と接続され、 前記機能回路検証においては、前記コンピュータ(30)は第1の電気信号を 前記第1の電子回路ボード(18a)へ送信して、前記第1の電子回路ボード( 18a)が前記第1のプロビーング装置の前記回路50に第2の電気信号を送信 させることで、第3の電気信号が前記第1のプロビーング装置(42)の前記プ ローブポイント(44)を介して前記回路(64)の導電性接続部(66)に供 給 され、この第3の電気信号に応じて生成された第4の電気信号が前記コンピュー タ(30)に送信され、 前記電気バーンインにおいては、前記回路(64)の各々が、所定の期間、所 定の温度範囲及びバーンインデータ生成するための所定電気的状態を越えた状態 で検証されることを特徴とする請求の範囲第8項に記載のシステム。 10. 前記コンピュータは前記第4の電気信号或いは前記バーンインデータに 対応するデータを分析し、回路の修理或いは回路プログラミング用信号を生成す るものであり、前記第1のプロビーング装置(42)は、当該第1のプロビーン グ装置(42)の前記プローブポイント(44)を介して、前記回路(64)に 対し前記回路修理用信号を用いて回路修理を行なうか、或いは、プログラミング することを特徴とする請求の範囲第9項に記載のシステム。 11. コンピュータは、製造完了後すぐに作業工程を制御するため、前記回路 (64)に対応するパフォーマンスデータからデータベースを作成することを特 徴とする請求の範囲第6項乃至第10項のいずれか1つの記載されたシステム。 12. 複数の回路(64)へのアクセス制御できる前記回路(50)は、アク ティブスイッチング回路(50)であることを特徴とする請求の範囲第4項乃至 第11項のいずれか1つに記載のシステム。 13. 複数の回路(64)へのアクセス制御できる前記回路(50)は、前記 回路(64)の(a)前記導電性接続部(64)に複数のテスト信号を供給し、 (b)前記回路(64)からの全ての出力信号を正当性を判断する回路であるこ とを特徴とする請求の範囲第4項乃至第11項のいずれか1つに記載のシステム 。 14. 更に、前記内部モジュール(14b,c,d,e)の1つである第2の モジュールと、 第2の基盤(40)上の複数の集積回路(64)の導電性接続部分(66)の すべてと接続する全基盤プロービング装置(42)である第2のプロービング装 置(42)と、 ここで、前記第2のプロビーング装置(42)は、(a)前記第2の 基盤(40)の各集積回路(64)のアクセス制御が可能な回路(50)と、( b)前記第2の基盤(40)の前記集積回路(64)の導電性接続部(66)に プロビーングするプロビーングポイント(44)を有する、 第2の温度制御装置(48)を含む第2の固定器(16b)と、 ここで、前記第2の固定器(16b)は、前記第2の基盤(40)を 保持し、前記第2のプロビーング装置(42)に前記第2の基盤の位置合わせす る、 を備えることを特徴とする請求の範囲第5項乃至第13項のいずれか1つに記 載のシステム。 15. 更に、前記第1、第2の基盤(40)を移動させ、前記第1、第2のプ ロビーング装置(42)を移動させるハンドラを備えることを特徴とする請求の 範囲第14項に記載のシステム。 16. 前記内部モジュールの少なくとも1つである第2のモジュール(14b )は、前記第2のプロビーング装置(42)の前記回路(64)とインタフェー スする第2の電子回路ボード(18b,c,d,e)を備えることを特徴とする 請求の範囲第14項又は第15項に記載のシステム。 17. 前記コンピュータ(30)は、更に、前記ハンドラ(12)、前記第2 の電子回路ボード(18b、18c)、前記第2の固定器、及び前記第2の温度 制御装置と信号の送受信することを特徴とする請求の範囲第16項に記載のシス テム。 18. 前記ガスソース(20、51)は、非酸化ガスである第2のガスを供給 し、前記第1のガスは水素であることを特徴とする請求の範囲における前記請求 項のいずれか1つに記載のシステム。 19. 前記システムは気密システムであることを特徴とする請求の範囲におけ る前記請求項のいずれか1つに記載のシステム。 20. チャンバ(10)内の回路(64)の少なくとも導電性接続部(66) をプロビーングする方法であって、 非酸化で厚みを削減するガスをチャンバ(10)の中に供給し、 前記導電性接続部分と酸化物を有する前記回路(64)の或る範囲の温度を調 整し、 前記酸化物の厚みを削減し、 前記気密チャンバ(10)内の前記回路(64)の前記導電性接続部分(64 )をプロービングする ことを特徴とする方法。 21. 前記非酸化で厚みを削減するガスは水素であり、前記回路(64)は集積 回路である請求の範囲第20項に記載の方法。 22. 更に、前記回路(64)の修理し、 前記チャンバ(10)内の前記回路(64)の検証する ことを特徴とする請求の範囲第20項及び第21項に記載の方法。 23. 更に、前記チャンバ(10)内の前記回路(64)の検証し、 前記回路(64)内の少なくとも一つの回路のヒューズ状態を変化させることに より、前記チャンバ(10)内の前記回路(64)をプログラミングする ことを特徴とする請求の範囲第20項乃至第22項のいずれか1つに記載の方 法。 24. 集積回路をプロビーングするシステムであって、 固定器(16a)と、基盤のプロービング装置(42)を有する少なくとも一つ のモジュール備える、 ここで、前記固定器(16a)は集積回路(42)を有する基盤( 40)を保持し、 前記集積回路(64)のそれぞれは複数の導電性接続部(66)を 有し、その複数の導電性接続部は前記プロビーング装置(42)のプローブポイ ント(449と接続される ことを特徴とするシステム。 25. 更に、チャンバ(10)を有し、当該チャンバは前記基盤(40)の温 度を修正するための温度制御装置を有する少なくとも1つのモジュール(14a ,b,c,d,e)を有し、前記基盤プロビーングデバイスは全基盤プロービン グ装置(42)である ことを特徴とする請求の範囲第24項に記載のシステム。 26. 前記少なくとも1つのモジュールは、当該モジュール(14a,b,c ,d,e)の中に少なくとも非酸化ガスを供給するためのガスソース(20、5 1)をさらに備えることを特徴とする請求の範囲第24項又は第25項に記載の システム。 27. 前記少なくとも1つのモジュール(14a,b,c,d,e)は更に、 前記基盤を移動させるハンドラ(12)を備えることを特徴とする請求の範囲第 24項乃至第26項のいずれか1つに記載のシステム。 28. 前記基盤(40)の前記複数の導電性接続部分(66)上の酸化物の厚みを 削減するために、前記温度制御装置(48)は前記基盤(40)の温度を調整し、前 記ガスソース(20、51)は前記酸化物の上に水素を供給することを特徴とする 請求の範囲第26項または第27項に記載のシステム。 29. 前記モジュール(14a,b,c,d,e)はコンピュータ(30)と接 続される電子回路ボード(18a)を備え、前記基盤プロービング装置(42)は前 記電子回路ボード(18a)と接続される回路(50)を備え、前記回路(50)は 前記基盤(40)上の前記集積回路(64)のそれぞれとアクセス制御可能となって いることを特徴とする請求の範囲第24項乃至第28項のいずれか1つに記載の システム。 30. 前記基盤(40)の前記集積回路(64)は、前記チャンバ(10)内で機能 検証、バーンイン、コンフィギュレーションされることを特徴とする請求の範囲 第24項乃至第29項のいずれか1つに記載のシステム。 31. 前記モジュール(14a,b,c,d,e)は気密となっていることを 特徴とする請求の範囲第24項乃至第30項のいずれか1つに記載のシステム。 32. 更に、前記ハンドラ(12)、前記温度制御装置(48)、前記固定器(1 8)、前記プロービング装置(42)を制御し、交信するために前記チャンバ(10) と接続されるコンピュータ(30)を備え、前記コンピュータ(30)は、プロセ ッサ(1020)とデータ蓄積装置(1008)を有し、 少なくとも下記の機能の一つが前記チャンバ内に前記基盤がある間に実行され る、 (a)前記基盤(40)の前記複数の導電性接続部分(66)上の酸化物の厚みの削 減 (b)前記基盤(40)の前記集積回路(64)の機能検証 (c)前記基盤(40)のバーンイン (d)前記基盤(40)の前記集積回路(64)の修理 (e)前記基盤(40)の前記集積回路(64)のプログラミング (f)前記基盤(40)上へのシンボルのマーキング、そして、 (g)データベースが製造工程制御のためのフィードバックのための前記集積回 路(64)の実行データに対応するデータの収集 ことを特徴とする請求の範囲第27項乃至第31項のいずれか1つに記載のシ ステム。 33. 前記基盤(40)は完全な半導体ウエーハ(40)であり、前記複数の導電 性接続部分(66)は前記基盤(40)上の導電性接続部分(66)の全てを網羅して 、前記プロービング装置(42)の前記プローブポイント(44)は前記導電性接続 部分(66)の全てと同時に接続することを特徴とする請求の範囲第24項乃至第 32項のいずれか1つに記載のシステム。 34. 前記ハンドラ(12)、前記温度制御装置(48)、前記固定器(16)、前 記プロービング装置(42)を制御し、交信するために前記チャンバ(10)と接続 される前記コンピュータ(30)を更に含み、前記コンピュータ(30)がプロセ ッサ(1002)とデータ蓄積装置(1008)を有し、 少なくとも、前記チャンバ(10)内に前記基盤(40)が存在する間に以下の機 能の少なくとも一つを実行する、 (a)前記基盤(40)の前記多数の導電性接続部分(66)上の酸化物の厚みの削 減 (b)前記基盤(40)の実質上全ての前記集積回路(64)の同時機能検証 (C)前記基盤(40)の実質上全ての前記集積回路(64)の同時バーンイン (d)前記基盤(40)の実質上全ての前記集積回路(64)の同時修理 (e)前記基盤(40)の実質上全ての前記集積回路(64)の同時プログラミング (f)前記基盤(40)上へのシンボルのマーキングと、 (g)データベースが製造工程制御のためのフィードバックのための前記集積回 路(64)の実行データに対応するデータの収集 ことを特徴とする請求の範囲第33項に記載のシステム。 35. 第2の固定器(16b)、第2の温度制御装置(48)、第2の全基盤プロ ービング装置(42)を有する少なくとも1つの第2のモジュール(14b,c, d,e)をさらに含む、 ここで、前記固定器(16b)は集積回路を有する前記基盤(40)を固定し、前記 第2の温度制御装置(48)は前記第2の基盤(40)の温度を調整し、前記第2の プロービング装置(42)は前記第2の基盤(40)の前記集積回路をプロービング し、前記モジュール(14a)と前記少なくとも第2のモジュール(14b,c ,d,e)は同一機能を同時に実行する ことを特徴とする請求の範囲第24項乃至第34項のいずれか1つに記載のシ ステム。
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US08/474,489 | 1995-06-07 | ||
| US08/474,489 US6288561B1 (en) | 1988-05-16 | 1995-06-07 | Method and apparatus for probing, testing, burn-in, repairing and programming of integrated circuits in a closed environment using a single apparatus |
| PCT/US1996/008856 WO1996041204A1 (en) | 1995-06-07 | 1996-05-31 | Method and apparatus for probing, testing, burn-in, repairing and programming of integrated circuits in a closed environment using a single apparatus |
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| JPH11512231A true JPH11512231A (ja) | 1999-10-19 |
| JPH11512231A5 JPH11512231A5 (ja) | 2004-08-05 |
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| JP9501330A Ceased JPH11512231A (ja) | 1995-06-07 | 1996-05-31 | 閉鎖された環境において、単一機器を用いて集積回路のプロービング、検証、バーンイン、修理、プログラミングを行う為の方法および装置 |
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| US (5) | US6288561B1 (ja) |
| EP (1) | EP0832438A4 (ja) |
| JP (1) | JPH11512231A (ja) |
| KR (1) | KR100424693B1 (ja) |
| CN (1) | CN1116613C (ja) |
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-
1995
- 1995-06-07 US US08/474,489 patent/US6288561B1/en not_active Expired - Lifetime
-
1996
- 1996-05-31 JP JP9501330A patent/JPH11512231A/ja not_active Ceased
- 1996-05-31 EP EP96919083A patent/EP0832438A4/en not_active Ceased
- 1996-05-31 KR KR1019970708733A patent/KR100424693B1/ko not_active Expired - Fee Related
- 1996-05-31 CN CN96195460A patent/CN1116613C/zh not_active Expired - Fee Related
- 1996-05-31 WO PCT/US1996/008856 patent/WO1996041204A1/en not_active Ceased
- 1996-06-06 TW TW085106781A patent/TW297145B/zh active
-
1997
- 1997-02-10 US US08/796,474 patent/US5749698A/en not_active Expired - Fee Related
-
2001
- 2001-09-06 US US09/946,552 patent/US6838896B2/en not_active Expired - Fee Related
-
2003
- 2003-01-31 US US10/355,558 patent/US20030151421A1/en not_active Abandoned
-
2004
- 2004-06-09 US US10/865,579 patent/US6891387B2/en not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2012104852A (ja) * | 2003-08-28 | 2012-05-31 | Cascade Microtech Dresden Gmbh | 負荷の下で基板を検査する装置 |
Also Published As
| Publication number | Publication date |
|---|---|
| WO1996041204A1 (en) | 1996-12-19 |
| EP0832438A4 (en) | 1998-09-09 |
| US20040222809A1 (en) | 2004-11-11 |
| US5749698A (en) | 1998-05-12 |
| CN1116613C (zh) | 2003-07-30 |
| KR100424693B1 (ko) | 2004-07-27 |
| US6288561B1 (en) | 2001-09-11 |
| KR19990022254A (ko) | 1999-03-25 |
| US6891387B2 (en) | 2005-05-10 |
| US6838896B2 (en) | 2005-01-04 |
| CN1191019A (zh) | 1998-08-19 |
| TW297145B (ja) | 1997-02-01 |
| US20030151421A1 (en) | 2003-08-14 |
| EP0832438A1 (en) | 1998-04-01 |
| US20020005729A1 (en) | 2002-01-17 |
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