JPH1185122A - Display control circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To enable high speed receiving of an instruction. SOLUTION: A stack register group 3 storing plural instructions and a buffering controller 2 controlling a busy signal for the outside are provided, the buffering controller 2 generates a busy signal after finish of receiving plural instructions, and the busy signal is released after finish of a whole processing corresponding to plural instructions stored in the stack register group 3.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a display control circuit which takes in instructions output from a microcomputer or the like and controls display contents of a display.

[0002]

2. Description of the Related Art FIG. 2 is a diagram showing a configuration of a conventional display circuit. D is a microcomputer (CPU), E is a display control circuit, and F is a liquid crystal display (LCD). The display control circuit E controls the instructions output from the microcomputer D (for example, a set of “display of a specific character” and other instruction codes and address information of the font memory, or “display on / off”, “display clear”, Only the instruction codes such as “cursor home” and “cursor shift” are fetched by the input buffer 21, temporarily stored in the register group 22 for one instruction, decoded by the instruction decoder 23, and sent to the internal processing controller 24. Send to process instruction content. For example, if the content of the instruction is to display a specific character, the font memory 2
5, a predetermined font is read out and output from the display driver 26 to the liquid crystal display F. The internal processing controller 2 responds to such one instruction.
4 cannot process any new instruction during the period during which processing is performed by the internal processing controller 24, the internal processing controller 24 is busy with the microcomputer D (BU).
SY) signal to control the timing of receiving the next instruction.

[0003]

That is, conventionally,
In order to take in instructions from the microcomputer D, it was necessary to monitor or wait for each instruction. In particular, this sequence includes a relatively long font memory read cycle, which is relatively long. For this reason, there is a problem that the microcomputer D takes a long time for display control, and the time for performing other processing is restricted.

The present invention has been made in view of the above points, and an object of the present invention is to make it possible to receive a plurality of instructions continuously and to receive them at high speed.
An object of the present invention is to provide a display control circuit that solves the above-mentioned problem.

[0005]

According to the present invention, there is provided a display control circuit for controlling a display content of a display by taking in an instruction relating to a display from the outside, the first means for storing a plurality of instructions. And a second means for controlling a busy signal or a ready signal for a side sending the instruction,
The second means generates the busy signal or cancels the ready signal upon completion of the reception of the plurality of instructions, and completes all the processing corresponding to the plurality of instructions stored in the first means. The busy signal is released or the ready signal is generated.

[0006]

FIG. 1 is a block diagram showing a configuration of a display circuit according to an embodiment of the present invention. A is a microcomputer, B is a display control circuit, and C is a liquid crystal display.
The display control circuit B stores an input buffer 1 for taking in instructions from the microcomputer A, a buffering controller 2 (second means) for controlling a busy signal according to the number of inputted instructions and an internal processing result, and a plurality of preset instructions. Stack register group 3 (first means), an instruction decoder 4 for decoding the contents of instructions one by one, an internal processing controller 5 for performing processing corresponding to the decoded instructions, a font memory 6 storing fonts for display, a liquid crystal display A display driver 7 for driving the display C is provided.

In the present embodiment, a plurality of instructions sent from the microcomputer A are successively taken into the stack register group 3 via the input buffer 1 and the buffering controller 2. When a predetermined number of instructions are fetched, a busy signal is generated from the buffering controller 2. Then, the instructions stored in the stack register group 3 are decoded one by one by the instruction decoder 4 and sent to the internal processing controller 5, and the liquid crystal display C
Is controlled according to the contents of the instruction. When the contents of all the instructions stored in the stack register group 3 are processed in this way, a processing completion command is sent from the internal processing controller 5 to the buffering controller 2, and based on the instruction, the buffering is performed. The busy signal output from the controller 2 is released. Therefore, a predetermined number of new instructions are read into the display control circuit B from the microcomputer A, and the above-described processing is repeated.

As described above, the display control circuit B of the present embodiment comprises a buffering controller 2 for controlling a busy signal to the microcomputer A, and a stack register group 3 for temporarily storing a plurality of instructions.
Is characterized by the provision of. As described above, the busy signal is generated from the buffering controller 2 when a predetermined number of instructions set in advance are stored in the stack register group 3, and the processing content based on the plurality of instructions stored in the stack register group 3 is generated. Are released when all of are processed by the internal processing controller 5.

Therefore, as compared with the conventional example in which instructions are fetched one by one and corresponding processing is performed, a plurality of instructions are fetched as one unit and processed, so that high-speed instruction reception becomes possible and the microcomputer A The burden on the side is reduced.

In the above, the busy signal is used.
A READY signal can also be used.
At this time, when a predetermined number of instructions are fetched, the microcomputer cancels the ready signal and generates a signal when the processing of all the fetched instructions is completed.

[0011]

As described above, according to the display control circuit of the present invention, there is an advantage that instructions can be received at a high speed and the burden on the side sending out the instructions can be reduced.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a configuration of a display circuit according to an embodiment of the present invention.

FIG. 2 is a block diagram illustrating a configuration of a conventional display circuit.

Claims (1)

[Claims] 1. A display control circuit for taking in instructions related to display from the outside and controlling display contents of a display, comprising: first means for storing a plurality of instructions; and controlling a busy signal or a ready signal to a side sending the instructions. Providing second means for generating the busy signal or canceling the ready signal upon completion of reception of the plurality of instructions,
A display control circuit, wherein the busy signal is released or the ready signal is generated when all processes corresponding to a plurality of instructions stored in the first means are completed.