JPS5161257A - Puroguramukanonoshusekironrikairo - Google Patents

Puroguramukanonoshusekironrikairo

Info

Publication number
JPS5161257A
JPS5161257A JP11822075A JP11822075A JPS5161257A JP S5161257 A JPS5161257 A JP S5161257A JP 11822075 A JP11822075 A JP 11822075A JP 11822075 A JP11822075 A JP 11822075A JP S5161257 A JPS5161257 A JP S5161257A
Authority
JP
Japan
Prior art keywords
puroguramukanonoshusekironrikairo
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11822075A
Other languages
English (en)
Inventor
Heebenshutoraito Erunsuto
Horuningaa Karuruhainritsuhi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens AG
Siemens Corp
Original Assignee
Siemens AG
Siemens Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens AG, Siemens Corp filed Critical Siemens AG
Publication of JPS5161257A publication Critical patent/JPS5161257A/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17704—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns
    • H03K19/17708—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns using an AND matrix followed by an OR matrix, i.e. programmable logic arrays
    • H03K19/17712—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns using an AND matrix followed by an OR matrix, i.e. programmable logic arrays one of the matrices at least being reprogrammable
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17704—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns
    • H03K19/17708—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns using an AND matrix followed by an OR matrix, i.e. programmable logic arrays

Landscapes

  • Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Logic Circuits (AREA)
JP11822075A 1974-09-30 1975-09-30 Puroguramukanonoshusekironrikairo Pending JPS5161257A (ja)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19742446655 DE2446655A1 (de) 1974-09-30 1974-09-30 Integrierte, programmierbare logikanordnung

Publications (1)

Publication Number Publication Date
JPS5161257A true JPS5161257A (ja) 1976-05-27

Family

ID=5927138

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11822075A Pending JPS5161257A (ja) 1974-09-30 1975-09-30 Puroguramukanonoshusekironrikairo

Country Status (6)

Country Link
JP (1) JPS5161257A (ja)
BE (1) BE834023A (ja)
DE (1) DE2446655A1 (ja)
FR (1) FR2286558A1 (ja)
IT (1) IT1042846B (ja)
NL (1) NL7511458A (ja)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4893033A (en) * 1987-10-06 1990-01-09 Fujitsu Ltd Programmable logic array having input transition detection for generating precharge
JPH03231515A (ja) * 1990-02-06 1991-10-15 Mitsubishi Electric Corp プログラマブル論理装置
JPH0435120A (ja) * 1990-05-25 1992-02-05 Nec Corp プログラマブル・ロジック・アレイ回路

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4893033A (en) * 1987-10-06 1990-01-09 Fujitsu Ltd Programmable logic array having input transition detection for generating precharge
JPH03231515A (ja) * 1990-02-06 1991-10-15 Mitsubishi Electric Corp プログラマブル論理装置
JPH0435120A (ja) * 1990-05-25 1992-02-05 Nec Corp プログラマブル・ロジック・アレイ回路

Also Published As

Publication number Publication date
IT1042846B (it) 1980-01-30
BE834023A (fr) 1976-01-16
DE2446655A1 (de) 1976-04-01
NL7511458A (nl) 1976-04-01
FR2286558A1 (fr) 1976-04-23

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