JPS5240065A - Lead frame - Google Patents

Lead frame

Info

Publication number
JPS5240065A
JPS5240065A JP50115625A JP11562575A JPS5240065A JP S5240065 A JPS5240065 A JP S5240065A JP 50115625 A JP50115625 A JP 50115625A JP 11562575 A JP11562575 A JP 11562575A JP S5240065 A JPS5240065 A JP S5240065A
Authority
JP
Japan
Prior art keywords
lead frame
yield
improving
wire bonding
larger size
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP50115625A
Other languages
Japanese (ja)
Inventor
Michio Tanimoto
Shunei Uematsu
Shunichiro Fujioka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP50115625A priority Critical patent/JPS5240065A/en
Publication of JPS5240065A publication Critical patent/JPS5240065A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/541—Dispositions of bond wires
    • H10W72/5449—Dispositions of bond wires not being orthogonal to a side surface of the chip, e.g. fan-out arrangements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Lead Frames For Integrated Circuits (AREA)

Abstract

PURPOSE: To form the ends of lead frame to a larger size by mutually sliding the ends thereby improving the yield of wire bonding.
COPYRIGHT: (C)1977,JPO&Japio
JP50115625A 1975-09-26 1975-09-26 Lead frame Pending JPS5240065A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP50115625A JPS5240065A (en) 1975-09-26 1975-09-26 Lead frame

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP50115625A JPS5240065A (en) 1975-09-26 1975-09-26 Lead frame

Publications (1)

Publication Number Publication Date
JPS5240065A true JPS5240065A (en) 1977-03-28

Family

ID=14667272

Family Applications (1)

Application Number Title Priority Date Filing Date
JP50115625A Pending JPS5240065A (en) 1975-09-26 1975-09-26 Lead frame

Country Status (1)

Country Link
JP (1) JPS5240065A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54108786U (en) * 1978-01-18 1979-07-31

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54108786U (en) * 1978-01-18 1979-07-31

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