JPS5264882A - Method of producing complementary transistor - Google Patents

Method of producing complementary transistor

Info

Publication number
JPS5264882A
JPS5264882A JP51128423A JP12842376A JPS5264882A JP S5264882 A JPS5264882 A JP S5264882A JP 51128423 A JP51128423 A JP 51128423A JP 12842376 A JP12842376 A JP 12842376A JP S5264882 A JPS5264882 A JP S5264882A
Authority
JP
Japan
Prior art keywords
complementary transistor
producing complementary
producing
transistor
complementary
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP51128423A
Other languages
English (en)
Japanese (ja)
Inventor
Anteipobu Igoo
Shii Karuhoon Harii
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of JPS5264882A publication Critical patent/JPS5264882A/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/60—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
    • H10D84/63—Combinations of vertical and lateral BJTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0112—Integrating together multiple components covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating multiple BJTs
    • H10D84/0119—Integrating together multiple components covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating multiple BJTs the components including complementary BJTs
    • H10D84/0121—Integrating together multiple components covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating multiple BJTs the components including complementary BJTs the complementary BJTs being vertical BJTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P32/00—Diffusion of dopants within, into or out of wafers, substrates or parts of devices
    • H10P32/10—Diffusion of dopants within, into or out of semiconductor bodies or layers
    • H10P32/15—Diffusion of dopants within, into or out of semiconductor bodies or layers from the substrate during epitaxy, e.g. autodoping; Preventing or using autodoping
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01—Manufacture or treatment
    • H10W10/031—Manufacture or treatment of isolation regions comprising PN junctions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/30—Isolation regions comprising PN junctions

Landscapes

  • Bipolar Integrated Circuits (AREA)
  • Bipolar Transistors (AREA)
JP51128423A 1975-11-24 1976-10-27 Method of producing complementary transistor Pending JPS5264882A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US63496475A 1975-11-24 1975-11-24

Publications (1)

Publication Number Publication Date
JPS5264882A true JPS5264882A (en) 1977-05-28

Family

ID=24545858

Family Applications (1)

Application Number Title Priority Date Filing Date
JP51128423A Pending JPS5264882A (en) 1975-11-24 1976-10-27 Method of producing complementary transistor

Country Status (5)

Country Link
JP (1) JPS5264882A (it)
CA (1) CA1053376A (it)
DE (1) DE2651449A1 (it)
FR (1) FR2347777A1 (it)
IT (1) IT1070023B (it)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS571256A (en) * 1980-05-05 1982-01-06 Ibm Integrated circuit

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4196440A (en) * 1978-05-25 1980-04-01 International Business Machines Corporation Lateral PNP or NPN with a high gain
FR2457564A1 (fr) * 1979-05-23 1980-12-19 Thomson Csf Transistor pnp pour circuit integre bipolaire et son procede de fabrication
US5279987A (en) * 1991-10-31 1994-01-18 International Business Machines Corporation Fabricating planar complementary patterned subcollectors with silicon epitaxial layer

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS571256A (en) * 1980-05-05 1982-01-06 Ibm Integrated circuit

Also Published As

Publication number Publication date
CA1053376A (en) 1979-04-24
FR2347777A1 (fr) 1977-11-04
DE2651449A1 (de) 1977-05-26
IT1070023B (it) 1985-03-25

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