JPS542683A - Semiconductor chip - Google Patents
Semiconductor chipInfo
- Publication number
- JPS542683A JPS542683A JP6741977A JP6741977A JPS542683A JP S542683 A JPS542683 A JP S542683A JP 6741977 A JP6741977 A JP 6741977A JP 6741977 A JP6741977 A JP 6741977A JP S542683 A JPS542683 A JP S542683A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor chip
- chip surface
- circumference
- lines
- connection terminal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D89/00—Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
- H10D89/10—Integrated device layouts
Landscapes
- Semiconductor Integrated Circuits (AREA)
Abstract
PURPOSE:To improve integration using a limited area effectively, by forming external connection terminal groups at the circumference of a semiconductor chip surface in lines and even at the center part of the chip surface.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6741977A JPS542683A (en) | 1977-06-08 | 1977-06-08 | Semiconductor chip |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6741977A JPS542683A (en) | 1977-06-08 | 1977-06-08 | Semiconductor chip |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS542683A true JPS542683A (en) | 1979-01-10 |
Family
ID=13344357
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP6741977A Pending JPS542683A (en) | 1977-06-08 | 1977-06-08 | Semiconductor chip |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS542683A (en) |
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6089955A (en) * | 1983-10-21 | 1985-05-20 | Mitsubishi Electric Corp | Semiconductor device |
| US4733288A (en) * | 1982-06-30 | 1988-03-22 | Fujitsu Limited | Gate-array chip |
| US4864381A (en) * | 1986-06-23 | 1989-09-05 | Harris Corporation | Hierarchical variable die size gate array architecture |
| US4978633A (en) * | 1989-08-22 | 1990-12-18 | Harris Corporation | Hierarchical variable die size gate array architecture |
| US5184208A (en) * | 1987-06-30 | 1993-02-02 | Hitachi, Ltd. | Semiconductor device |
| US5365113A (en) * | 1987-06-30 | 1994-11-15 | Hitachi, Ltd. | Semiconductor device |
| US5643830A (en) * | 1993-05-05 | 1997-07-01 | Lsi Logic Corporation | Process for manufacturing off-axis power branches for interior bond pad arrangements |
| US7154187B2 (en) | 2003-12-24 | 2006-12-26 | Seiko Epson Corporation | Semiconductor chip and semiconductor device, and method for manufacturing semiconductor device |
-
1977
- 1977-06-08 JP JP6741977A patent/JPS542683A/en active Pending
Cited By (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4733288A (en) * | 1982-06-30 | 1988-03-22 | Fujitsu Limited | Gate-array chip |
| JPS6089955A (en) * | 1983-10-21 | 1985-05-20 | Mitsubishi Electric Corp | Semiconductor device |
| US4864381A (en) * | 1986-06-23 | 1989-09-05 | Harris Corporation | Hierarchical variable die size gate array architecture |
| US5742101A (en) * | 1987-06-30 | 1998-04-21 | Hitachi, Ltd. | Semiconductor device |
| US5184208A (en) * | 1987-06-30 | 1993-02-02 | Hitachi, Ltd. | Semiconductor device |
| US5365113A (en) * | 1987-06-30 | 1994-11-15 | Hitachi, Ltd. | Semiconductor device |
| US5514905A (en) * | 1987-06-30 | 1996-05-07 | Hitachi, Ltd. | Semiconductor device |
| US4978633A (en) * | 1989-08-22 | 1990-12-18 | Harris Corporation | Hierarchical variable die size gate array architecture |
| US5643830A (en) * | 1993-05-05 | 1997-07-01 | Lsi Logic Corporation | Process for manufacturing off-axis power branches for interior bond pad arrangements |
| US7154187B2 (en) | 2003-12-24 | 2006-12-26 | Seiko Epson Corporation | Semiconductor chip and semiconductor device, and method for manufacturing semiconductor device |
| US7525200B2 (en) | 2003-12-24 | 2009-04-28 | Seiko Epson Corporation | Semiconductor chip and semiconductor device, and method for manufacturing semiconductor device |
| US7786598B2 (en) | 2003-12-24 | 2010-08-31 | Seiko Epson Corporation | Semiconductor chip and semiconductor device, and method for manufacturing semiconductor device |
| US7872358B2 (en) | 2003-12-24 | 2011-01-18 | Seiko Epson Corporation | Semiconductor chip and semiconductor device, and method for manufacturing semiconductor device |
| US8338965B2 (en) | 2003-12-24 | 2012-12-25 | Seiko Epson Corporation | Semiconductor chip and semiconductor device, and method for manufacturing semiconductor device |
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