JPS5451486A - Manufacture for semiconductor device - Google Patents

Manufacture for semiconductor device

Info

Publication number
JPS5451486A
JPS5451486A JP11684777A JP11684777A JPS5451486A JP S5451486 A JPS5451486 A JP S5451486A JP 11684777 A JP11684777 A JP 11684777A JP 11684777 A JP11684777 A JP 11684777A JP S5451486 A JPS5451486 A JP S5451486A
Authority
JP
Japan
Prior art keywords
region
type
groove
layer
film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11684777A
Other languages
Japanese (ja)
Inventor
Katsumi Ogiue
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP11684777A priority Critical patent/JPS5451486A/en
Priority to US05/931,007 priority patent/US4219369A/en
Priority to DE19782840975 priority patent/DE2840975A1/en
Publication of JPS5451486A publication Critical patent/JPS5451486A/en
Pending legal-status Critical Current

Links

Landscapes

  • Electrodes Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

PURPOSE: To increase the degree of circuit integration, by decreasing the allowance of alignment so that no extension toward lateral direction is caused even at the process accompanied by heat treatment, by growing the semiconductor layer being the collector region on the semiconductor substrate and by separating it with deeper groove than the layer.
CONSTITUTION: The N+ region 2 is deposited on the entire surface of P type Si substrate 1, and it is covered with the SiO2 film 3 and the Si3N4 film 4, forming the groove 5 on the substrate 1 with etching and the region 2 is separated in island shape. Next, the P3 type region 6 is formed at the bottom of the groove 5 with ion implantation and the N type layer 8 is epitaxially grown on the entire surface. The growing layer 10 in concave shape is caused on the groove 5 and the flat growing layer 10 is caused on the island region. After that, the SiO2 film 11 and the Si3N4 film 12 are coated on the entire surface, and opening is made at the given region and the N type impurity is deposited. Next, this is extended, forming into the N+ type region 16 for N+ type collector electrode pick up reaching the region 2 with diffusion. Thus, since the groove 5 is present when the region 16 is made, the region 2 is not extended toward lateral direction
COPYRIGHT: (C)1979,JPO&Japio
JP11684777A 1977-09-30 1977-09-30 Manufacture for semiconductor device Pending JPS5451486A (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP11684777A JPS5451486A (en) 1977-09-30 1977-09-30 Manufacture for semiconductor device
US05/931,007 US4219369A (en) 1977-09-30 1978-08-04 Method of making semiconductor integrated circuit device
DE19782840975 DE2840975A1 (en) 1977-09-30 1978-09-20 METHOD FOR PRODUCING AN INTEGRATED SEMICONDUCTOR CIRCUIT

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11684777A JPS5451486A (en) 1977-09-30 1977-09-30 Manufacture for semiconductor device

Publications (1)

Publication Number Publication Date
JPS5451486A true JPS5451486A (en) 1979-04-23

Family

ID=14697093

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11684777A Pending JPS5451486A (en) 1977-09-30 1977-09-30 Manufacture for semiconductor device

Country Status (1)

Country Link
JP (1) JPS5451486A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50138769A (en) * 1974-04-23 1975-11-05

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50138769A (en) * 1974-04-23 1975-11-05

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