JPS5481084A - Me/b-type charge transfer device - Google Patents

Me/b-type charge transfer device

Info

Publication number
JPS5481084A
JPS5481084A JP14817977A JP14817977A JPS5481084A JP S5481084 A JPS5481084 A JP S5481084A JP 14817977 A JP14817977 A JP 14817977A JP 14817977 A JP14817977 A JP 14817977A JP S5481084 A JPS5481084 A JP S5481084A
Authority
JP
Japan
Prior art keywords
substrate
semiconductor substrate
storage region
potential
conductive
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14817977A
Other languages
Japanese (ja)
Inventor
Nobuhisa Kubota
Susumu Kayama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP14817977A priority Critical patent/JPS5481084A/en
Publication of JPS5481084A publication Critical patent/JPS5481084A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/891—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of only components covered by H10D44/00, e.g. integration of charge-coupled devices [CCD] or charge injection devices [CID

Landscapes

  • Solid State Image Pick-Up Elements (AREA)
  • Networks Using Active Elements (AREA)

Abstract

PURPOSE:To ensure the steady charge injection at source potential OV by forming the conductive region different from the semiconductor substrate only on the inner surface of the substrate at the storage region. CONSTITUTION:High-impurity layer 20 of the conductive type opposite to the semiconductor substrate is formed on the inner surface of the substrate to become the storage region, and the equal impurity density to the substrate itself is secured on the inner surface of the substrate to be the barrier region. At the same time, conductive high-impurity layer 68 and 74 equal to storage region 73 as well as to the substrate are formed on the semiconductor substrate surface under each electrode at the input/output part. The potential higher than the electrode application voltage is kept on the semiconductor substrate surface at the input part, so the conditions for the cahrge injection can be satisfied even though the low level is identical between the source potential and the clock potential.
JP14817977A 1977-12-12 1977-12-12 Me/b-type charge transfer device Pending JPS5481084A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14817977A JPS5481084A (en) 1977-12-12 1977-12-12 Me/b-type charge transfer device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14817977A JPS5481084A (en) 1977-12-12 1977-12-12 Me/b-type charge transfer device

Publications (1)

Publication Number Publication Date
JPS5481084A true JPS5481084A (en) 1979-06-28

Family

ID=15447008

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14817977A Pending JPS5481084A (en) 1977-12-12 1977-12-12 Me/b-type charge transfer device

Country Status (1)

Country Link
JP (1) JPS5481084A (en)

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