JPS5498570A - Manufacture for semiconductor device - Google Patents
Manufacture for semiconductor deviceInfo
- Publication number
- JPS5498570A JPS5498570A JP542378A JP542378A JPS5498570A JP S5498570 A JPS5498570 A JP S5498570A JP 542378 A JP542378 A JP 542378A JP 542378 A JP542378 A JP 542378A JP S5498570 A JPS5498570 A JP S5498570A
- Authority
- JP
- Japan
- Prior art keywords
- distortion
- layer
- gold
- diffusion
- layers
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004519 manufacturing process Methods 0.000 title 1
- 239000004065 semiconductor Substances 0.000 title 1
- 238000009792 diffusion process Methods 0.000 abstract 4
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 abstract 4
- 239000010931 gold Substances 0.000 abstract 4
- 229910052737 gold Inorganic materials 0.000 abstract 4
- 238000010438 heat treatment Methods 0.000 abstract 2
- 239000000758 substrate Substances 0.000 abstract 2
- 230000002411 adverse Effects 0.000 abstract 1
- 238000001816 cooling Methods 0.000 abstract 1
- 230000000694 effects Effects 0.000 abstract 1
- 238000001704 evaporation Methods 0.000 abstract 1
- 238000000034 method Methods 0.000 abstract 1
- 239000000126 substance Substances 0.000 abstract 1
Landscapes
- Bipolar Transistors (AREA)
Abstract
PURPOSE: To make stable the characteristcs, by performing gold diffusion after heat treatment for mechanically polished surface.
CONSTITUTION: When the rear side of the substrate 4 providing the collector 3, base 2 and emitter 1 is mechanically polished, the layers of perfect plastic distortion layer 6, plastic-elastic distortion layer 7, and elastic distortion layer 8 are formed. The distortion of the layers 7 and 8 is mitigated with the heat treatment for one hour at about 500°C under N2. After that, the diffusion source 9 is placed by evaporating gold at the rear side and gold diffusion is made. When the layer 6 is removed with chemical polishment lightly immediately after the mechanical polish, it is more effective. With this method, the increase in the distortion in the substrate at gold diffusion rapid cooling can not almost be made, and the adverse effect due to residual distortion is avoided, and the performance can be made stable.
COPYRIGHT: (C)1979,JPO&Japio
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP542378A JPS5498570A (en) | 1978-01-20 | 1978-01-20 | Manufacture for semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP542378A JPS5498570A (en) | 1978-01-20 | 1978-01-20 | Manufacture for semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5498570A true JPS5498570A (en) | 1979-08-03 |
Family
ID=11610748
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP542378A Pending JPS5498570A (en) | 1978-01-20 | 1978-01-20 | Manufacture for semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5498570A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6272132A (en) * | 1985-09-25 | 1987-04-02 | Nec Kansai Ltd | Manufacturing method of semiconductor device |
-
1978
- 1978-01-20 JP JP542378A patent/JPS5498570A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6272132A (en) * | 1985-09-25 | 1987-04-02 | Nec Kansai Ltd | Manufacturing method of semiconductor device |
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