JPS55151357A - Lead frame for semiconductor device - Google Patents

Lead frame for semiconductor device

Info

Publication number
JPS55151357A
JPS55151357A JP5994079A JP5994079A JPS55151357A JP S55151357 A JPS55151357 A JP S55151357A JP 5994079 A JP5994079 A JP 5994079A JP 5994079 A JP5994079 A JP 5994079A JP S55151357 A JPS55151357 A JP S55151357A
Authority
JP
Japan
Prior art keywords
plating
wires
plated
lead frame
die stage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP5994079A
Other languages
English (en)
Japanese (ja)
Other versions
JPS633462B2 (fr
Inventor
Katsuyoshi Miyairi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP5994079A priority Critical patent/JPS55151357A/ja
Publication of JPS55151357A publication Critical patent/JPS55151357A/ja
Publication of JPS633462B2 publication Critical patent/JPS633462B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01—Manufacture or treatment
    • H10W70/04—Manufacture or treatment of leadframes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/874—On different surfaces
    • H10W72/884—Die-attach connectors and bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/736—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked lead frame, conducting package substrate or heat sink
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Lead Frames For Integrated Circuits (AREA)
JP5994079A 1979-05-16 1979-05-16 Lead frame for semiconductor device Granted JPS55151357A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5994079A JPS55151357A (en) 1979-05-16 1979-05-16 Lead frame for semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5994079A JPS55151357A (en) 1979-05-16 1979-05-16 Lead frame for semiconductor device

Publications (2)

Publication Number Publication Date
JPS55151357A true JPS55151357A (en) 1980-11-25
JPS633462B2 JPS633462B2 (fr) 1988-01-23

Family

ID=13127631

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5994079A Granted JPS55151357A (en) 1979-05-16 1979-05-16 Lead frame for semiconductor device

Country Status (1)

Country Link
JP (1) JPS55151357A (fr)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02154454A (ja) * 1988-12-06 1990-06-13 Shinko Electric Ind Co Ltd リードフレームの製造方法
JPH02156659A (ja) * 1988-12-09 1990-06-15 Shinko Electric Ind Co Ltd リードフレームの製造方法

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53144263A (en) * 1977-05-21 1978-12-15 Mitsubishi Electric Corp Partial plating device for lead frame of semiconductor device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53144263A (en) * 1977-05-21 1978-12-15 Mitsubishi Electric Corp Partial plating device for lead frame of semiconductor device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02154454A (ja) * 1988-12-06 1990-06-13 Shinko Electric Ind Co Ltd リードフレームの製造方法
JPH02156659A (ja) * 1988-12-09 1990-06-15 Shinko Electric Ind Co Ltd リードフレームの製造方法

Also Published As

Publication number Publication date
JPS633462B2 (fr) 1988-01-23

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