JPS55165679A - Preparation of semiconductor device - Google Patents

Preparation of semiconductor device

Info

Publication number
JPS55165679A
JPS55165679A JP7352979A JP7352979A JPS55165679A JP S55165679 A JPS55165679 A JP S55165679A JP 7352979 A JP7352979 A JP 7352979A JP 7352979 A JP7352979 A JP 7352979A JP S55165679 A JPS55165679 A JP S55165679A
Authority
JP
Japan
Prior art keywords
substrate
layer
electrode
injected
gate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7352979A
Other languages
Japanese (ja)
Inventor
Kazumichi Omura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP7352979A priority Critical patent/JPS55165679A/en
Publication of JPS55165679A publication Critical patent/JPS55165679A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]

Landscapes

  • Bipolar Transistors (AREA)

Abstract

PURPOSE:To lessen a change of conductance by a method wherein when an Al gate self-matching MOS transistor is prepared, B<+> ions are injected into the substrate about the gate electrode and a region with high layer resistance is formed by applying a laser beam to that part. CONSTITUTION:The N-type Si substrate 21 is coated with SiO2 film, the gate SiO2 film 23 is left between the source and drain regions 24, 25 to be formed, the protective SiO2 film 22 is left on other part, and B impurity is diffused into the substrate to form the P-type regions 24, 25. Next Al film is applied to the entire surface of the substrate, and is patterned to form the source electrode 26, drain electrode 27 and gate electrode 28. B<+> ions are injected into the substrate about the electrode 28 by using those electrodes as masks to form a shallow ion-injected layer 29. After this, a Q-switch ruby laser beam 30 is applied to the layer 29 to anneal it, and a high resistance of 3kOMEGA/cm<2> is provided to the layer. In this way, a change of conductance can be controlled within a range of + or -2% even with a large current operation for a long time.
JP7352979A 1979-06-13 1979-06-13 Preparation of semiconductor device Pending JPS55165679A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7352979A JPS55165679A (en) 1979-06-13 1979-06-13 Preparation of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7352979A JPS55165679A (en) 1979-06-13 1979-06-13 Preparation of semiconductor device

Publications (1)

Publication Number Publication Date
JPS55165679A true JPS55165679A (en) 1980-12-24

Family

ID=13520845

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7352979A Pending JPS55165679A (en) 1979-06-13 1979-06-13 Preparation of semiconductor device

Country Status (1)

Country Link
JP (1) JPS55165679A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57136372A (en) * 1981-02-18 1982-08-23 Fujitsu Ltd Manufacture of mos type field effect semiconductor device
KR100275946B1 (en) * 1998-01-21 2001-01-15 김영환 Method of fabricating ESD protection ciruit

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57136372A (en) * 1981-02-18 1982-08-23 Fujitsu Ltd Manufacture of mos type field effect semiconductor device
KR100275946B1 (en) * 1998-01-21 2001-01-15 김영환 Method of fabricating ESD protection ciruit

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