JPS5525123A - Sequential controller - Google Patents

Sequential controller

Info

Publication number
JPS5525123A
JPS5525123A JP9726578A JP9726578A JPS5525123A JP S5525123 A JPS5525123 A JP S5525123A JP 9726578 A JP9726578 A JP 9726578A JP 9726578 A JP9726578 A JP 9726578A JP S5525123 A JPS5525123 A JP S5525123A
Authority
JP
Japan
Prior art keywords
signal
input
set condition
input signal
read
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9726578A
Other languages
Japanese (ja)
Inventor
Naohisa Yamaguchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP9726578A priority Critical patent/JPS5525123A/en
Publication of JPS5525123A publication Critical patent/JPS5525123A/en
Pending legal-status Critical Current

Links

Landscapes

  • Testing And Monitoring For Control Systems (AREA)
  • Programmable Controllers (AREA)

Abstract

PURPOSE:To make it possible to diagnose immediately a controlled object in case of no step by equipping a display unit capable of judging easily which input signal is required to advance sequence execution. CONSTITUTION:Set condition selector circuit 12 generates signal 102 for a read of a set condition according to the content of step counter 11. Read-out imput set condition 101 is compared with input signal 100, point by point, by comparator circuit 13. From the comparison result of comparator circuit 13, coincidence between input set condition 101 and input signal 100 is judged; and step counter 11 is advanced by the coincidence output and output control signal 103 is outputted to output part 5. Comparison result signal 104 is inputted to input queue signal display part 6 and only when input condition set signal 101 arrives and it does not coincide with input signal 100, the LED display unit comes on.
JP9726578A 1978-08-11 1978-08-11 Sequential controller Pending JPS5525123A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9726578A JPS5525123A (en) 1978-08-11 1978-08-11 Sequential controller

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9726578A JPS5525123A (en) 1978-08-11 1978-08-11 Sequential controller

Publications (1)

Publication Number Publication Date
JPS5525123A true JPS5525123A (en) 1980-02-22

Family

ID=14187697

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9726578A Pending JPS5525123A (en) 1978-08-11 1978-08-11 Sequential controller

Country Status (1)

Country Link
JP (1) JPS5525123A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57170401U (en) * 1981-04-15 1982-10-27
JPS62179602U (en) * 1986-04-30 1987-11-14

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57170401U (en) * 1981-04-15 1982-10-27
JPS62179602U (en) * 1986-04-30 1987-11-14

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