JPS553069A - Plane picture generating system for display device - Google Patents

Plane picture generating system for display device

Info

Publication number
JPS553069A
JPS553069A JP7600178A JP7600178A JPS553069A JP S553069 A JPS553069 A JP S553069A JP 7600178 A JP7600178 A JP 7600178A JP 7600178 A JP7600178 A JP 7600178A JP S553069 A JPS553069 A JP S553069A
Authority
JP
Japan
Prior art keywords
plane
data
contour
closed loop
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7600178A
Other languages
Japanese (ja)
Inventor
Tsuneo Ikedo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Instruments Inc
Original Assignee
Seiko Instruments and Electronics Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Instruments and Electronics Ltd filed Critical Seiko Instruments and Electronics Ltd
Priority to JP7600178A priority Critical patent/JPS553069A/en
Publication of JPS553069A publication Critical patent/JPS553069A/en
Pending legal-status Critical Current

Links

Landscapes

  • Digital Computer Display Output (AREA)
  • Image Generation (AREA)

Abstract

PURPOSE:To fill up inside the contour by giving the plane data to the picture memory as the contour data and then giving the prescribed logic signal within the region enclosed by the contour at the reading time. CONSTITUTION:The closed loop data which is accompanied by no luminance information but to be the contour of the plane picture is written into plane growing memory plane 8 corresponding to the screen. For the generation of the plane picture, plane 8 is scanned in a fixed direction, and a closed loop is formed when the memorized closed loop data is read out. The fixed logic signals are generated continuously for the period during which signal of ''1'' is detected to become ''0'' once and then the ''1'' signal is detected again. In this way, the inside of the region enclosed by the closed loop is filled up with the prescribed display data to display the plane data.
JP7600178A 1978-06-23 1978-06-23 Plane picture generating system for display device Pending JPS553069A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7600178A JPS553069A (en) 1978-06-23 1978-06-23 Plane picture generating system for display device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7600178A JPS553069A (en) 1978-06-23 1978-06-23 Plane picture generating system for display device

Publications (1)

Publication Number Publication Date
JPS553069A true JPS553069A (en) 1980-01-10

Family

ID=13592557

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7600178A Pending JPS553069A (en) 1978-06-23 1978-06-23 Plane picture generating system for display device

Country Status (1)

Country Link
JP (1) JPS553069A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05216466A (en) * 1992-09-28 1993-08-27 Hitachi Ltd Filled figure generation method
US5910807A (en) * 1996-08-09 1999-06-08 Mitsubishi Denki Kabushiki Kaisha Method of drawing figure such as polygon and display control device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05216466A (en) * 1992-09-28 1993-08-27 Hitachi Ltd Filled figure generation method
US5910807A (en) * 1996-08-09 1999-06-08 Mitsubishi Denki Kabushiki Kaisha Method of drawing figure such as polygon and display control device

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