JPS5570071A - Mosic protective circuit - Google Patents

Mosic protective circuit

Info

Publication number
JPS5570071A
JPS5570071A JP14449178A JP14449178A JPS5570071A JP S5570071 A JPS5570071 A JP S5570071A JP 14449178 A JP14449178 A JP 14449178A JP 14449178 A JP14449178 A JP 14449178A JP S5570071 A JPS5570071 A JP S5570071A
Authority
JP
Japan
Prior art keywords
transistor
mosic
condition
input
handling
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14449178A
Other languages
Japanese (ja)
Inventor
Etsuo Kazama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP14449178A priority Critical patent/JPS5570071A/en
Publication of JPS5570071A publication Critical patent/JPS5570071A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D89/00—Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
    • H10D89/60—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD]
    • H10D89/601—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs

Landscapes

  • Amplifiers (AREA)

Abstract

PURPOSE:To prevent breakdown due to the handling of a MOSIC, by turning a depletion type protective transistor OFF wherein the desired voltage is applied to a gate according to a condition that the MOSIC is used. CONSTITUTION:When operating a MOSIC by handling, a deplection type protective transistor 10 is under an ON condition because bias is not applied to a gate of said transistor. Thus, even if static electricity with high voltage generated during the handling of the MOSIC is input to an input terminal 1, charge is rapidly discharged to an earth line 11 through the deplection type protective transistor 10 under the ON condition. Consequently, an input transistor 4 is protected because high voltage is not applied to the input transistor. When practically employing the MOSIC, a DC-DC converter 12 is operated, the desired voltage is applied to the gate of the deplection type transistor 10 and the transistor 10 is brought to an OFF condition.
JP14449178A 1978-11-21 1978-11-21 Mosic protective circuit Pending JPS5570071A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14449178A JPS5570071A (en) 1978-11-21 1978-11-21 Mosic protective circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14449178A JPS5570071A (en) 1978-11-21 1978-11-21 Mosic protective circuit

Publications (1)

Publication Number Publication Date
JPS5570071A true JPS5570071A (en) 1980-05-27

Family

ID=15363560

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14449178A Pending JPS5570071A (en) 1978-11-21 1978-11-21 Mosic protective circuit

Country Status (1)

Country Link
JP (1) JPS5570071A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2485808A1 (en) * 1980-06-30 1981-12-31 Mitsubishi Electric Corp INPUT PROTECTION CIRCUIT FOR SEMICONDUCTOR DEVICE

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50109682A (en) * 1974-02-04 1975-08-28

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50109682A (en) * 1974-02-04 1975-08-28

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2485808A1 (en) * 1980-06-30 1981-12-31 Mitsubishi Electric Corp INPUT PROTECTION CIRCUIT FOR SEMICONDUCTOR DEVICE

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