JPS5572061A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS5572061A
JPS5572061A JP14748378A JP14748378A JPS5572061A JP S5572061 A JPS5572061 A JP S5572061A JP 14748378 A JP14748378 A JP 14748378A JP 14748378 A JP14748378 A JP 14748378A JP S5572061 A JPS5572061 A JP S5572061A
Authority
JP
Japan
Prior art keywords
layer
amorphous
angle
bent
heighten
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP14748378A
Other languages
Japanese (ja)
Other versions
JPS596062B2 (en
Inventor
Natsuo Tsubouchi
Tatsuya Enomoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP14748378A priority Critical patent/JPS596062B2/en
Publication of JPS5572061A publication Critical patent/JPS5572061A/en
Publication of JPS596062B2 publication Critical patent/JPS596062B2/en
Expired legal-status Critical Current

Links

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

PURPOSE: To heighten dielectric breakdown voltage between layers, by providing the first layer's bend with a larger inner angle than the right angle at the time when forming a piled amorphous layer to be used for a semiconductor device by providing the second layer's amorphous Si layer on the first layer's amorphous Si layer of bent pattern shape through an insulation layer.
CONSTITUTION: When a memory LSI, etc. is prepared, the first layer's amorphous Si layer 3 having a bent pattern shape on an Si substrate 1 and the second layer amorphous Si layer 4 having an equally bent pattern are mutually insulating and buried in an SiO2 film 2, and thus formed objects are used as No.1 and No.2 MOS transistor's gate electrodes. In this mechanism, an inner angle 5 in the bent of the first layer's amorphous layer 3 is provided with a larger angle than the right angle, that is, 2 chamferred inner angles 5a and 5b are to be 135° each. It is possible to heighten dielectric bearing force between the layers 3 and 4 remarkably.
COPYRIGHT: (C)1980,JPO&Japio
JP14748378A 1978-11-25 1978-11-25 Manufacturing method of semiconductor device Expired JPS596062B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14748378A JPS596062B2 (en) 1978-11-25 1978-11-25 Manufacturing method of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14748378A JPS596062B2 (en) 1978-11-25 1978-11-25 Manufacturing method of semiconductor device

Publications (2)

Publication Number Publication Date
JPS5572061A true JPS5572061A (en) 1980-05-30
JPS596062B2 JPS596062B2 (en) 1984-02-08

Family

ID=15431407

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14748378A Expired JPS596062B2 (en) 1978-11-25 1978-11-25 Manufacturing method of semiconductor device

Country Status (1)

Country Link
JP (1) JPS596062B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5208175A (en) * 1990-12-21 1993-05-04 Samsung Electronics Co., Ltd. Method of making a nonvolatile semiconductor memory device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5208175A (en) * 1990-12-21 1993-05-04 Samsung Electronics Co., Ltd. Method of making a nonvolatile semiconductor memory device

Also Published As

Publication number Publication date
JPS596062B2 (en) 1984-02-08

Similar Documents

Publication Publication Date Title
JPS52102690A (en) Semiconductor capacitance device
JPS5736844A (en) Semiconductor device
JPS5696850A (en) Semiconductor device and manufacture thereof
JPS5570060A (en) Semiconductor device
JPS5585068A (en) Preparation of semiconductor device
JPS54128668A (en) Manufacture for electronic component device
JPS5617039A (en) Semiconductor device
JPS53126875A (en) Gate protecting device
JPS54101282A (en) Two layer rolysilicon semiconductor device
JPS54121683A (en) Semiconductor device and its manufacture
JPS5571055A (en) Semiconductor device and its manufacturing method
JPS6437876A (en) Manufacture of semiconductor device
JPS52108777A (en) Field-effect transistor for schottky barrier layer
JPS52130580A (en) High densityintegrated circuit device
JPS5412276A (en) Semiconductor device
JPS56138946A (en) Semiconductor device
JPS5487191A (en) Field effect transistor of isolation silicon gate type
JPS5522581A (en) Semi-conductor device
JPS5522885A (en) Insulation gate type field effect semiconductor device
JPS5562770A (en) Insulating gate type field-effect semiconductor device and its preparation
JPS53119669A (en) Production of semiconductor device
JPS5562760A (en) Semiconductor device
JPS52147983A (en) Insulation gate type semiconductor device
JPS57173958A (en) Semiconductor ic device
JPS5317283A (en) Production of semiconductor device