JPS5586151A - Manufacture of semiconductor integrated circuit - Google Patents
Manufacture of semiconductor integrated circuitInfo
- Publication number
- JPS5586151A JPS5586151A JP16034578A JP16034578A JPS5586151A JP S5586151 A JPS5586151 A JP S5586151A JP 16034578 A JP16034578 A JP 16034578A JP 16034578 A JP16034578 A JP 16034578A JP S5586151 A JPS5586151 A JP S5586151A
- Authority
- JP
- Japan
- Prior art keywords
- film
- type
- layer
- region
- sio
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D10/00—Bipolar junction transistors [BJT]
- H10D10/01—Manufacture or treatment
- H10D10/051—Manufacture or treatment of vertical BJTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P32/00—Diffusion of dopants within, into or out of wafers, substrates or parts of devices
- H10P32/10—Diffusion of dopants within, into or out of semiconductor bodies or layers
- H10P32/14—Diffusion of dopants within, into or out of semiconductor bodies or layers within a single semiconductor body or layer in a solid phase; between different semiconductor bodies or layers, both in a solid phase
- H10P32/1408—Diffusion of dopants within, into or out of semiconductor bodies or layers within a single semiconductor body or layer in a solid phase; between different semiconductor bodies or layers, both in a solid phase from or through or into an external applied layer, e.g. photoresist or nitride layers
- H10P32/1414—Diffusion of dopants within, into or out of semiconductor bodies or layers within a single semiconductor body or layer in a solid phase; between different semiconductor bodies or layers, both in a solid phase from or through or into an external applied layer, e.g. photoresist or nitride layers the applied layer being silicon, silicide or SIPOS, e.g. polysilicon or porous silicon
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P32/00—Diffusion of dopants within, into or out of wafers, substrates or parts of devices
- H10P32/10—Diffusion of dopants within, into or out of semiconductor bodies or layers
- H10P32/17—Diffusion of dopants within, into or out of semiconductor bodies or layers characterised by the semiconductor material
- H10P32/171—Diffusion of dopants within, into or out of semiconductor bodies or layers characterised by the semiconductor material being group IV material
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P76/00—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography
- H10P76/40—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising inorganic materials
Landscapes
- Bipolar Transistors (AREA)
- Element Separation (AREA)
Priority Applications (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16034578A JPS5586151A (en) | 1978-12-23 | 1978-12-23 | Manufacture of semiconductor integrated circuit |
| DE2951504A DE2951504C2 (de) | 1978-12-23 | 1979-12-20 | Verfahren zum Herstellen einer integrierten Schaltungsanordnung mit einem einen inneren und einen äußeren Basisbereich aufweisenden bipolaren Transistor |
| FR7931499A FR2445023A1 (fr) | 1978-12-23 | 1979-12-21 | Procede de fabrication d'un circuit integre contenant du silicium polycristallin |
| US06/105,937 US4313255A (en) | 1978-12-23 | 1979-12-21 | Method for manufacturing integrated circuit device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16034578A JPS5586151A (en) | 1978-12-23 | 1978-12-23 | Manufacture of semiconductor integrated circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5586151A true JPS5586151A (en) | 1980-06-28 |
Family
ID=15712967
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP16034578A Pending JPS5586151A (en) | 1978-12-23 | 1978-12-23 | Manufacture of semiconductor integrated circuit |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US4313255A (ja) |
| JP (1) | JPS5586151A (ja) |
| DE (1) | DE2951504C2 (ja) |
| FR (1) | FR2445023A1 (ja) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5796567A (en) * | 1980-12-09 | 1982-06-15 | Nec Corp | Manufacture of semiconductor device |
| JPS6248067A (ja) * | 1985-08-28 | 1987-03-02 | Clarion Co Ltd | 半導体装置の製造方法 |
Families Citing this family (17)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CA1129118A (en) * | 1978-07-19 | 1982-08-03 | Tetsushi Sakai | Semiconductor devices and method of manufacturing the same |
| JPS5852339B2 (ja) * | 1979-03-20 | 1983-11-22 | 富士通株式会社 | 半導体装置の製造方法 |
| US4452645A (en) * | 1979-11-13 | 1984-06-05 | International Business Machines Corporation | Method of making emitter regions by implantation through a non-monocrystalline layer |
| US4381953A (en) * | 1980-03-24 | 1983-05-03 | International Business Machines Corporation | Polysilicon-base self-aligned bipolar transistor process |
| US4411708A (en) * | 1980-08-25 | 1983-10-25 | Trw Inc. | Method of making precision doped polysilicon vertical ballast resistors by multiple implantations |
| JPS5758356A (en) * | 1980-09-26 | 1982-04-08 | Toshiba Corp | Manufacture of semiconductor device |
| JPS5795625A (en) | 1980-12-04 | 1982-06-14 | Toshiba Corp | Manufacture of semiconductor device |
| JPS57149770A (en) * | 1981-03-11 | 1982-09-16 | Mitsubishi Electric Corp | Manufacture of semiconductor device |
| US4563227A (en) * | 1981-12-08 | 1986-01-07 | Matsushita Electric Industrial Co., Ltd. | Method for manufacturing a semiconductor device |
| JPS58127374A (ja) * | 1982-01-25 | 1983-07-29 | Hitachi Ltd | 半導体装置の製造方法 |
| US4431460A (en) * | 1982-03-08 | 1984-02-14 | International Business Machines Corporation | Method of producing shallow, narrow base bipolar transistor structures via dual implantations of selected polycrystalline layer |
| US4437897A (en) * | 1982-05-18 | 1984-03-20 | International Business Machines Corporation | Fabrication process for a shallow emitter/base transistor using same polycrystalline layer |
| JPS5931052A (ja) * | 1982-08-13 | 1984-02-18 | Hitachi Ltd | 半導体集積回路装置の製造方法 |
| US4927773A (en) * | 1989-06-05 | 1990-05-22 | Santa Barbara Research Center | Method of minimizing implant-related damage to a group II-VI semiconductor material |
| JP2914293B2 (ja) * | 1996-04-25 | 1999-06-28 | 日本電気株式会社 | 半導体装置の製造方法 |
| US7638385B2 (en) * | 2005-05-02 | 2009-12-29 | Semiconductor Components Industries, Llc | Method of forming a semiconductor device and structure therefor |
| US20080272394A1 (en) * | 2007-05-01 | 2008-11-06 | Ashok Kumar Kapoor | Junction field effect transistors in germanium and silicon-germanium alloys and method for making and using |
Family Cites Families (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3523042A (en) * | 1967-12-26 | 1970-08-04 | Hughes Aircraft Co | Method of making bipolar transistor devices |
| NL161306C (nl) * | 1971-05-28 | 1980-01-15 | Fujitsu Ltd | Werkwijze voor de vervaardiging van veldeffecttransis- toren met geisoleerde stuurelektrode. |
| US3753807A (en) * | 1972-02-24 | 1973-08-21 | Bell Canada Northern Electric | Manufacture of bipolar semiconductor devices |
| US3798084A (en) * | 1972-08-11 | 1974-03-19 | Ibm | Simultaneous diffusion processing |
| US3915767A (en) * | 1973-02-05 | 1975-10-28 | Honeywell Inc | Rapidly responsive transistor with narrowed base |
| US3904450A (en) * | 1974-04-26 | 1975-09-09 | Bell Telephone Labor Inc | Method of fabricating injection logic integrated circuits using oxide isolation |
| DE2449688C3 (de) * | 1974-10-18 | 1980-07-10 | Siemens Ag, 1000 Berlin Und 8000 Muenchen | Verfahren zur Herstellung einer dotierten Zone eines Leitfähigkeitstyps in einem Halbleiterkörper |
| DE2640465A1 (de) * | 1976-09-08 | 1978-03-09 | Siemens Ag | Verfahren zur herstellung dotierter zonen in einem halbleitersubstrat |
-
1978
- 1978-12-23 JP JP16034578A patent/JPS5586151A/ja active Pending
-
1979
- 1979-12-20 DE DE2951504A patent/DE2951504C2/de not_active Expired
- 1979-12-21 US US06/105,937 patent/US4313255A/en not_active Expired - Lifetime
- 1979-12-21 FR FR7931499A patent/FR2445023A1/fr active Granted
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5796567A (en) * | 1980-12-09 | 1982-06-15 | Nec Corp | Manufacture of semiconductor device |
| JPS6248067A (ja) * | 1985-08-28 | 1987-03-02 | Clarion Co Ltd | 半導体装置の製造方法 |
Also Published As
| Publication number | Publication date |
|---|---|
| FR2445023B1 (ja) | 1984-05-25 |
| US4313255A (en) | 1982-02-02 |
| FR2445023A1 (fr) | 1980-07-18 |
| DE2951504A1 (de) | 1980-06-26 |
| DE2951504C2 (de) | 1986-08-28 |
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