JPS55914A - Divider circuit - Google Patents

Divider circuit

Info

Publication number
JPS55914A
JPS55914A JP7284178A JP7284178A JPS55914A JP S55914 A JPS55914 A JP S55914A JP 7284178 A JP7284178 A JP 7284178A JP 7284178 A JP7284178 A JP 7284178A JP S55914 A JPS55914 A JP S55914A
Authority
JP
Japan
Prior art keywords
circuits
gain variable
fixed
division
component
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP7284178A
Other languages
Japanese (ja)
Other versions
JPS6342310B2 (en
Inventor
Masaru Noda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP7284178A priority Critical patent/JPS55914A/en
Priority to US06/049,084 priority patent/US4353000A/en
Publication of JPS55914A publication Critical patent/JPS55914A/en
Publication of JPS6342310B2 publication Critical patent/JPS6342310B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Control Of Amplification And Gain Control (AREA)

Abstract

PURPOSE:To realize precise division oeration by canceling fixed components of siganls A and B, by connecting fixed-component cancellation circuits to gain variable circuits. CONSTITUTION:Division siganl A is inputted from terminal 1 to the 1st gain variable circuits Q1 and Q2, whose outputs are fedback as control voltage V of the 1st gain variable circuit so as to hold automatically the output K(V).A nearly at constant value C. The fixed component is canceled since fixed-compenent cancellation circuits Q4 and Q5 are connected to the 1st gain variable circuits Q1 and Q2. On the other hand, the 2nd gain variable circuits Q6 and Q7 whose gains are similarly expressed by K(V) are applied with the same control voltage V while divided siganal B is supplied to terminal 2, so that a signal equivalent to the division result will appear at the output. Similarlty, fixed-component cancellation circuits Q9 and Q10 are connected to the 2nd gain variable circuits Q6 and Q7, so that division of canceling the fixed component will be performed.
JP7284178A 1978-06-16 1978-06-16 Divider circuit Granted JPS55914A (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP7284178A JPS55914A (en) 1978-06-16 1978-06-16 Divider circuit
US06/049,084 US4353000A (en) 1978-06-16 1979-06-18 Divider circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7284178A JPS55914A (en) 1978-06-16 1978-06-16 Divider circuit

Publications (2)

Publication Number Publication Date
JPS55914A true JPS55914A (en) 1980-01-07
JPS6342310B2 JPS6342310B2 (en) 1988-08-23

Family

ID=13501017

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7284178A Granted JPS55914A (en) 1978-06-16 1978-06-16 Divider circuit

Country Status (1)

Country Link
JP (1) JPS55914A (en)

Also Published As

Publication number Publication date
JPS6342310B2 (en) 1988-08-23

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